CN109786345B - Advanced packaging structure and processing technology of graphene-based IPM module - Google Patents
Advanced packaging structure and processing technology of graphene-based IPM module Download PDFInfo
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- CN109786345B CN109786345B CN201910188814.5A CN201910188814A CN109786345B CN 109786345 B CN109786345 B CN 109786345B CN 201910188814 A CN201910188814 A CN 201910188814A CN 109786345 B CN109786345 B CN 109786345B
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 140
- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 140
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 26
- 238000005516 engineering process Methods 0.000 title claims abstract description 9
- 238000012545 processing Methods 0.000 title claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 77
- 239000000919 ceramic Substances 0.000 claims abstract description 69
- 229910000679 solder Inorganic materials 0.000 claims abstract description 62
- 238000011084 recovery Methods 0.000 claims abstract description 32
- 239000004519 grease Substances 0.000 claims abstract description 11
- 229920001296 polysiloxane Polymers 0.000 claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 9
- 239000011347 resin Substances 0.000 claims abstract description 8
- 229920005989 resin Polymers 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 116
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 60
- 229910052802 copper Inorganic materials 0.000 claims description 60
- 239000010949 copper Substances 0.000 claims description 60
- 238000000034 method Methods 0.000 claims description 21
- 239000011248 coating agent Substances 0.000 claims description 11
- 238000000576 coating method Methods 0.000 claims description 11
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 238000005538 encapsulation Methods 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 6
- 238000005476 soldering Methods 0.000 claims description 6
- 239000002356 single layer Substances 0.000 claims description 5
- 238000001746 injection moulding Methods 0.000 claims description 4
- 230000033116 oxidation-reduction process Effects 0.000 claims description 3
- 238000003466 welding Methods 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 239000005022 packaging material Substances 0.000 claims description 2
- 239000010408 film Substances 0.000 claims 6
- 239000010409 thin film Substances 0.000 claims 2
- 230000017525 heat dissipation Effects 0.000 abstract description 5
- 230000002035 prolonged effect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 8
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910000969 tin-silver-copper Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention relates to an advanced packaging structure and a processing technology of a graphene-based IPM module, wherein the structure comprises an IGBT chip, a fast recovery diode chip, a driving chip, a graphene-based copper-clad ceramic substrate, a buffer gasket, a solder layer, solder balls, a plastic package shell, packaging resin, heat-conducting silicone grease and a radiator. The advanced packaging mode of flip chip is adopted to replace bonding leads between chips and between the chips and a substrate, so that double-sided heat dissipation of the IPM module is realized, and the reliability of the module is improved; meanwhile, the high-heat-conductivity graphene material is adopted to enhance the rapid heat dissipation of the local hot spot of the substrate, so that the highest temperature of the IPM module is reduced, and the service life of the module is prolonged.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to an advanced packaging structure and a processing technology of a graphene-based IPM module.
Background
The intelligent power module (INTELLIGENT POWER MODULE, IPM) is based on IGBT, logic, control, detection and protection circuits are integrated in the intelligent power module, compared with the common IGBT, the intelligent power module has the advantages that the system performance and the reliability are greatly improved, meanwhile, the on-state loss and the switching loss of the IPM are low, the size of the radiator is reduced, the size of the whole system is greatly reduced, the development direction of a power device is adapted, and more power electronic equipment selects the power module to replace discrete elements. According to the forecast of city-regulating organization IHS Technology, the annual average composite growth rate by 2018 in the consumer field is expected to reach 15.5%. In the face of new demands of IPM in application in the current market, miniaturization, low power consumption, perfect protection function, higher integration and the like of modules become the weight of power device manufacturers in technical development.
However, the IPM module has a small volume and a compact structure, and contains a plurality of power devices therein, so that the power density is high, and the local heating phenomenon is serious. For the IPM package structure, temperature is the most important factor affecting the reliability of the IPM package structure, if heat generated by the module cannot be removed in time, the temperature inside the module is too high, so that the IPM package structure affects various aspects such as electrical, mechanical and corrosion of the IPM, and finally the module is invalid. There is an urgent need to develop and deeply study and optimize the package design of IPM modules, and propose an efficient heat dissipation package scheme.
Disclosure of Invention
In order to solve the prior art problem, the invention aims to overcome the defects existing in the prior art, and provides an advanced packaging structure and a processing technology of a graphene-based IPM module, wherein an advanced packaging form of flip-chip driving chip and power chip is adopted, so that a grid driving signal is connected with a grid through a copper-clad ceramic substrate (Direct Bonded Copper, DBC), bonding wires between chips and substrates are replaced, and the reliability of the module is improved; meanwhile, the graphene film with high heat conductivity is used as a heat dissipation material on the DBC lining plate of the IPM module, the transverse high heat conduction capability of the graphene film is exerted, the highest temperature of the chip in operation is reduced, and therefore the service life of the module is prolonged.
In order to achieve the above purpose, the present invention adopts the following technical scheme.
An advanced packaging structure of a graphene-based IPM module comprises an upper graphene-based copper-coated ceramic substrate, a lower graphene-based copper-coated ceramic substrate and a driving chip; the upper graphene-based copper-clad ceramic substrate is obtained by attaching a graphene-based film prepared by a redox method to a graphene application area designed on the surface of an upper copper layer of the upper copper-clad ceramic substrate, and the lower graphene-based copper-clad ceramic substrate is obtained by growing a graphene film on the graphene application area designed on the surface of the upper copper layer of the lower copper-clad ceramic substrate by a chemical vapor deposition method;
the front surface of the driving chip is downwards connected to the upper surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate through a solder ball group, and the back surface of the driving chip is connected to the lower surface of the first buffer pad through a first solder layer;
The upper surface of the first buffer gasket is connected with the surface of the upper copper layer of the inverted upper graphene-based copper-clad ceramic substrate through a second solder layer.
Specifically, the thickness of the graphene-based film on the upper graphene-based copper-clad ceramic substrate is 50-60 mu m.
Specifically, a single-layer graphene film is grown on a lower graphene-based copper-clad ceramic substrate by a chemical vapor deposition method.
The above structure may further include: the front sides of the first IGBT chip and the first fast recovery diode chip are downwards connected to the surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate through a third solder layer; the back surfaces of the first IGBT chip and the first fast recovery diode chip are connected with the second buffer pad through the first solder layer; and the second buffer gasket is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate through a second solder layer.
The above structure may further include: the second IGBT chip and the second fast recovery diode chip are connected to the surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate through a third solder layer in a face-down manner; the back surfaces of the second IGBT chip and the second fast recovery diode chip are connected with a third buffer pad through a first solder layer; and the third buffer gasket is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate through the second solder layer.
Specifically, the graphene application areas are designed at positions corresponding to the back sides of the driving chip, the IGBT chip and the fast recovery diode chip respectively on the upper graphene-based copper-coated ceramic substrate, the graphene application areas are designed at positions corresponding to the front sides of the IGBT chip and the fast recovery diode chip respectively on the lower graphene-based copper-coated ceramic substrate, and the grid areas of the IGBT chip are avoided.
The above structure may further include:
The first radiator is closely attached to the lower surface of the lower copper layer of the upper graphene-based copper-clad ceramic substrate through a heat-conducting silicone grease layer;
The second radiator is closely attached to the lower surface of the lower copper layer of the lower graphene-based copper-clad ceramic substrate through a fourth solder layer;
A plastic package shell is arranged between the first radiator and the second radiator, and all elements except the radiator are packaged in the plastic package shell; the plastic package shell is internally encapsulated by encapsulation resin.
A processing technology of an advanced packaging structure of a graphene-based IPM module comprises the following steps:
Step 1, manufacturing a graphene-based copper-clad ceramic substrate structure, which comprises the following steps:
step 1.1, attaching a graphene-based film prepared by an oxidation-reduction method to a graphene application area designed on the upper surface of a copper layer on a first copper-clad ceramic substrate, and drying for later use to obtain an upper graphene-based copper-clad ceramic substrate;
Step 1.2, growing a graphene film on a graphene application area designed on the upper surface of a copper layer on a second copper-clad ceramic substrate by using a chemical vapor deposition method to obtain a lower graphene-based copper-clad ceramic substrate;
Step 2, respectively coating a third solder layer and placing a solder ball group on the position, where the chip needs to be mounted, of the upper surface of the lower graphene-based copper-clad ceramic substrate, respectively inversely mounting a first IGBT chip, a first fast recovery diode chip, a second IGBT chip and a second fast recovery diode chip on the corresponding position of the upper surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate, inversely mounting a driving chip on the solder ball group of the upper copper layer of the lower graphene-based copper-clad ceramic substrate;
Step 3, coating a first solder layer on the back surfaces of the driving chip, the first IGBT chip, the first fast recovery diode chip, the second IGBT chip and the second fast recovery diode chip;
Step 4, coating a second solder layer on the upper graphene-based copper-clad ceramic substrate, and respectively attaching a first buffer gasket, a second buffer gasket and a third buffer gasket;
step 5, inversely mounting the structure obtained in the step 4 on the structure obtained in the step 3, so that the first buffer gasket, the second buffer gasket and the third buffer gasket are attached to the first solder layer;
Step 6, coating a fourth solder layer on the upper surface of the second radiator, attaching the structure obtained in the step 5 to the upper surface of the fourth solder layer, and putting the structure into a reflow soldering machine for soldering;
Step 7, coating a heat conduction silicone grease layer on the upper surface of the first radiator, and inversely attaching the heat conduction silicone grease layer on the corresponding position of the lower surface of the lower copper layer of the upper graphene-based copper-clad ceramic substrate so that all structures are positioned between the first radiator and the second radiator;
And 8, packaging all structures between the two radiators by using a plastic package shell, adopting packaging resin as packaging materials to perform injection molding encapsulation in the plastic package shell, and finally placing the whole structure in an oven for heating and curing.
Specifically, the thickness of the graphene-based film attached in the step 1.1 is 50-60 μm.
Specifically, step 1.2 grows a single-layer graphene film on a copper layer on the underlying copper-clad ceramic substrate.
The invention has the following advantages:
1. the invention adopts an advanced packaging form of flip-chip mounting of the driving chip and the power chip, connects the grid electrode of the IGBT chip with the output signal end of the driving chip through the DBC lining plate, replaces bonding wires between the chips and the substrate, and improves the reliability of the module;
2. according to the invention, the substrate is assisted by the high-heat-conductivity graphene material to dissipate heat, so that the problem of module failure caused by overhigh local temperature of a chip is solved, the service life of the module is prolonged, and the high-efficiency heat dissipation of the IPM module is a very effective thermal management scheme.
Drawings
Fig. 1 is a schematic diagram of an advanced packaging structure of a graphene-based IPM module according to the present invention.
Fig. 2 is a schematic diagram of an application area of a copper layer on an upper DBC liner of graphene according to the present invention.
Fig. 3 is a schematic diagram of an application area of the copper layer on the lower DBC liner of the graphene of the present invention.
Fig. 4 is a schematic diagram of the chip/interconnect layer/substrate structure in step 2 of the process of the present invention.
Fig. 5 is a schematic diagram of the structure of the buffer pad/solder layer/substrate in step 3 of the process of the present invention.
Fig. 6 is a schematic diagram of the structure described in step 5 of the process of the present invention.
Fig. 7 is a schematic diagram of the structure described in step 6 of the process of the present invention.
Fig. 8 is a schematic diagram of the thermally conductive silicone grease layer/heat spreader in step 7 of the process of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and examples.
The invention provides an advanced packaging structure of a graphene-based IPM module, which generally comprises an IGBT chip, a fast recovery diode (Fast Recovery Diode, FRD) chip, a driving chip, a graphene-based DBC lining board (namely a graphene-based copper-clad ceramic substrate), a buffer gasket, a solder layer, solder balls, a plastic package shell, packaging resin, heat-conducting silicone grease and a radiator. The upper graphene-based DBC liner 17 is obtained by attaching a graphene-based film prepared by a redox method to a graphene application area designed on the surface of an upper copper layer of a copper-clad ceramic substrate, and the lower graphene-based DBC liner 18 is obtained by growing a graphene film by a chemical vapor deposition method to a graphene application area designed on the surface of an upper copper layer of another copper-clad ceramic substrate.
Wherein the signals of the driver chip 22 are transmitted to the upper copper layer of the lower graphene-based DBC liner 18 through the front side solder ball group 24, see fig. 1. The back surfaces of the first IGBT chip 11 and the first FRD chip 21 are connected to the second buffer pad 14 through the first solder layer 13, and then are connected with the upper surface of the upper copper layer of the upper graphene-based DBC liner 17 through the second solder layer 15, and the front surfaces of the first IGBT chip 11 and the first FRD chip 21 are respectively connected with the upper surface of the upper copper layer of the lower graphene-based DBC liner 18 through the third solder layer 12.
Similarly, in fig. 1, the back sides of the second IGBT chip 25 and the second FRD chip 26 are connected to the third buffer pad 27 through the first solder layer 13, and then connected to the upper surface of the upper copper layer of the upper graphene-based DBC liner 17 through the second solder layer 15, and the front sides of the second IGBT chip 25 and the second FRD chip 26 are respectively connected to the upper surface of the upper copper layer of the lower graphene-based DBC liner 18 through the third solder layer 12.
The lower copper layer lower surface of the lower graphene-based DBC liner 18 is connected to the upper surface of the second heat spreader 20 through the fourth solder layer 16, and the lower copper layer lower surface of the upper graphene-based DBC liner 17 is connected to the upper surface of the first heat spreader 10 through the thermally conductive silicone grease layer 19. The driving chip 22, the first IGBT chip 11, the first FRD chip 21, the second IGBT chip 25, the second FRD chip 26, and the upper and lower graphene-based DBC liners are encapsulated with a plastic case 28, and an encapsulation resin 29 is used as an injection molding encapsulation material.
As shown in fig. 2 and 3, the upper graphene-based copper-clad ceramic substrate 17 is provided with graphene application areas 111, 112 and 113 at positions corresponding to the back surfaces of the driving chip 22, the IGBT chip and the fast recovery diode chip, respectively; since many lines are arranged below the front surface of the driving chip 22, the graphene layer is inconvenient to be made, and therefore, the graphene application areas 121 and 122 are only designed at positions corresponding to the front surfaces of the IGBT chips and the fast recovery diode chips on the lower graphene-based copper-clad ceramic substrate 18, and the gate areas of the IGBT chips are avoided. As can be seen from fig. 3, one IGBT chip and one fast recovery diode chip are divided into one group, and the two groups of chips and the wiring are uniformly arranged around the driving chip 22.
The invention also provides a processing technology of the advanced packaging structure of the graphene-based IPM module, which comprises the following specific steps:
In step 1, graphene application areas 111, 112 and 113 are designed on the upper surface of the upper copper layer of the first DBC liner, as shown in fig. 2. Because the upper graphene-based DBC lining plate 17 is connected with the back surfaces of the driving chip and the power chip, and the buffer gasket is arranged in the middle, the thermal capacity of the graphene material is more important than the thermal conductivity when the graphene material is applied in the place, and therefore, graphene-based films with the thickness of 50-60 mu m prepared by a redox method are attached to the areas 111, 112 and 113 shown in fig. 2, and are dried for standby, so that the upper graphene-based DBC lining plate 17 is obtained.
The upper surface of the copper layer on the second DBC liner is designed with graphene application areas 121 and 122, as shown in fig. 3. Because the lower graphene-based DBC liner 18 is connected to the front sides of the power chip and the driving chip, the graphene material needs a higher transverse heat conduction coefficient when applied here, so that the heat of the local hot spot on the substrate is rapidly and transversely spread, and a single-layer graphene film is grown in the graphene application area by a chemical vapor deposition method, so that the lower graphene-based DBC liner 18 is obtained.
And 2, coating a third solder layer 12 with the thickness of 100-110 mu m on the corresponding position of the power chip on the upper surface of the upper copper layer of the lower graphene-based DBC lining board 18, and placing a solder ball group 24 on the corresponding position of the driving chip 22, wherein the solder balls are made of tin-silver-copper alloy, and the diameter is about 500+/-5 mu m. As shown in fig. 4, the first IGBT chip 11, the first FRD chip 21, the second IGBT chip 25, the second FRD chip 26, and the driving chip 22 are respectively attached upside down to the corresponding positions on the upper surface of the upper copper layer of the lower graphene-based DBC liner 18.
Step 3, a second solder layer 15 with a thickness of 100-110 μm is coated on the corresponding position of the upper copper layer of the upper graphene-based DBC liner 17, and the first buffer pad 23, the second buffer pad 14 and the third buffer pad 27 are respectively attached to the upper copper layer of the upper graphene-based DBC liner 17, as shown in fig. 5. The buffer pad used here may be a thermal stress buffer material with a small thermal expansion coefficient, such as a molybdenum pad or a molybdenum/silver composite pad with a thickness of 0.8±0.05 mm.
Step 4a first solder layer 13 with a thickness of 100-110 μm is coated on the back surfaces of the first IGBT chip 11, the first FRD chip 21, the second IGBT chip 25, the second FRD chip 26 and the driving chip 22, respectively.
Step 2 and step 3 are not sequential here.
And 5, inversely mounting the structure in the step 3 on the structure in the step 4, so that the buffer gaskets are respectively attached to the first solder layers 13 on the chip, as shown in fig. 6.
Step 6, a fourth solder layer 16 with the thickness of 100-110 μm is coated on the corresponding position of the upper surface of the second radiator 20, the structure in step 5 is attached to the upper surface of the fourth solder layer 16, as shown in fig. 7, all signal extraction terminals are attached to a lead frame (not shown in the figure) through solder with the thickness of 100-110 μm, and the lead frame is placed into a reflow soldering machine for soldering according to a preset temperature curve. The welding temperature conditions may be designed according to the actual effect.
Step 7, a heat conduction silicone grease layer 19 with the thickness of 50+/-5 μm is coated on the upper surface of the first radiator 10, as shown in fig. 8, and is inversely attached to the corresponding position of the lower surface of the lower copper layer of the upper graphene-based DBC liner 17, so that all structures are positioned between the first radiator 10 and the second radiator 20.
Step 8, packaging all structures between the first radiator 10 and the second radiator 20 by using a plastic shell 28, performing injection molding and encapsulation by using packaging resin 29, placing the whole structure shown in fig. 1 in an oven at a heating rate of 3 ℃/min, heating from room temperature to 80 ℃, preserving heat for 30 minutes, and then heating to 120 ℃ and preserving heat for 1 hour to perform solidification. The curing conditions may be adjusted according to the actual effect.
The above flow is the case of simultaneously including the first IGBT chip 11, the first FRD chip 21, the second IGBT chip 25, and the second FRD chip 26, if only a single group of IGBT chips and FRD chips are included, only the mounting process of the other group of IGBT chips and FRD chips and their associated structures is required to be deleted, that is, the portions related to reference numerals 25 to 27 are deleted.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (7)
1. An advanced packaging structure of a graphene-based IPM module is characterized by comprising an upper graphene-based copper-clad ceramic substrate (17), a lower graphene-based copper-clad ceramic substrate (18) and a driving chip (22); the upper graphene-based copper-clad ceramic substrate (17) is obtained by attaching a graphene-based film prepared by an oxidation-reduction method to a graphene application area designed on the surface of an upper copper layer of the upper copper-clad ceramic substrate, and the lower graphene-based copper-clad ceramic substrate (18) is obtained by growing a graphene film on the graphene application area designed on the surface of an upper copper layer of the lower copper-clad ceramic substrate by a chemical vapor deposition method;
The front surface of the driving chip (22) is downwards connected to the upper surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate (18) through a welding ball group (24), and the back surface of the driving chip (22) is connected to the lower surface of the first buffer gasket (23) through a first welding material layer (13);
The upper surface of the first buffer gasket (23) is connected with the surface of the upper copper layer of the inverted upper graphene-based copper-clad ceramic substrate (17) through a second solder layer (15);
further comprises: the first IGBT chip (11) and the first fast recovery diode chip (21) are connected to the upper copper layer surface of the lower graphene-based copper-clad ceramic substrate (18) through a third solder layer (12) with the front surfaces of the first IGBT chip (11) and the first fast recovery diode chip (21) facing downwards; the back surfaces of the first IGBT chip (11) and the first fast recovery diode chip (21) are connected with the second buffer pad (14) through the first solder layer (13); the second buffer gasket (14) is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate (17) through a second solder layer (15);
Further comprises: the second IGBT chip (25) and the second fast recovery diode chip (26) are connected to the upper copper layer surface of the lower graphene-based copper-clad ceramic substrate (18) through a third solder layer (12) with the front surfaces of the second IGBT chip (25) and the second fast recovery diode chip (26) facing downwards; the back surfaces of the second IGBT chip (25) and the second fast recovery diode chip (26) are connected with a third buffer pad (27) through a first solder layer (13); the third buffer gasket (27) is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate (17) through the second solder layer (15);
The upper graphene-based copper-coated ceramic substrate (17) is respectively provided with a graphene application area at the positions corresponding to the back surfaces of the driving chip (22), the IGBT chip and the fast recovery diode chip, and the lower graphene-based copper-coated ceramic substrate (18) is respectively provided with a graphene application area at the positions corresponding to the front surfaces of the IGBT chip and the fast recovery diode chip and avoids the grid electrode area of the IGBT chip.
2. The advanced packaging structure of graphene-based IPM module according to claim 1, wherein the thickness of the graphene-based thin film on the upper graphene-based copper-clad ceramic substrate (17) is 50-60 μm.
3. The advanced packaging structure of graphene-based IPM module according to claim 1, wherein a single layer of graphene film is grown on the lower graphene-based copper-clad ceramic substrate (18) by chemical vapor deposition.
4. The advanced packaging structure of graphene-based IPM module according to any one of claims 1-3, further comprising:
The first radiator (10) is closely attached to the lower surface of the lower copper layer of the upper graphene-based copper-clad ceramic substrate (17) through a heat conduction silicone grease layer (19);
the second radiator (20) is closely attached to the lower surface of the lower copper layer of the lower graphene-based copper-clad ceramic substrate (18) through a fourth solder layer (16);
a plastic package shell (28) is arranged between the first radiator (10) and the second radiator (20), and all elements except the radiator are packaged in the plastic package shell; the plastic package shell (28) is internally encapsulated by encapsulation resin (29).
5. The processing technology of the advanced packaging structure of the graphene-based IPM module is characterized by comprising the following steps of:
Step 1, manufacturing a graphene-based copper-clad ceramic substrate structure, which comprises the following steps:
Step 1.1, attaching a graphene-based film prepared by an oxidation-reduction method to a graphene application area designed on the upper surface of a copper layer on a first copper-clad ceramic substrate, and drying for later use to obtain an upper graphene-based copper-clad ceramic substrate (17);
Step 1.2, growing a graphene film on a graphene application area designed on the upper surface of a copper layer on a second copper-clad ceramic substrate by using a chemical vapor deposition method to obtain a lower graphene-based copper-clad ceramic substrate (18);
Step 2, respectively coating a third solder layer (12) and placing a solder ball group (24) on the position, where a chip needs to be mounted, of the upper surface of the lower graphene-based copper-clad ceramic substrate (18), respectively inversely mounting a first IGBT chip (11), a first fast recovery diode chip (21), a second IGBT chip (25) and a second fast recovery diode chip (26) on the corresponding position of the upper surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate (18), inversely mounting a driving chip (22) on the solder ball group (24) of the upper copper layer of the lower graphene-based copper-clad ceramic substrate (18);
Step 3, coating a first solder layer (13) on the back surfaces of the driving chip (22), the first IGBT chip (11), the first fast recovery diode chip (21), the second IGBT chip (25) and the second fast recovery diode chip (26);
step 4, coating a second solder layer (15) on the upper graphene-based copper-clad ceramic substrate (17), and respectively attaching a first buffer gasket (23), a second buffer gasket (14) and a third buffer gasket (27);
Step 5, inversely mounting the structure obtained in the step 4 on the structure obtained in the step3, so that the first buffer gasket (23), the second buffer gasket (14) and the third buffer gasket (27) are attached to the first solder layer (13);
The front sides of the first IGBT chip (11) and the first fast recovery diode chip (21) are downwards connected to the surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate (18) through a third solder layer (12); the back surfaces of the first IGBT chip (11) and the first fast recovery diode chip (21) are connected with the second buffer pad (14) through the first solder layer (13); the second buffer gasket (14) is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate (17) through a second solder layer (15);
The second IGBT chip (25) and the second fast recovery diode chip (26) are connected to the surface of the upper copper layer of the lower graphene-based copper-clad ceramic substrate (18) through a third solder layer (12) with the front face facing downwards; the back surfaces of the second IGBT chip (25) and the second fast recovery diode chip (26) are connected with a third buffer pad (27) through a first solder layer (13); the third buffer gasket (27) is connected with the surface of the upper copper layer of the upper graphene-based copper-clad ceramic substrate (17) through the second solder layer (15);
step 6, coating a fourth solder layer (16) on the upper surface of the second radiator (20), attaching the structure obtained in the step 5 to the upper surface of the fourth solder layer (16), and putting the structure into a reflow soldering machine for soldering;
Step 7, coating a heat conduction silicone grease layer (19) on the upper surface of the first radiator (10), and inversely attaching the heat conduction silicone grease layer on the corresponding position of the lower surface of the lower copper layer of the upper graphene-based copper-clad ceramic substrate (17) so that all structures are positioned between the first radiator (10) and the second radiator (20);
And 8, packaging all structures between the two radiators by using a plastic package shell (28), performing injection molding encapsulation in the plastic package shell (28) by using packaging resin (29) as a packaging material, and finally, placing the whole structure in an oven for heating and curing.
6. The process of claim 5, wherein the thickness of the graphene-based thin film attached in step 1.1 is 50-60 μm.
7. The process of claim 5, wherein step 1.2 comprises growing a single layer of graphene film on a copper layer on an underlying copper-clad ceramic substrate.
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