CN109412709A - Signal receiving/transmission device and its bearing calibration - Google Patents
Signal receiving/transmission device and its bearing calibration Download PDFInfo
- Publication number
- CN109412709A CN109412709A CN201710707190.4A CN201710707190A CN109412709A CN 109412709 A CN109412709 A CN 109412709A CN 201710707190 A CN201710707190 A CN 201710707190A CN 109412709 A CN109412709 A CN 109412709A
- Authority
- CN
- China
- Prior art keywords
- fundamental frequency
- frequency path
- circuit
- mode
- receiver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/10—Monitoring; Testing of transmitters
- H04B17/11—Monitoring; Testing of transmitters for calibration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Signal receiving/transmission device includes transceiver circuit, switching circuit, compensation circuit and correcting circuit.Transceiver circuit includes transmitter and receiver.Switching circuit has the first set-up mode and the second set-up mode, and wherein transmitter is coupled to receiver via switching circuit.The output of compensation circuit analysis receiver is to obtain the first analysis result and the second analysis result, and multiple first penalty coefficients and multiple second penalty coefficients are generated according to the first analysis result and the second analysis result, wherein the first analysis result corresponds to the first set-up mode, and the second analysis result corresponds to the second set-up mode.Correcting circuit corrects transmitter according to those first penalty coefficients, and corrects receiver according to those second penalty coefficients.
Description
Technical field
The present invention relates to a kind of signal receiving/transmission devices, and the unmatched correction in channel of in particular to transmitter and receiver
Mechanism and method.
Background technique
The circuit of communications applications is common in various electronic devices.In order to correctly send or receive data, transceiver
Mismatch needs between the channel of circuit are corrected.In the prior art, the unmatched correction mechanism in the channel of transmitter is logical
It is often independent with the unmatched correction mechanism in the channel of receiver.In other words, in the prior art, for single transceiver electricity
Road needs to configure two groups of independent correcting circuits at least to correct transmitter and receiver respectively.
Summary of the invention
To solve the above problems, an aspect of the invention is in providing a kind of signal receiving/transmission device.Signal receiving/transmission device packet
Containing transceiver circuit, switching circuit, compensation circuit and correcting circuit.Transceiver circuit includes transmitter and receiver.It cuts
Circuit is changed with the first set-up mode and the second set-up mode, wherein transmitter is coupled to receiver via switching circuit.It mends
Circuit is repaid to analyze the output of receiver to obtain the first analysis result and the second analysis as a result, and tying according to the first analysis
Fruit and the second analysis result generate multiple first penalty coefficients and multiple second penalty coefficients, wherein the first analysis result pair
Should be in the first set-up mode, and the second analysis result corresponds to the second set-up mode.Correcting circuit is to according to those the first benefits
Coefficient correction transmitter is repaid, and corrects receiver according to those second penalty coefficients.
An aspect of the invention is in providing a kind of signal receiving/transmission device.Signal receiving/transmission device includes transceiver circuit, mends
Repay circuit and correcting circuit.Transceiver circuit includes transmitter and receiver.Transmitter includes the first in-phase signal fundamental frequency
Path and the first orthogonal signalling fundamental frequency path, and receiver includes the second in-phase signal fundamental frequency path and the second orthogonal signalling
Fundamental frequency path.Compensation circuit generates to the first analysis result according to the output for being associated with receiver with the second analysis result more
A first penalty coefficient and multiple second penalty coefficients.Compensation circuit in the first in-phase signal fundamental frequency path more to be coupled to
Second in-phase signal fundamental frequency path, and when the first orthogonal signalling fundamental frequency path is coupled to the second orthogonal signalling fundamental frequency path, obtains
One analysis is as a result, and be coupled to the second orthogonal signalling fundamental frequency path, and the first orthogonal signalling in the first in-phase signal fundamental frequency path
Fundamental frequency path obtains the second analysis result when being coupled to the second in-phase signal fundamental frequency path.Correcting circuit to according to those first
Penalty coefficient corrects the mismatch between the first in-phase signal fundamental frequency path and the first orthogonal signalling fundamental frequency path, and according to those
Second penalty coefficient corrects the mismatch between the second in-phase signal fundamental frequency path and the second orthogonal signalling fundamental frequency path.
An aspect of the invention is in providing a kind of bearing calibration, and it includes following operations: passing through switching circuit coupling hair
Emitter is to receiver, and wherein switching circuit has the first set-up mode and the second set-up mode；Analyze receiver output with
The first analysis result and the second analysis are obtained as a result, wherein the first analysis result corresponds to the first set-up mode, and second point
It analyses result and corresponds to the second set-up mode；And multiple first compensation are generated with the second analysis result according to the first analysis result and are
Several and multiple second penalty coefficients, to correct transmitter and receiver respectively.
Detailed description of the invention
Detailed description of the invention of the invention is as follows:
Fig. 1 is a kind of schematic diagram of signal receiving/transmission device according to depicted in some embodiments of the invention；
Fig. 2 is the schematic diagram of the correcting circuit according to depicted in some embodiments of the invention as shown in figure 1；
Fig. 3 A is that the signal receiving/transmission device of Fig. 1 according to depicted in some embodiments of the present invention operates in the first setting side
The schematic diagram of formula；
Fig. 3 B is that the signal receiving/transmission device of Fig. 1 according to depicted in some embodiments of the present invention operates in the second setting side
The schematic diagram of formula；And
Fig. 4 is a kind of flow chart of bearing calibration according to depicted in some embodiments of the invention.
Description of symbols:
100: signal receiving/transmission device 110: transmitter
120: receiver 130: switching circuit
140: compensation circuit 150: correcting circuit
RF-OUT: signal RF-IN: signal
111-I: digital to analog converter 111-Q: digital to analog converter
112-I, 112-Q: baseband circuit 114: adder
113-I, 113-Q: frequency mixer 116: power amplifier
115: driver 121-I: analog-to-digital converter
121-Q: analog-to-digital converter 122-I, 122-Q: baseband circuit
124: low-noise amplifier 123-I, 123-Q: frequency mixer
VC: control signal IR-I, IR-Q: output signal
141: referring to coefficient generation circuit xt、yt、xr、yr: penalty coefficient
x1、x2、y1、y2: refer to coefficient 142: processing circuit
IT-I, IT-Q: input signal 150-T, 150-R: counting circuit
T1, T2: multiplier R1, R2: multiplier
T3, R3: adder SC1, SC2, SC3: correction signal
SC4, SC5: correction signal bearing calibration: 400
S410~S460: operation
Specific embodiment
Referring to Fig.1, Fig. 1 is a kind of schematic diagram of signal receiving/transmission device 100 according to depicted in some embodiments of the invention.
Signal receiving/transmission device 100 includes transceiver circuit (it includes transmitter 110 and receivers 120), switching circuit 130, compensation electricity
Road 140 and correcting circuit 150.In some embodiments, signal receiving/transmission device 100, which can be used to emit, has rf frequency (radio
Frequency signal RF-OUT or reception) has the signal RF-IN of rf frequency.
In some embodiments, transmitter 110 includes multiple digital to analog converters (DAC) 111-I and 111-Q, more
A baseband circuit 112-I and 112-Q, multiple frequency mixer 113-I and 113-Q, adder 114, driver 115 and power amplifier
116.Multiple DAC 111-I and 111-Q are based respectively on multiple input signal IT-I and IT-Q and generate corresponding multiple analog signals
(not being painted) is operated to multiple baseband circuit 112-I and 112-Q with carrying out subsequent mixing operation and transmitting.In some embodiments
In, multiple baseband circuit 112-I and 112-Q can be realized by filter circuit.
In some embodiments, receiver 120 includes multiple analog-to-digital converters (ADC) 121-I and 121-Q, more
A baseband circuit 122-I and 122-Q, multiple frequency mixer 123-I and 123-Q and low-noise amplifier 124.Multiple ADC 112-I
And 112-Q respectively according to low-noise amplifier 124, multiple frequency mixer 123-I and 123-Q and multiple baseband circuit 122-I and
Multiple signals handled by 122-Q generate multiple output signal IR-I and IR-Q.In some embodiments, multiple baseband circuits
122-I and 122-Q can be realized by filter circuit.
In some embodiments, DAC 111-I and the equivalent same phase (in- for forming transmitter 110 of baseband circuit 112-I
Phase) signal fundamental frequency path, and the equivalent formation transmitter 110 of DAC 111-Q and baseband circuit 112-Q is orthogonal
(quadrature) signal fundamental frequency path.In some embodiments, ADC 121-I and the equivalent formation of baseband circuit 122-I are received
The in-phase signal fundamental frequency path of device 120, and the equivalent orthogonal signalling for forming receiver 120 of ADC 121-Q and baseband circuit 122-Q
Fundamental frequency path.Ideally, the signal on in-phase signal fundamental frequency path has 90 degree of phase with the signal in orthogonal signalling fundamental frequency path
Potential difference.
In convenient for explanation, in this article, the in-phase signal fundamental frequency path of transmitter 110 is known as path TX-I, and transmitter
110 orthogonal signalling fundamental frequency path is known as path TX-Q.The in-phase signal fundamental frequency path of receiver 120 is known as path RX-I, and
The orthogonal signalling fundamental frequency path of receiver 120 is known as path RX-Q.
In some embodiments, switching circuit 130 can be realized by multiple switch.Switching circuit 130 according to control to believe
Number VC and selectively use the first set-up mode or the second set-up mode, to couple transmitter 110 to receiver 120.For example,
When operating in the first set-up mode, it is defeated to baseband circuit 122-I that switching circuit 130 couples the output of baseband circuit 112-I
Enter and couple the input for being input to baseband circuit 122-Q of baseband circuit 112-Q.Alternatively, when operating in the second set-up mode,
Switching circuit 130 couple baseband circuit 112-I output to baseband circuit 122-Q input and couple baseband circuit 112-Q's
It is input to the input of baseband circuit 122-I.
In other words, when switching circuit 130 operates in the first set-up mode, path TX-I is coupled to path RX-I, and road
Diameter TX-Q is coupled to path RX-Q.Alternatively, path TX-I is coupled to road when switching circuit 130 operates in the second set-up mode
Diameter RX-Q, and path TX-Q is coupled to path RX-I.
In some embodiments, compensation circuit 140 includes to according to the first analysis result and the second analysis result difference
Generate multiple penalty coefficient xtWith ytAnd multiple penalty coefficient xrWith yr。
For example, compensation circuit 140 includes to refer to coefficient generation circuit 141 and processing circuit 142.In the first setting, i.e.,
Path TX-I is coupled to path RX-I, and when path TX-Q is coupled to path RX-Q (as shown in rear Fig. 3 A), generates with reference to coefficient
Circuit 141 is to carry out spectrum analysis (for example, Fourier transform) to multiple output signal IR-I and IR-Q, to calculate association
In the reference coefficient x of the first analysis result1With reference coefficient y1.Alternatively, i.e. path TX-I is coupled to path in the second setting
RX-Q, and when path TX-Q is coupled to path RX-I (as shown in rear Fig. 3 B), with reference to coefficient generation circuit 141 to multiple defeated
Signal IR-I and IR-Q carries out spectrum analysis out, to calculate the reference coefficient x for being associated with the second analysis result2With reference coefficient y2。
In this way, which processing circuit 142 can refer to coefficient x according to multiple1And y1Calculate multiple penalty coefficient xtWith yt, and according to multiple
With reference to coefficient x2And y2Calculate multiple penalty coefficient xrWith yr.In addition, with reference to coefficient generation circuit 141 more ginseng is having been calculated
Examine coefficient x1With y1Or refer to coefficient x2With y2Output control signal VC afterwards, to adjust the set-up mode of switching circuit 130.
In some embodiments, Related Cases (United States Patent (USP) Shen can refer to reference to the implementation of coefficient generation circuit 141
Please number US 14/724,781) spectrum analyzer circuit (spectrum analyzing circuit) and correction coefficient calculate it is single
The explanation of first (calibration coefficient calculating unit) therefore can with reference to coefficient generation circuit 141
It generates and refers to coefficient x1With y1And refer to coefficient x2With y2, repeated no more in this.It above are only example, other are various to can be used for school
Unmatched circuit and/or algorithm between just same phase and quadrature signal paths are all the range that the present invention is covered.
Correcting circuit 150 includes counting circuit 150-T and 150-R.Counting circuit 150-T be coupled to processing circuit 142 with
Receive multiple penalty coefficient xtWith yt.Counting circuit 150-T is coupled to path TX-I and TX-Q, and according to multiple penalty coefficient xt
With ytCorrect the mismatch between the path TX-I and TX-Q of transmitter 110.Counting circuit 150-R is coupled to processing circuit 142
To receive multiple penalty coefficient xrWith yr.Counting circuit 150-R is coupled to path RX-I and RX-Q, and according to multiple penalty coefficients
xrWith yrCorrect the mismatch between the path RX-I and RX-Q of receiver 120.Explanation herein will in subsequent paragraph arrange in pairs or groups Fig. 2,
Fig. 3 A and Fig. 3 B explanation.
Referring to Fig. 2.Fig. 2 is the schematic diagram of correcting circuit 150 as shown in figure 1 according to depicted in some embodiments of the invention.Such as
Shown in Fig. 2, counting circuit 150-T includes multiplier T1, multiplier T2 and adder T3.Multiplier T1 is to according to penalty coefficient
xtAnd input signal IT-I generates the DAC 111-I of correction signal SC1 to Fig. 1, to carry out subsequent processing.Multiplier T2 is to root
According to penalty coefficient ytAnd input signal IT-I generates correction signal SC2.Adder T3 is to according to input signal IT-Q and correction
Signal SC2 generates correction signal SC3, and the DAC 111-Q of output calibration signal SC3 to Fig. 1, to carry out subsequent processing.It is equivalent
For, after handling via counting circuit 150-T, the mismatch between path TX-I and path TX-Q is compensated.
Furthermore counting circuit 150-R includes multiplier R1, multiplier R2 and adder R3.Multiplier R1 is coupled to ADC
121-I, and to according to penalty coefficient xrAnd the output of ADC 121-I generates correction signal SC4.Multiplier R2 is coupled to ADC
121-Q, and to according to penalty coefficient yrAnd the output of ADC 121-Q generates correction signal SC5.Adder R3 is to according to school
Positive signal SC4 and SC5 generate output signal IR-I.In addition, the output of ADC 121-Q is directly as output signal IR-Q.It is equivalent
For, after the processing by counting circuit 150-R, the mismatch between path RX-I and RX-Q is compensated.
Following paragraphs is by the embodiment of the processing circuit 142 of explanatory diagram 1, but the present invention is not limited thereto.Some
In the discussion of the relevant technologies, if (gain/phase between such as TX-I and TX-Q is not when above-mentioned gain mismatch and phase mismatch
Matching or gain/phase between RX-I and RX-Q mismatch) when being known, penalty coefficient X (for example, x of Fig. 2tOr xr) can
To be derived as X=1/ ((1+G) * cos (P)), and penalty coefficient Y (for example, y of Fig. 2tOr yr) it can be derived as Y=tan (P),
Wherein G is gain mismatch, and P is phase mismatch.For example, when the input signal IT-I and IT-Q of Fig. 2 are respectively (1+
G)cos(ωt+Pt) and when sin (ω t), corresponding penalty coefficient xtAnd ytRespectively 1/ ((1+G) * cos (P)) and tan
(P).It is noted that since mismatch of the invention is the-and U.S. Patent Application No. US 14/724,781 in fundamental frequency path
In mismatch at frequency mixer (mixer), therefore, Y=tan of the invention (P) and U.S. Patent Application No. US 14/724,
Y in 781 differs a negative sign.Although one negative sign of difference, some due to U.S. Patent Application No. US 14/724,781
Correction coefficient calculation in embodiment is to calculate X and Y with regard to the output of spectrum analyzer circuit, therefore, is generated with reference to coefficient
Circuit 141 can be realized by correction coefficient calculation and spectrum analyzer circuit.
Therefore, for the framework of Fig. 2, penalty coefficient xt、yt、xrAnd yrFollowing formula (1)~(4) can be derived as,
It is G that gain between middle path TX-I and TX-Q, which mismatches,t, and it is P that the phase between it, which mismatches,t.Path RX-I and RX-Q it
Between gain mismatch be Gr, and it is P that the phase between it, which mismatches,r。
yt=tan (Pt)…(2)
yr=tan (Pr)…(4)
It is received referring to Fig. 3 A, Fig. 3 A signal for being Fig. 1 according to depicted in some embodiments of the present invention
Transmitting apparatus 100 operates in the schematic diagram of the first set-up mode.In Fig. 3 A, path TX-I is via switching circuit 130
It is coupled to path RX-I, and path TX-Q is coupled to path RX-Q via switching circuit 130.With this condition, it is produced with reference to coefficient
The reference coefficient x that raw circuit 141 generates1With reference coefficient y--1It can push away as following formula (5) and (6):
It is operated referring to Fig. 3 B, Fig. 3 B signal receiving/transmission device 100 for being Fig. 1 according to depicted in some embodiments of the present invention
In the schematic diagram of the second set-up mode.In Fig. 3 B, path TX-I is coupled to path RX-Q, and path via switching circuit 130
TX-Q is coupled to path RX-I via switching circuit 130.With this condition, the referential generated with reference to coefficient generation circuit 141
Number x2With reference coefficient y2It can push away as following formula (7) and (8):
By formula (2), (4), (6) and (8), when phase mismatches (i.e. PtWith Pr) it is little when, can be derived from penalty coefficient ytAnd
Penalty coefficient yrFor following formula (9) and (10):
By formula (1), (3), (5), (7) and transformation of variable, when gain mismatches (i.e. GtWith Gr) it is little when, can be derived from benefit
Repay coefficient xtAnd penalty coefficient xrFor following formula (11) and (12):
It is multiple to refer to coefficient x in formula (9)~(12)1、x2、y1And y2It can be produced by the reference coefficient generation circuit 141 of Fig. 1
It is raw.Accordingly, processing circuit 142 can be designed according to formula (9)~(12).For example, in some embodiments, processing circuit 142 can be by
Execution formula (9)~(12) processor, digital circuit or special application integrated circuit are realized, to generate multiple penalty coefficient xt、
yt、xrAnd yr.Alternatively, processing circuit 142 can be real by execution formula (9)~(12) algorithm or software in other embodiments
It is existing.The various implementations of processing circuit 142 are all the range that the present invention is covered.
It is a kind of flow chart of bearing calibration 400 according to depicted in some embodiments of the invention referring to Fig. 4, Fig. 4.It is easy
In explanation, together referring to Fig.1, to illustrate the relevant operation of signal receiving/transmission device 100.In some embodiments, bearing calibration 400
Include multiple operation S410~S460.
In operation S410, switching circuit 130 couples path TX-I to path RX-I according to control signal VC, and couples path
TX-Q to path RX-Q.In operation S420, with reference to coefficient generation circuit 141 analyze output signal IR-I and output signal IR-Q with
It generates and refers to coefficient x1With reference coefficient y1。
For example, as shown in Figure 3A, the output of baseband circuit 112-I is coupled to baseband circuit 122-I's through switching circuit 130
Input, and the output of baseband circuit 112-Q is coupled to the input of baseband circuit 122-Q through switching circuit 130.In under this condition,
It can generate accordingly with reference to coefficient generation circuit 141 with reference to coefficient x1With reference coefficient y1。
In operation S430, switching circuit 130 couples path TX-I to path RX-Q according to control signal VC, and couples path
TX-Q to path RX-I.In operation S440, with reference to coefficient generation circuit 141 analyze output signal IR-I and output signal IR-Q with
It generates and refers to coefficient x2With reference coefficient y2。
For example, as shown in Figure 3B, the output of baseband circuit 112-I is coupled to baseband circuit 122-Q's through switching circuit 130
Input, and the output of baseband circuit 112-Q is coupled to the input of baseband circuit 122-I through switching circuit 130.In under this condition,
It can generate accordingly with reference to coefficient generation circuit 141 with reference to coefficient x2With reference coefficient y2。
In operation S450, processing circuit 142 refers to coefficient x according to multiple1、x2、y1With y2Generate multiple penalty coefficient xt、
yt、xrAnd yr.For example, processing circuit 142 can be calculated according to previously described formula (9)~(12), to obtain multiple penalty coefficient xt、yt、xr
And yr。
In operation S460, correcting circuit 150 is according to penalty coefficient xtAnd penalty coefficient ytCorrecting route TX-I and path TX-Q
Between mismatch, and according to penalty coefficient xrAnd penalty coefficient yrMismatch between correcting route RX-I and path RX-Q.
For example, as shown in Fig. 2, counting circuit 150-T can be according to penalty coefficient xtAnd penalty coefficient ytTo input signal IT-I
And input signal IT-Q is handled, with the mismatch between correcting route TX-I and path TX-Q.Counting circuit 150-R can root
According to penalty coefficient xrAnd penalty coefficient yrThe output of ADC121-I and ADC 121-Q is handled, with correcting route RX-I and road
Mismatch between diameter RX-Q.
In some embodiments, before being not carried out bearing calibration 400, multiple penalty coefficient xrAnd penalty coefficient xtIt is set as
1, and multiple penalty coefficient yrAnd penalty coefficient ytIt is set as 0, to ensure that signal receiving/transmission device 100 can correct operation.Above-mentioned numerical value
Merely illustrative, the present invention is not limited thereto.
In some embodiments, when executing bearing calibration 400, the input signal IT-I and input signal of transmitter 110
IT-Q is set as the test signal with specific frequency.In some embodiments, after having executed bearing calibration 400, switching electricity
Road 130 is disabled (disable), to cut off the connection relationship between transmitter 110 and receiver 120.Above-mentioned set-up mode is only
For example, but the present invention is not limited thereto.
Multiple steps of above-mentioned bearing calibration 400 are merely illustrative, and non-limiting need to execute according to the sequence in this example.?
Without prejudice under the mode of operation and range of each embodiment of present disclosure, the various operations under bearing calibration 400 are worked as and can be fitted
Locality is increased, replacement, omits or executed with different order.
In it is some in the related technology, the signal of mismatch and receiver between the signal transmission path of transmitter transmits road
Mismatch between diameter is usually separately correction.In other words, in these technologies, the correction mechanism of transmitter and the school of receiver
Positive mechanism is independent of one another.Compared to above-mentioned technology, signal receiving/transmission device 100 is in transmitter 110 and the baseband circuit of receiver 120
Part can share correction mechanism, and generate multiple penalty coefficient x for correcting transmitter 110 respectivelytWith ytAnd it is connect for correcting
Receive multiple penalty coefficient x of device 120rWith yr。
In conclusion signal receiving/transmission device provided by the present invention and bearing calibration can share correction mechanism to correct transmitting
The mismatch of device and receiver.
Although the present invention is disclosed as above with embodiment, so itself and the non-limiting present invention, anyone skilled in the art,
Without departing from the spirit and scope of the present invention, when can make various variation and retouching, therefore protection scope of the present invention is when view
Subject to the attached claims institute defender.
Claims (10)
1. a kind of signal receiving/transmission device, includes:
One transceiver circuit includes a transmitter and a receiver；
One switching circuit has one first set-up mode and one second set-up mode, and wherein the transmitter is via switching electricity
Road is coupled to the receiver；
One compensation circuit, to analyze the output of the receiver with obtain one first analysis result and one second analysis as a result,
And multiple first penalty coefficients and multiple second compensation system are generated according to the first analysis result and the second analysis result
Number, wherein the first analysis result corresponds to first set-up mode, and the second analysis result corresponds to the second setting side
Formula；And
One correcting circuit, to correct the transmitter according to those first penalty coefficients, and according to those the second penalty coefficient schools
The just receiver.
2. signal receiving/transmission device as described in claim 1, wherein the compensation circuit operates in this in the switching circuit and first sets
The mode of setting obtain this first analysis as a result, and the switching circuit operate in second set-up mode obtain this second analysis.
3. signal receiving/transmission device as described in claim 1, wherein the receiver include one first in-phase signal fundamental frequency path with
And one first orthogonal signalling fundamental frequency path, which includes one second in-phase signal fundamental frequency path, in first set-up mode
Under, which is coupled to the first in-phase signal fundamental frequency path through the switching circuit, and this second
Under set-up mode, which is coupled to the first orthogonal signalling fundamental frequency path through the switching circuit.
4. signal receiving/transmission device as claimed in claim 3, wherein the transmitter also includes one second orthogonal signalling fundamental frequency path,
Under first set-up mode, which is coupled to the first orthogonal signalling fundamental frequency through the switching circuit
Path, and under second set-up mode, which is coupled to the first same phase through the switching circuit
Signal fundamental frequency path.
5. a kind of signal receiving/transmission device, includes:
One transceiver circuit, includes a transmitter and a receiver, which includes one first in-phase signal fundamental frequency path
And one first orthogonal signalling fundamental frequency path, and the receiver includes that one second in-phase signal fundamental frequency path and one second are orthogonal
Signal fundamental frequency path；
One compensation circuit, to be produced according to one first analysis result of the output for being associated with the receiver with one second analysis result
Raw multiple first penalty coefficients and multiple second penalty coefficients,
The compensation circuit is somebody's turn to do more to be coupled to the second in-phase signal fundamental frequency path in the first in-phase signal fundamental frequency path
First orthogonal signalling fundamental frequency path first analysis is obtained when being coupled to the second orthogonal signalling fundamental frequency path as a result, and this
One in-phase signal fundamental frequency path is coupled to the second orthogonal signalling fundamental frequency path, and the first orthogonal signalling fundamental frequency path is coupled to
The second analysis result is obtained when the second in-phase signal fundamental frequency path；And
One correcting circuit, it is first orthogonal with this to correct the first in-phase signal fundamental frequency path according to those first penalty coefficients
Mismatch between signal fundamental frequency path, and correct the second in-phase signal fundamental frequency path according to those second penalty coefficients and be somebody's turn to do
Mismatch between second orthogonal signalling fundamental frequency path.
6. signal receiving/transmission device as claimed in claim 5, wherein the first orthogonal signalling fundamental frequency path and the first same phase
Signal fundamental frequency path correspond to the transmitter an at least baseband circuit, and the second orthogonal signalling fundamental frequency path and this second
In-phase signal fundamental frequency path corresponds to an at least baseband circuit for the receiver.
7. a kind of bearing calibration, includes:
By a switching circuit couple a transmitter a to receiver, wherein the switching circuit have one first set-up mode and
One second set-up mode；
The output of the receiver is analyzed to obtain one first analysis result and one second analysis as a result, wherein first analysis is tied
Fruit corresponds to first set-up mode, and the second analysis result corresponds to second set-up mode；And
Multiple first penalty coefficients are generated according to the first analysis result and the second analysis result and multiple second compensation are
Number, to correct the transmitter and the receiver respectively.
8. bearing calibration as claimed in claim 7, wherein the output for analyzing the receiver includes:
When the switching circuit operates in first set-up mode, the output of the receiver is analyzed to obtain the first analysis knot
Fruit；And
When the switching circuit operates in second set-up mode, the output of the receiver is analyzed to obtain the second analysis knot
Fruit.
9. bearing calibration as claimed in claim 7, wherein the receiver includes one first in-phase signal fundamental frequency path and one
First orthogonal signalling fundamental frequency path, which includes one second in-phase signal fundamental frequency path, should under first set-up mode
Second in-phase signal fundamental frequency path is coupled to the first in-phase signal fundamental frequency path through the switching circuit, and in the second setting side
Under formula, which is coupled to the first orthogonal signalling fundamental frequency path through the switching circuit.
10. bearing calibration as claimed in claim 9, wherein the transmitter also includes one second orthogonal signalling fundamental frequency path,
Under first set-up mode, which is coupled to the first orthogonal signalling fundamental frequency road through the switching circuit
Diameter, and under second set-up mode, the second orthogonal signalling fundamental frequency path are coupled to this first with believing through the switching circuit
Number fundamental frequency path.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710707190.4A CN109412709B (en) | 2017-08-17 | 2017-08-17 | Signal receiving and transmitting device and correction method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710707190.4A CN109412709B (en) | 2017-08-17 | 2017-08-17 | Signal receiving and transmitting device and correction method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109412709A true CN109412709A (en) | 2019-03-01 |
| CN109412709B CN109412709B (en) | 2021-11-05 |
Family
ID=65454956
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710707190.4A Active CN109412709B (en) | 2017-08-17 | 2017-08-17 | Signal receiving and transmitting device and correction method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109412709B (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1346544A (en) * | 1999-12-14 | 2002-04-24 | 皇家菲利浦电子有限公司 | Transmitter image suppression in TDD transceivers |
| US20040198340A1 (en) * | 2003-04-02 | 2004-10-07 | Samsung Electronics Co., Ltd. | Self-calibrating apparatus and method in a mobile transceiver |
| CN1713537A (en) * | 2004-06-23 | 2005-12-28 | 瑞昱半导体股份有限公司 | Correcting unit and method for mismatched phase-synchronized signal and orthogonal-phase signal |
| CN101442392A (en) * | 2007-11-20 | 2009-05-27 | 联发科技股份有限公司 | Apparatus, integrated circuit, and method of compensating iq phase mismatch |
| US20090140821A1 (en) * | 2007-12-04 | 2009-06-04 | Electronics And Telecommunications Research Institute | Apparatus and method for compensating carrier feedthrough in quadrature modulation system |
| US20090310711A1 (en) * | 2008-06-16 | 2009-12-17 | Chiu Yung-Ming | Transmitter and receiver capable of reducing in-phase/quadrature-phase (I/Q) mismatch and an adjusting method thereof |
| US20110069767A1 (en) * | 2009-09-23 | 2011-03-24 | Jie Zhu | Methods and systems to compensate iq imbalance in zero-if tuners |
| US20150350000A1 (en) * | 2014-05-29 | 2015-12-03 | Realtek Semiconductor Corp. | Calibration method and calibration apparatus for calibrating mismatch between first signal path and second signal path of transmitter/receiver |
-
2017
- 2017-08-17 CN CN201710707190.4A patent/CN109412709B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1346544A (en) * | 1999-12-14 | 2002-04-24 | 皇家菲利浦电子有限公司 | Transmitter image suppression in TDD transceivers |
| US20040198340A1 (en) * | 2003-04-02 | 2004-10-07 | Samsung Electronics Co., Ltd. | Self-calibrating apparatus and method in a mobile transceiver |
| CN1571270A (en) * | 2003-04-02 | 2005-01-26 | 三星电子株式会社 | Automatic calibration apparatus and method in mobile transceiver |
| CN1713537A (en) * | 2004-06-23 | 2005-12-28 | 瑞昱半导体股份有限公司 | Correcting unit and method for mismatched phase-synchronized signal and orthogonal-phase signal |
| CN101442392A (en) * | 2007-11-20 | 2009-05-27 | 联发科技股份有限公司 | Apparatus, integrated circuit, and method of compensating iq phase mismatch |
| US20090140821A1 (en) * | 2007-12-04 | 2009-06-04 | Electronics And Telecommunications Research Institute | Apparatus and method for compensating carrier feedthrough in quadrature modulation system |
| US20090310711A1 (en) * | 2008-06-16 | 2009-12-17 | Chiu Yung-Ming | Transmitter and receiver capable of reducing in-phase/quadrature-phase (I/Q) mismatch and an adjusting method thereof |
| US20110069767A1 (en) * | 2009-09-23 | 2011-03-24 | Jie Zhu | Methods and systems to compensate iq imbalance in zero-if tuners |
| US20150350000A1 (en) * | 2014-05-29 | 2015-12-03 | Realtek Semiconductor Corp. | Calibration method and calibration apparatus for calibrating mismatch between first signal path and second signal path of transmitter/receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109412709B (en) | 2021-11-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106656902B (en) | Method and apparatus for frequency dependent IQ imbalance compensation | |
| KR101697752B1 (en) | Apparatus and methods for wide bandwidth analog-to-digital conversion of quadrature receive signals | |
| US20150280893A1 (en) | Systems and methods for near band interference cancellation | |
| CN111133692A (en) | Image distortion correction in a wireless terminal | |
| CN108777671B (en) | Compensation method and device of ultra-wideband orthogonal demodulation receiver | |
| CN103329004A (en) | Phased-array receiver, radar system and vehicle | |
| EP3985866A1 (en) | Digital predistortion using coding for phased antenna arrays | |
| CN111771345B (en) | System and method for configurable hybrid self-interference cancellation | |
| CN106936519B (en) | Signal calibration method and device and signal processing system | |
| US11671131B2 (en) | Transmitter circuit, compensation value calibration device and method for calibrating IQ imbalance compensation values | |
| CN105656834A (en) | Digital correction method for IQ channel mismatch of novel broadband receiver | |
| TW201320668A (en) | Low complexity frequency selective IQ mismatch digital RX balancer and TX inverse balancer for non-ideal RF front-end | |
| TWI645687B (en) | Signal transceiver device and calibration method thereof | |
| CN102647373A (en) | Method and device for correcting unmatching of same phase/orthogonal signals in communication circuit | |
| CN102104369B (en) | Complex filter and correction method | |
| CN104124928A (en) | Automatic gain adjustment device and method thereof | |
| CN109412709A (en) | Signal receiving/transmission device and its bearing calibration | |
| US9379929B2 (en) | Phase imbalance calibration | |
| TWI712271B (en) | Apparatus and method for providing fast second order input intercept point calibration based on two tone testing | |
| EP3731430A1 (en) | Device and method for correcting deviation between multiple transmission channels | |
| US10931316B2 (en) | Radio frequency transceiver | |
| US10069670B2 (en) | Transmission and reception circuit, transceiver, and method of correcting time difference of signal | |
| KR100916049B1 (en) | In-phase signal and quadrature signal generator of multi-port network | |
| US8396416B2 (en) | Radio system and a method for relaying radio signals | |
| US11626897B2 (en) | Transmitter circuit, compensation value calibration device and method for calibrating IQ imbalance compensation values |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |