CN108766237B - Drive substrate and display panel - Google Patents
Drive substrate and display panel Download PDFInfo
- Publication number
- CN108766237B CN108766237B CN201810450844.4A CN201810450844A CN108766237B CN 108766237 B CN108766237 B CN 108766237B CN 201810450844 A CN201810450844 A CN 201810450844A CN 108766237 B CN108766237 B CN 108766237B
- Authority
- CN
- China
- Prior art keywords
- signal
- display area
- signal line
- pixel
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application provides a driving substrate and a display panel. The driving substrate comprises a base, at least one first pixel unit row, at least one first signal line, at least one first pixel driving circuit and at least one first compensation capacitor. At least one first pixel unit row is arranged in the special-shaped display area. At least one first signal line is electrically connected with the at least one first pixel unit row in a one-to-one correspondence mode. And the at least one first pixel driving circuit is arranged in the special-shaped non-display area. Each of the first pixel driving circuits includes a signal output module electrically connected to one of the first signal lines. At least one first compensation capacitor is arranged in the special-shaped display area and connected with the first signal line through the signal output module, and the first compensation capacitor is used for increasing the capacitive load of the first signal line. Therefore, the brightness uniformity of the special-shaped display area and the normal display area can be improved, and the appearance can be improved.
Description
Technical Field
The present disclosure relates to display devices, and particularly to a driving substrate and a display panel.
Background
With the continuous development of the mobile phone industry, the screen body of the full-screen mobile phone has the advantages of large screen occupation ratio and narrow frame, the visual effect of a viewer is greatly improved, and the full-screen mobile phone is widely concerned by people.
In the manufacturing process of the full-face screen, the screen body is generally divided into a special-shaped display area and a normal display area. The special-shaped display area is usually provided with special-shaped structures such as slots. Therefore, the number of pixels connected to each signal line in the special-shaped display area is less than that in the normal display area. Therefore, the load of each signal line in the special-shaped display area is smaller than that of each signal line in the normal display area. Thereby causing a difference in delay of driving signals such as pixel scanning in the odd-shaped display area and the normal display area. Due to different delays of driving signals such as pixel scanning of the screen body, the brightness of a special-shaped display area and the brightness of a normal display area of the screen body are different, and normal use is affected.
Disclosure of Invention
In view of this, it is necessary to provide a driving substrate and a display panel for solving the problem of different brightness between the irregular display area and the normal display area.
A drive substrate, comprising:
a substrate including a shaped display area and a shaped non-display area;
at least one first pixel unit row arranged in the special-shaped display area;
at least one first signal line which is electrically connected with the at least one first pixel unit row in a one-to-one correspondence manner;
the first pixel driving circuit is arranged in the special-shaped non-display area and comprises a signal output module and at least one first compensation capacitor, and the at least one first compensation capacitor is connected with the first signal line through the signal output module.
In one embodiment, the signal output module includes:
the control unit comprises a first output end and a second output end and is used for outputting a level control signal;
a first switch unit electrically connected to the first output terminal and the first signal line, respectively, for outputting a first driving signal to the first signal line according to the level control signal;
the second switch unit is electrically connected with the second output end and the first signal line respectively and used for outputting a second driving signal to the first signal line according to the level control signal;
one end of the first compensation capacitor is electrically connected with the first signal line, and the other end of the first compensation capacitor is electrically connected with the first switch unit.
In one embodiment, the first pixel driving circuit further includes at least one second compensation capacitor, one end of the second compensation capacitor is electrically connected to the second switching unit, and the other end of the second compensation capacitor is electrically connected to the second output terminal.
In one embodiment, the second switching unit includes a second transistor, a second storage capacitor;
both ends of the second storage capacitor and both ends of the at least one second compensation capacitor are respectively connected to the second output terminal and the source electrode of the second transistor;
the grid electrode of the second transistor is electrically connected with the second output end;
the drain of the second transistor is electrically connected to the first signal line.
In one embodiment, the first switching unit includes:
a first transistor and a first storage capacitor;
the two ends of the first storage capacitor and the two ends of the at least one first compensation capacitor are respectively connected to the first output end and the first signal line, and the grid electrode of the first transistor is electrically connected with the first output end.
In one embodiment, the first transistor includes an active layer and a gate layer, the gate layer is disposed on a side of the active layer away from the substrate, a first electrode layer is disposed on a side of the gate layer away from the substrate, and the first electrode layer and the gate layer are disposed opposite to each other to form the first storage capacitor.
In one embodiment, the first compensation capacitor includes a second electrode layer and a third electrode layer which are oppositely arranged, and the second electrode layer and the first electrode layer are arranged in the same layer.
In one embodiment, the third electrode layer is disposed in a same layer as the gate layer.
In one embodiment, a first insulating layer is provided between the gate electrode layer and the first electrode layer, and between the second electrode layer and the third electrode layer.
A display panel comprising the driving substrate, the substrate further comprising:
a normal display area provided with a plurality of second pixel driving circuits;
a normal non-display area provided with a plurality of second pixel unit rows,
a plurality of second signal lines, one of the second pixel driving circuits driving one of the second pixel unit rows through one of the second signal lines.
In the driving substrate provided by the present application, after the first compensation capacitor is connected to the first signal line through the signal output module, time used by a rising edge and a falling edge of a signal transmitted by the first signal line and time used by a rising edge and a falling edge of a signal transmitted by the second signal line tend to be the same, so that charging time of the first pixel driving unit and charging time of the second pixel driving unit are the same. Therefore, the light emitting time of the first pixel unit driven by the first pixel driving unit and the light emitting time of the second signal line driven by the second pixel driving unit tend to be consistent, so that the brightness uniformity of the special-shaped display area and the normal display area is improved, and the appearance can be improved. The circuit structure that the first compensation capacitor is connected with the first signal wire through the signal output module is simple, and the production efficiency can be improved.
Drawings
Fig. 1 is a schematic view of a driving substrate according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a first pixel driving circuit according to an embodiment of the present disclosure;
fig. 3 is a cross-sectional view of a first switching unit provided in an embodiment of the present application.
Description of reference numerals:
drive substrate 10
Special-shaped display area 200
Special-shaped non-display area 300
First pixel driving circuit 210
First pixel cell row 280
First insulating layer 430
Second insulating layer 440
Third insulating layer 450
Fourth insulating layer 460
A second row of pixel cells 510
Normal non-display area 700
Second pixel driving circuit 800
First pixel driving unit 810
Second pixel driving unit 820
Detailed Description
Referring to fig. 1-2, an embodiment of the present disclosure provides a driving substrate 10, where the driving substrate 10 includes a base 100, at least one first pixel unit row 280, at least one first signal line 290, and at least one first pixel driving circuit 210. The substrate 100 includes a shaped display area 200 and a shaped non-display area 300. The at least one first signal line 290 is electrically connected to the at least one first pixel unit row 280 in a one-to-one correspondence. The at least one first pixel driving circuit 210 is disposed in the non-display area 300. Each of the first pixel driving circuits 210 further includes at least one first compensation capacitor 400 and a signal output module 220. The signal output module 220 is electrically connected to one of the first signal lines 290. The at least one first compensation capacitor 400 is disposed in the special-shaped display area 200. The first compensation capacitor 400 is connected to the first signal line 290 through the signal output module 220. The first compensation capacitor 400 is used to increase the capacitive load of the first signal line 290.
The driving substrate 10 may be used for an OLED display panel. The special-shaped display area 200 may be provided with a slot or a circular arc. Due to the grooved or circular arc structure, the special-shaped display area 200 may include a plurality of first pixel driving units 810. The driving substrate 10 may further include a normal display area 600. The normal display area 600 may be provided with a plurality of second pixel driving units 820. The first pixel driving unit 810 and the second pixel driving unit 820 are different in number. The normal display area 600 may further include a plurality of second signal lines 520. The number of the second pixel driving units 820 driven by each of the second signal lines 520 may be the same. Since the number of the first pixel driving units 810 of the irregular display area 200 is different from that of the second pixel driving units 820 of the normal display area 600, the number of the first pixel driving units 810 driven by the first signal lines 290 is different from that of the second pixel driving units 820 driven by the second signal lines 520 in the normal display area 600 in the irregular display area 200. The number of the first pixel driving units 810 driven by the first signal lines 290 in the irregular display area 200 is less than the number of the second pixel driving units 820 driven by the second signal lines 520 in the normal display area 600. Therefore, the capacitance load of each of the first signal lines 290 in the irregular display area 200 is less than that of each of the second signal lines 520 in the normal display area 600. It is understood that the first signal line 290 or the second signal line 520 may be a scan line or a data line.
When the capacitive load of the first signal line 290 is different from the capacitive load of the second signal line 520, the time of the rising edge and the falling edge of the signal transmitted by the second signal line and the signal transmitted by the first signal line are different, so that the charging time of the first pixel driving unit 810 connected to the first signal line 290 and the charging time of the second pixel driving unit 820 connected to the second signal line 520 are different, and the brightness uniformity of the panel is poor.
The first pixel driving circuit 210 may be a gate driving circuit. The signal output module 220 is configured to output a driving signal to the first signal line 290. The first signal line 290 may be connected to a plurality of the first pixel driving units 810. The driving signal can drive the first pixel driving unit 810 to act. The first pixel driving unit 810 may include a pixel switch. The driving signal may be used to drive the opening and closing of the pixel switch.
In one embodiment, the first pixel driving circuit 210 may further include a signal input unit 310. The signal input unit 310 is used for inputting a control signal to the signal output module 220. The signal output module 220 processes the control signal and outputs a driving signal to the first signal line 290.
After the first compensation capacitor 400 is connected to the first signal line 290 through the signal output module 220, the time taken for the rising edge and the falling edge of the signal transmitted by the first signal line 290 and the time taken for the rising edge and the falling edge of the signal transmitted by the second signal line 520 tend to be the same, so that the charging time of the first pixel driving unit 810 and the charging time of the second pixel driving unit 820 are the same. Therefore, the light emitting time of the first pixel unit driven by the first pixel driving unit 810 and the light emitting time of the second signal line driven by the second pixel driving unit 820 tend to be consistent, so that the luminance uniformity of the special-shaped display area 200 and the normal display area 600 is improved, the appearance can be improved, the circuit structure of the first compensation capacitor 400 connected with the first signal line 290 through the signal output module 220 is simple, and the production efficiency can be improved.
It is understood that the first compensation capacitor 400 may be sized according to the capacitive load of the first signal line 290 and the capacitive load of the second signal line 520.
In one embodiment, the signal output module 220 includes a control unit 270, a first switching unit 230, and a second switching unit 260. The control unit 270 comprises a first output 271 and a second output 272. The control unit 270 is used for outputting a level control signal. The first switching unit 230 is electrically connected to the first output terminal 271 and the first signal line 290, respectively. The first switching unit 230 outputs a first driving signal. The second switching unit 260 is electrically connected to the second output terminal 272 and the first signal line 290, respectively. One end of the first compensation capacitor 400 is electrically connected to the first signal line 290, and the other end of the first compensation capacitor 400 is electrically connected to the first switching unit 230. The first compensation capacitor 400 is used to increase the capacitive load of the first signal line 290.
The control unit 270 may output a high-level control signal or a low-level control signal to the first switching unit 230 and the second switching unit 260 through the first output terminal 271 and the second output terminal 272, respectively. In one embodiment, the first switching unit 230 is turned on when a low-level control signal is input, and the first switching unit 230 may be configured to output the first driving signal to the first signal line 290. The second switching unit 260 is turned off when a high-level control signal is input. The second switching unit 260 is turned on when a low-level control signal is input. The second switching unit 260 may input the second driving signal to the first signal line 290. The first drive signal may be low. The second driving signal may be high level. The pixel switch in the first pixel driving unit 810 to which the first signal line 290 is connected may be turned on at a low level signal and turned off at a high voltage. It can be understood that the control unit 270 may store different control programs, and the first switch unit 230 and the second switch unit 260 are controlled to be opened and closed by the different control programs, so that the pixel switches may have different switching periods.
One end of the first compensation capacitor 400 is electrically connected to the first signal line 290, and the other end of the first compensation capacitor 400 is electrically connected to the first switching unit 230, so that the capacitive load of the first signal line 290 and the capacitive load of the second signal line 520 tend to be the same. Moreover, the circuit is simple in structure and can improve the production efficiency.
In one embodiment, the first pixel driving circuit 210 further includes at least one second compensation capacitor 500. One end of the second compensation capacitor 500 is electrically connected to the second switch unit 260, and the other end of the second compensation capacitor 500 is electrically connected to the second output terminal 272. It is understood that the number of the second compensation capacitors 500 may be the same as the number of the first compensation capacitors 400. The capacitance of the second compensation capacitor 500 may be the same as the capacitance of the first compensation capacitor 400. Therefore, the capacitance balance of the first pixel driving circuit 210 can be promoted, and the stability of the first pixel driving circuit 210 can be improved.
In one embodiment, the second switching unit 260 includes a second transistor 261 and a second storage capacitor 262. Both ends of the second storage capacitor 262 and both ends of the at least one second compensation capacitor 500 are connected to the second output terminal 272 and the source of the second transistor 261, respectively. The gate of the second transistor 261 is electrically connected to the second output terminal 272. The drain of the second transistor 261 is electrically connected to the first signal line 290. The second storage capacitor 262 can be used for storing the level control signal sent by the control unit 270. The second transistor 261 may be a pmos (positive channel Metal Oxide semiconductor) transistor.
In one embodiment, the first switching unit 230 includes a first transistor 240 and a first storage capacitor 250. Both ends of the first storage capacitor 250 and both ends of the at least one first compensation capacitor 400 are respectively connected to the first output terminal 271 and the first signal line 290, and the gate of the first transistor 240 is electrically connected to the first output terminal 271. The voltage difference between the two plates of the first compensation capacitor 400 may be the same as the voltage difference between the gate and the drain of the first transistor 240. Since the drain of the first transistor 240 is directly connected to the first signal line 290, the first compensation capacitor 400 can directly compensate the capacitive load of the first signal line 290, and the compensation effect is better. In one embodiment, the first transistor 240 may be a pmos (positive channel Metal Oxide semiconductor) transistor.
Referring to fig. 3, in one embodiment, the first transistor 240 includes an active layer 231 and a gate layer 242. The gate layer 242 is disposed on a side of the active layer 231 away from the substrate 100. A first electrode layer 251 is disposed on a side of the gate layer 242 away from the substrate 100. The first electrode layer 251 and the gate layer 242 are disposed opposite to each other to form the first storage capacitor 250. The first electrode layer 251 and the gate layer 242 form the first storage capacitor 250, which can simplify the structure of the first switch unit 230 and improve the production efficiency.
In one embodiment, the first compensation capacitor 400 includes a second electrode layer 410 and a third electrode layer 420 disposed opposite to each other. The second electrode layer 410 is disposed on the same layer as the first electrode layer 251. The second electrode layer 410 and the first electrode layer 251 may be patterned after the same layer is deposited, thereby improving the production efficiency and simplifying the structure of the first switching unit 230.
In one embodiment, the third electrode layer 420 is disposed on the same layer as the gate layer 242. The third electrode layer 420 and the gate electrode layer 242 may be patterned after deposition of the same layer, so that the production efficiency may be improved, and the structure of the first switching unit 230 may be simplified.
In one embodiment, a first insulating layer 430 is disposed between the gate layer 242 and the first electrode layer 251, and between the second electrode layer 410 and the third electrode layer 420. The first insulating layer 430 may serve as a dielectric layer, such that the gate layer 242 and the first electrode layer 251 constitute the first storage capacitor 250, and such that the second electrode layer 410 and the third electrode layer 420 constitute the first compensation capacitor 400.
In one embodiment, a second insulating layer 440 may be disposed between the gate electrode layer 242 and the third electrode layer 420. The second insulating layer 440 may be used to isolate the gate layer 242 from the third electrode layer 420.
In one embodiment, a third insulating layer 450 may be disposed between the first electrode layer 251 and the second electrode layer 410. The third insulating layer 450 may isolate the first electrode layer 251 and the second electrode layer 410.
In one embodiment, a fourth insulating layer 460 may be disposed between the active layer 231 and the gate layer 242. The fourth insulating layer 460 is used to isolate the active layer 231 from the gate layer 242.
The embodiment of the application also provides a display panel. The display panel includes the driving substrate 10. The irregular display area 200 is provided with a plurality of first pixel unit rows 280. One of the first pixel driving circuits 210 drives one of the first pixel cell rows 280 through the first signal line 290. The substrate 100 further includes a normal display area 600 and a normal non-display area 700. The normal display area 600 is provided with a plurality of second pixel unit rows 510. The normal non-display area 700 is provided with a plurality of second pixel driving circuits 800. The plurality of second signal lines 520 extend from the normal display area 600 to the normal non-display area 700. One of the second pixel driving circuits 800 drives one of the second pixel cell rows 510 through one of the second signal lines 520.
The first pixel cell row 280 may include a plurality of the first pixel driving units 810. The second pixel unit row 510 may include a plurality of second pixel driving units 820. A surface of the first pixel driving unit 810 may form the first pixel unit. A surface of the second pixel driving unit 820 may form the second pixel unit. At least one first compensation capacitor 400 is connected to the first signal line 290 through the signal output module 220, so that the capacitive load of the first signal line 290 of the special-shaped display driving area 200 and the capacitive load of the second signal line 520 of the normal display driving area 100 tend to be the same. Therefore, the light intensity of the special-shaped display area 200 and the normal display area 600 of the display panel tends to be consistent, and the appearance can be improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present patent. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A drive substrate, comprising:
a substrate (100) comprising a shaped display area (200) and a shaped non-display area (300);
at least one first pixel cell row (280) arranged in the shaped display area (200);
at least one first signal line (290) electrically connected to the at least one first pixel cell row (280) in a one-to-one correspondence;
at least one first pixel driving circuit (210) disposed in the non-display area (300), each of the first pixel driving circuits (210) including a signal output module (220) and at least one first compensation capacitor (400);
the signal output module (220) includes:
a control unit (270) comprising a first output (271) for outputting a level control signal;
a first switch unit (230) electrically connected to the first output terminal (271) and the first signal line (290), respectively, for outputting a first driving signal to the first signal line (290) according to the level control signal;
one end of the first compensation capacitor (400) is electrically connected to the first signal line (290), and the other end of the first compensation capacitor (400) is electrically connected to the first switching unit (230).
2. The driving substrate of claim 1, wherein the signal output module (220) comprises:
a control unit (270) comprising a second output (272) for outputting a level control signal;
and a second switching unit (260) electrically connected to the second output terminal (272) and the first signal line (290), respectively, for outputting a second driving signal to the first signal line (290) according to the level control signal.
3. The driving substrate according to claim 2, wherein the first pixel driving circuit (210) further comprises at least one second compensation capacitor (500), one end of the second compensation capacitor (500) is electrically connected to the second switching unit (260), and the other end of the second compensation capacitor (500) is electrically connected to the second output terminal (272).
4. A drive substrate according to claim 3, wherein the second switching unit (260) comprises a second transistor (261), a second storage capacitor (262);
both ends of the second storage capacitor (262) and both ends of the at least one second compensation capacitor (500) are respectively connected to the second output terminal (272) and the source of the second transistor (261);
a gate of the second transistor (261) is electrically connected to the second output terminal (272);
the drain of the second transistor (261) is electrically connected to the first signal line (290).
5. The driving substrate according to claim 2, wherein the first switching unit (230) comprises:
a first transistor (240) and a first storage capacitor (250);
both ends of the first storage capacitor (250) and both ends of the at least one first compensation capacitor (400) are respectively connected to the first output terminal (271) and the first signal line (290), and a gate of the first transistor (240) is electrically connected to the first output terminal (271).
6. The driving substrate of claim 5, wherein the first transistor (240) comprises an active layer (231) and a gate layer (242), the gate layer (242) is disposed on a side of the active layer (231) away from the substrate (100), a first electrode layer (251) is disposed on a side of the gate layer (242) away from the substrate (100), and the first electrode layer (251) and the gate layer (242) are disposed opposite to each other to form the first storage capacitor (250).
7. The driving substrate according to claim 6, wherein the first compensation capacitor (400) comprises a second electrode layer (410) and a third electrode layer (420) which are oppositely arranged, and the second electrode layer (410) and the first electrode layer (251) are arranged in the same layer.
8. The driving substrate according to claim 7, wherein the third electrode layer (420) is disposed in a same layer as the gate layer (242).
9. The driving substrate according to claim 8, wherein a first insulating layer (430) is disposed between the gate layer (242) and the first electrode layer (251) and between the second electrode layer (410) and the third electrode layer (420).
10. A display panel comprising a driving substrate (10) according to any one of claims 1 to 9, the substrate (100) further comprising:
a normal display area (600) provided with a plurality of second pixel unit rows (510);
a normal non-display area (700) provided with a plurality of second pixel driving circuits (800);
a plurality of second signal lines (520), one of the second pixel driving circuits driving one of the second pixel unit rows (510) through one of the second signal lines (520).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810450844.4A CN108766237B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810450844.4A CN108766237B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108766237A CN108766237A (en) | 2018-11-06 |
| CN108766237B true CN108766237B (en) | 2020-09-22 |
Family
ID=64010244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810450844.4A Active CN108766237B (en) | 2018-05-11 | 2018-05-11 | Drive substrate and display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108766237B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111696464B (en) * | 2019-03-13 | 2022-03-18 | 重庆京东方显示技术有限公司 | Signal line capacitance compensation circuit and display panel |
| CN111509019A (en) * | 2020-04-29 | 2020-08-07 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method thereof and display device |
| CN112466245B (en) * | 2020-12-01 | 2022-10-11 | 昆山工研院新型平板显示技术中心有限公司 | Display panel and display device |
| CN113066807B (en) * | 2021-03-24 | 2024-09-17 | 京东方科技集团股份有限公司 | Display panel, manufacturing method, electronic equipment and display device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025895A (en) * | 2006-02-20 | 2007-08-29 | 天利半导体（深圳）有限公司 | Driving circuit |
| JP2010041392A (en) * | 2008-08-05 | 2010-02-18 | Nec Electronics Corp | Class-ab amplifier circuit and display |
| KR101018295B1 (en) * | 2010-05-10 | 2011-03-04 | (주)제퍼로직 | Voltage supply circuit |
| CN107221536A (en) * | 2017-05-25 | 2017-09-29 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107424551A (en) * | 2017-05-25 | 2017-12-01 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107611142A (en) * | 2017-09-11 | 2018-01-19 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN107785399A (en) * | 2017-10-26 | 2018-03-09 | 武汉天马微电子有限公司 | Display panel and display device |
| CN107863374A (en) * | 2017-10-31 | 2018-03-30 | 武汉天马微电子有限公司 | O L ED display panel and display device |
| CN108010951A (en) * | 2017-11-30 | 2018-05-08 | 武汉天马微电子有限公司 | Organic light-emitting display panel and display device |
-
2018
- 2018-05-11 CN CN201810450844.4A patent/CN108766237B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025895A (en) * | 2006-02-20 | 2007-08-29 | 天利半导体（深圳）有限公司 | Driving circuit |
| JP2010041392A (en) * | 2008-08-05 | 2010-02-18 | Nec Electronics Corp | Class-ab amplifier circuit and display |
| KR101018295B1 (en) * | 2010-05-10 | 2011-03-04 | (주)제퍼로직 | Voltage supply circuit |
| CN107221536A (en) * | 2017-05-25 | 2017-09-29 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107424551A (en) * | 2017-05-25 | 2017-12-01 | 上海天马微电子有限公司 | Array substrate, special-shaped display and display device |
| CN107611142A (en) * | 2017-09-11 | 2018-01-19 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN107785399A (en) * | 2017-10-26 | 2018-03-09 | 武汉天马微电子有限公司 | Display panel and display device |
| CN107863374A (en) * | 2017-10-31 | 2018-03-30 | 武汉天马微电子有限公司 | O L ED display panel and display device |
| CN108010951A (en) * | 2017-11-30 | 2018-05-08 | 武汉天马微电子有限公司 | Organic light-emitting display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108766237A (en) | 2018-11-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US12073789B2 (en) | Electro-optical device and electronic apparatus | |
| CN108766237B (en) | Drive substrate and display panel | |
| US9997546B2 (en) | Array substrate, display panel, and display device | |
| CN109524445A (en) | Display panel and display device | |
| CN109061975A (en) | A kind of display device and its display panel | |
| CN107749274B (en) | Display panel and display device | |
| US10796635B2 (en) | Pixel driving circuit having dual driver unit, driving method for the same and display panel | |
| CN108630735B (en) | Drive substrate and display panel | |
| EP3203521A1 (en) | Organic electroluminescent display device and driving method therefor, and display apparatus | |
| US11380714B2 (en) | Array substrate, display panel and display device | |
| CN104809988A (en) | OLED (Organic Light Emitting Diode) array substrate, display panel and display device | |
| CN108646484B (en) | Display panel and display device | |
| CN108054174B (en) | Array substrate, display panel and display device | |
| CN113990909A (en) | Display panel and display device | |
| CN115084165B (en) | Array substrate, display panel and display device | |
| CN101539698B (en) | Display array substrate | |
| CN110707095A (en) | Display panel | |
| CN110085644B (en) | Organic light emitting diode display panel, manufacturing method thereof and display device | |
| CN114842802B (en) | Pixel driving circuit, display panel and display device | |
| CN109254435A (en) | Electrostatic protection structure of display panel and display device | |
| CN104166287A (en) | Array substrate and liquid crystal display device | |
| WO2022252092A1 (en) | Shift register unit and drive method therefor, gate driver circuit, and display device | |
| CN105427791B (en) | A kind of array substrate and display device | |
| CN111244147B (en) | Display circuit, switching element, display panel, and display device | |
| CN214377408U (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |