CN108736702A - Totem non-bridge PFC circuits, power supply change-over device and air conditioner - Google Patents
Totem non-bridge PFC circuits, power supply change-over device and air conditioner Download PDFInfo
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- CN108736702A CN108736702A CN201810591860.5A CN201810591860A CN108736702A CN 108736702 A CN108736702 A CN 108736702A CN 201810591860 A CN201810591860 A CN 201810591860A CN 108736702 A CN108736702 A CN 108736702A
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- 239000003990 capacitor Substances 0.000 claims abstract description 84
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 abstract description 11
- 238000000034 method Methods 0.000 description 12
- 230000008569 process Effects 0.000 description 12
- 238000004146 energy storage Methods 0.000 description 10
- 238000007667 floating Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 238000007599 discharging Methods 0.000 description 4
- 230000010355 oscillation Effects 0.000 description 4
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- 230000002441 reversible effect Effects 0.000 description 3
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- 230000001360 synchronised effect Effects 0.000 description 2
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- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4233—Arrangements for improving power factor of AC input using a bridge converter comprising active switches
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present invention discloses totem non-bridge PFC circuits, power supply change-over device and air conditioner, the totem non-bridge PFC circuits include at least one upper bridge arm metal-oxide-semiconductor, at least one lower bridge arm metal-oxide-semiconductor, inductor, filter capacitor, and at least one boostrap circuit, each upper bridge arm metal-oxide-semiconductor and a lower bridge arm metal-oxide-semiconductor are connected in series with one switch bridge arm circuit of composition；Boostrap circuit is corresponding with the switch quantity of bridge arm circuit；The output end of driving power circuit is connect with the input terminal of the grid of lower bridge arm metal-oxide-semiconductor and boostrap circuit respectively；The output end of boostrap circuit is connect with the source electrode of upper bridge arm metal-oxide-semiconductor；Wherein, driving power circuit is for driving bridge arm metal-oxide-semiconductor and/or lower bridge arm metal-oxide-semiconductor to be connected；Boostrap circuit constitutes charge circuit to store electric energy when corresponding lower bridge arm metal-oxide-semiconductor is connected with driving power circuit.The present invention solves the problem of that bootstrap capacitor can not charge or undercharge makes bridge arm metal-oxide-semiconductor not to be connected reliably.
Description
Technical Field
The invention relates to the technical field of power supplies, in particular to a totem-pole bridgeless PFC circuit, a power supply conversion device and an air conditioner.
Background
The totem-pole bridgeless PFC circuit is a novel circuit for replacing a traditional rectifying circuit, and is increasingly applied to the technical field of power supplies because the rectifying loss can be reduced.
The existing totem-pole bridgeless PFC circuit is provided with a half-bridge loop of an upper bridge arm switching tube and a lower bridge arm switching tube, a floating power supply is usually needed when the upper bridge arm switching tube is driven, and a bootstrap capacitor is mostly adopted to provide the floating power supply for the upper bridge arm switching tube.
However, such bootstrap capacitor needs to be charged in an initial charging preparation state, and if the totem-pole bridgeless PFC circuit drives the upper and lower bridge arm switch tubes at this time, the upper bridge arm switch tube cannot be conducted due to the possible shortage of the charge amount of the bootstrap capacitor or the insufficient high level, so that the synchronous rectification and boosting operation cannot be performed. In addition, if the bootstrap capacitor cannot be charged, the charge is gradually consumed, so that the time for the preparation state is increased, the capacitance required for the normal operation mode is increased, and the cost is also increased.
Disclosure of Invention
The invention mainly aims to provide a totem-pole bridgeless PFC circuit, a power conversion device and an air conditioner, aiming at solving the problem that an upper bridge arm MOS (metal oxide semiconductor) tube cannot be reliably conducted because a bootstrap capacitor cannot be charged or is insufficiently charged.
In order to achieve the above object, the present invention provides a totem-pole bridgeless PFC circuit, which includes at least one upper bridge arm MOS transistor, at least one lower bridge arm MOS transistor, an inductor, a filter capacitor, and at least one bootstrap circuit, wherein each of the upper bridge arm MOS transistors and one of the lower bridge arm MOS transistors are connected in series to form a switch bridge arm circuit; the number of the bootstrap circuits corresponds to the number of the switch bridge arm circuits;
one end of the inductor is connected with an alternating current power supply, and the other end of the inductor is connected with the common end of the upper bridge arm MOS tube and the lower bridge arm MOS tube;
the filter capacitors are arranged at two ends of the switch bridge arm circuit in parallel;
the output end of the driving power supply circuit is respectively connected with the grid electrode of the lower bridge arm MOS tube and the input end of the bootstrap circuit; the output end of the bootstrap circuit is connected with the source electrode of the MOS tube of the upper bridge arm;
the driving power circuit is used for driving the upper bridge arm MOS tube and/or the lower bridge arm MOS tube to be conducted;
and the bootstrap circuit and the driving power supply circuit form a charging loop to store electric energy when the corresponding lower bridge arm MOS tube is conducted.
Optionally, the number of the upper bridge arm MOS tubes and the number of the lower bridge arm MOS tubes are two, and the two upper bridge arm MOS tubes are respectively a first upper bridge arm MOS tube and a second upper bridge arm MOS tube;
the two lower bridge arm MOS tubes are respectively a first lower bridge arm MOS tube and a second lower bridge arm MOS tube;
the inductor is arranged between the alternating-current power supply and the common ends of the second upper bridge arm MOS tube and the second lower bridge arm MOS tube in series.
Optionally, the first upper bridge arm MOS transistor and the first lower bridge arm MOS transistor are power frequency switching transistors, and the second upper bridge arm MOS transistor and the second lower bridge arm MOS transistor are high frequency switching transistors.
Optionally, the number of the bootstrap circuits is two, and the two bootstrap circuits are a first bootstrap circuit and a second bootstrap circuit respectively; the output end of the first bootstrap circuit is connected with the source electrode of the MOS tube of the first upper bridge arm; and the output end of the second bootstrap circuit is connected with the source electrode of the second upper bridge arm MOS tube.
Optionally, the first bootstrap circuit includes a first diode, a first resistor, and a first bootstrap capacitor, an anode of the first diode is connected to the output terminal of the driving power supply circuit, and a cathode of the first diode is connected to a first terminal of the first bootstrap capacitor through the first resistor; the second end of the first bootstrap capacitor is the output end of the first bootstrap circuit.
Optionally, the second bootstrap circuit includes a second diode, a second resistor, and a second bootstrap capacitor, an anode of the second diode is connected to the output terminal of the driving power supply circuit, and a cathode of the second diode is connected to the first terminal of the second bootstrap capacitor through the second resistor; and the second end of the second bootstrap capacitor is the output end of the first bootstrap circuit.
Optionally, the driving power circuit includes a first direct current power supply and a gate driving circuit corresponding to each bridge arm MOS transistor, a control signal input end of each gate driving circuit is used for accessing a control signal, and a power supply input end of each gate driving circuit is connected to the first direct current power supply; the output end of each grid driving circuit is connected with the grid of the corresponding bridge arm MOS tube.
Optionally, the driving power circuit further includes a current-limiting resistor corresponding to each bridge arm MOS transistor, and an output end of each gate driving circuit is connected to a gate of the bridge arm MOS transistor corresponding to the gate driving circuit through one current-limiting resistor.
The invention also provides a power conversion device which comprises the totem-pole bridgeless PFC circuit.
The invention also provides an air conditioner which comprises the totem-pole bridgeless PFC circuit or the power conversion device.
The totem-pole bridgeless PFC circuit is provided with an inductor, a filter capacitor, at least one upper bridge arm MOS tube and at least one lower bridge arm MOS tube, wherein each upper bridge arm MOS tube and one lower bridge arm MOS tube are connected in series to form a switch bridge arm circuit, and the upper bridge arm MOS tube and/or the lower bridge arm MOS tube are driven to be conducted through a power supply driving circuit. The bootstrap circuit is arranged at the common end of each upper bridge arm MOS tube and each lower bridge arm MOS tube, so that when the corresponding lower bridge arm MOS tube is conducted, the bootstrap circuit and the driving power circuit form a charging circuit to store electric energy, and when the upper bridge arm MOS tube is conducted, the electric energy is output to the source electrode of the upper bridge arm MOS tube to raise the voltage of the grid electrode of the upper bridge arm MOS tube, so that a floating power supply is provided for the upper bridge arm MOS tube to drive the upper bridge arm MOS tube to be conducted. The bootstrap circuit can store energy when the lower bridge arm MOS tube is conducted through the power supply driving circuit, and provide electric energy in time when the lower bridge arm MOS tube is conducted, so that the energy storage amount of the bootstrap circuit does not need to be set to be larger, the charging time of the bootstrap circuit can be shortened, the charging/discharging of the bootstrap circuit can be completed in the working process of the totem-pole bridgeless PFC circuit, and the reliable conduction of the upper bridge arm MOS tube can be ensured. The invention solves the problem that the bootstrap capacitor cannot be charged or is insufficiently charged in the working process, so that the MOS tube of the upper bridge arm cannot be reliably conducted. The invention can shorten the time for the totem pole bridgeless PFC circuit to accurately reach the stable operation, the situation after the half cycle of the input AC voltage, and the like, and can reach the expected operation time without arranging a large electrolytic capacitor. The invention also solves the problems that when the totem-pole bridgeless PFC circuit works, the bootstrap circuit cannot store energy to cause the gradual consumption of charges, so that the time of a preparation state is prolonged, and the charging time required for switching to a normal action mode is increased.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a totem-pole bridgeless PFC circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of an embodiment of the totem-pole bridgeless PFC circuit in fig. 1;
fig. 3 is a schematic diagram of a first embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation;
fig. 4 is a schematic diagram of a second embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation;
fig. 5 is a schematic diagram of a third embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation;
fig. 6 is a schematic diagram of a fourth embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation;
fig. 7 is a schematic diagram of a fifth embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation;
fig. 8 is a schematic diagram of a sixth embodiment of the energy flow of the totem-pole bridgeless PFC circuit of the present invention during operation.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides a totem-pole bridgeless PFC circuit.
In the field of power supply technology, when the commercial power is connected to the user side, the AC of the commercial power is converted into DC, that is, rectified and then output to the load of the user, so as to provide the load with the DC power supply, and this process mostly adopts a rectifier bridge composed of rectifier diodes to perform AC-DC conversion. However, the rectifier bridge is only conducted when the input sine wave voltage is close to the peak value, so that the input current path is seriously non-sinusoidal, a large amount of harmonic current components are generated by input, the utilization rate of a power grid is reduced, and the possibility of potential interference to other electrical appliances is also realized. Therefore, a PFC circuit is generally added to the rear end of the rectifier bridge to shape the input AC current into a sine wave that is approximately in phase with the input voltage. Because the PFC is normally designed in a wide voltage input mode, the input current is large at low input voltage, when the output power is large, the current pressure and the heat dissipation pressure of each power device, especially the input rectifier bridge, are particularly significant, and under the condition of low voltage and large current output, the conduction voltage drop of the rectifier diode is high, and the loss of the output end rectifier tube is large.
The totem-pole bridgeless PFC circuit can reduce rectification loss and consumption by replacing the original rectifier bridge circuit, so that the totem-pole bridgeless PFC circuit is increasingly applied to the technical field of power supplies. However, in a half-bridge circuit based on upper and lower arm switching tubes, a floating power supply is required for driving the upper arm switching tubes. In order to simplify the circuit and reduce the cost, most of the devices adopt bootstrap capacitors to provide a floating power supply for the upper bridge arm switching tubes. However, such a bootstrap capacitor needs to be charged in an initial charge preparation state, and if such driving is performed, the charge amount of the bootstrap capacitor is insufficient or the high level is insufficient, which causes the upper arm switching tube to be not conductive and makes the synchronous rectification and boosting operation impossible. Therefore, it is normally necessary to provide a large electrolytic capacitor so that it takes a certain time to reach a desired operation, such as a time until the totem-pole bridgeless PFC circuit accurately reaches a stable operation, or a time after a half cycle of the input AC voltage.
In order to improve the efficiency at the time of low load, the system is mostly put into an intermittent oscillation mode, that is, into a standby state when no load is applied, and if the bootstrap capacitor cannot be charged at this time, the charge is gradually consumed, so that the time for the standby state becomes long, the capacitor capacity required for the system to shift to the normal operation mode increases, and the cost also increases.
In order to solve the above problem, referring to fig. 1 to 8, in an embodiment of the present invention, the totem-pole bridgeless PFC circuit includes at least one upper bridge arm MOS transistor (Q1 or Q3), at least one lower bridge arm MOS transistor (Q2 or Q4), an inductor Lin, a filter capacitor Cd1, and at least one bootstrap circuit 30, where each of the upper bridge arm MOS transistors and one of the lower bridge arm MOS transistors are connected in series to form a switch bridge arm circuit 10; the number of the bootstrap circuits 30 corresponds to the number of the switching leg circuits 10;
one end of the inductor Lin is connected with an alternating current power supply AC, and the other end of the inductor Lin is connected with the common end of the upper bridge arm MOS tube and the lower bridge arm MOS tube;
the filter capacitor Cd1 is arranged in parallel at two ends of the switch bridge arm circuit 10;
the output end of the driving power supply circuit 20 is connected to the gate of the lower bridge arm MOS transistor and the input end of the bootstrap circuit 30, respectively; the output end of the bootstrap circuit 30 is connected with the source electrode of the upper bridge arm MOS tube; wherein,
the driving power circuit 20 is configured to drive the upper bridge arm MOS transistor and/or the lower bridge arm MOS transistor to be turned on;
the bootstrap circuit 30 forms a charging loop with the driving power circuit 20 when the corresponding lower bridge arm MOS transistor is turned on, so as to store electric energy.
The upper bridge arm MOS tube and/or the lower bridge arm MOS tube can be SiC type MOSFETs, or the upper bridge arm MOS tube and/or the lower bridge arm MOS tube can be high-performance switching tubes with extremely high switching speed, such as GaN type MOSFETs, and the like, and the embodiment can be realized by selecting a super-junction type high-voltage power MOSFET.
The totem pole bridgeless PFC circuit generally has two bridge arm circuits, the two bridge arm circuits can be completely or partially realized by adopting power switching tubes such as IGBTs, MOSFETs and the like, that is, the number of the switching bridge arm circuits 10 can be one or more, when the number of the power switching tubes is two, the two power switching tubes form one high-frequency switching bridge arm circuit 10 and are switched on/off according to a driving signal, and the other bridge arm circuit can be realized by adopting a diode. When the number of the power switching tubes is four, two of the four power switching tubes form a high-frequency switching bridge arm circuit 10, and the other two power switching tubes form a low-frequency follow current switching bridge arm circuit 10.
In the same switching bridge arm circuit 10, the on-off directions of the upper bridge arm power switching tubes and the lower bridge arm power switching tubes are opposite, that is, the lower bridge arm switching tubes keep an off state when the upper bridge arm power switching tubes are on; or when the lower bridge arm power switch tube is conducted, the upper bridge arm switch tube keeps the cut-off state. In some embodiments, a totem pole bridgeless PFC circuit may have multiple totem pole bridgeless PFC legs that are interleaved together to increase power levels and reduce input current ripple. In some embodiments, the power switch tube such as IGBT, MOSFET, etc. may have its own body diode or may be connected in parallel with a freewheeling diode, and the body diode or freewheeling diode may perform high-frequency rectification switching action.
In the same bridge arm circuit, the upper bridge arm MOS tube and the drive circuit are not commonly grounded, and the MOS tube is generally conducted until the grid source G-S reaches 8-15V. The MOS tube of the lower bridge arm and the drive circuit are arranged in common, so that the gate source G-S is easily conducted by achieving conduction voltage drop. However, the upper bridge arm MOS transistor and the lower bridge arm MOS transistor are arranged in series, that is, only when the lower bridge arm MOS transistor is conducted, the common ground can be realized. However, in the same bridge arm circuit, the upper and lower bridge arm power switching tubes are not allowed to be conducted simultaneously, so when the lower bridge arm MOS tube is turned off, the source terminal of the upper bridge arm MOS tube is suspended, and the gate-source electrode G-S of the upper bridge arm MOS tube cannot reach conduction voltage drop, so that the upper bridge arm MOS tube cannot be conducted.
In order to solve the above problem, in this embodiment, the bootstrap circuit 30 is arranged corresponding to the number and position of each upper bridge arm switching tube, and when the lower bridge arm MOS tube is turned on, the upper bridge arm MOS tube is turned off at this time, and forms a charging loop with the lower bridge arm MOS tube and the driving power supply circuit 20, and performs energy storage; and when the lower bridge arm MOS tube is cut off and the upper bridge arm MOS tube is conducted, outputting electric energy to the source electrode of the upper bridge arm MOS tube to raise the voltage of the grid electrode of the upper bridge arm MOS tube, so that a floating power supply is provided for the upper bridge arm MOS tube to drive the upper bridge arm MOS tube to be conducted.
The totem-pole bridgeless PFC circuit is provided with an inductor Lin, a filter capacitor Cd1, at least one upper bridge arm MOS tube and at least one lower bridge arm MOS tube, wherein each upper bridge arm MOS tube and one lower bridge arm MOS tube are connected in series to form a switch bridge arm circuit 10, and the upper bridge arm MOS tube and/or the lower bridge arm MOS tube are driven to be conducted through a power supply driving circuit. The bootstrap circuit 30 is arranged at the common end of each of the upper bridge arm MOS tube and the lower bridge arm MOS tube, so that when the corresponding lower bridge arm MOS tube is conducted, the bootstrap circuit and the driving power supply circuit 20 form a charging loop to store electric energy, and when the upper bridge arm MOS tube is conducted, the electric energy is output to the source electrode of the upper bridge arm MOS tube to raise the voltage of the grid electrode of the upper bridge arm MOS tube, so that a floating power supply is provided for the upper bridge arm MOS tube, and the upper bridge arm MOS tube is driven to be conducted. According to the bootstrap circuit 30, the power driving circuit can store energy when the lower bridge arm MOS tube is conducted, and can provide electric energy in time when the lower bridge arm MOS tube is conducted, so that the energy storage amount of the bootstrap circuit 30 does not need to be set to be large, the charging time of the bootstrap circuit 30 can be shortened, the charging/discharging of the bootstrap circuit 30 can be completed in the working process of the totem-pole bridgeless PFC circuit, and the reliable conduction of the upper bridge arm MOS tube can be ensured. The invention solves the problem that the bootstrap capacitor cannot be charged or is insufficiently charged in the working process, so that the MOS tube of the upper bridge arm cannot be reliably conducted. The invention can shorten the time for the totem pole bridgeless PFC circuit to accurately reach the stable operation, the situation after the half cycle of the input AC voltage, and the like, and can reach the expected operation time without arranging a large electrolytic capacitor. The invention also solves the problems that when the totem-pole bridgeless PFC circuit works, the bootstrap circuit 30 can not store energy to cause the gradual consumption of the charge, so that the time of the preparation state is prolonged, and the charging time required for switching to the normal action mode is increased.
It can be understood that, when a load is not accessed, or the totem-pole bridgeless PFC circuit works in an intermittent oscillation Mode, that is, when the load is in a standby state (Burst Mode Operation), the present invention may also alternately conduct the lower bridge arm MOS transistor according to the power frequency to charge the bootstrap circuit 30 corresponding to the upper bridge arm MOS transistor, so as to ensure that the energy storage state of the bootstrap circuit 30 is a full charge state.
Referring to fig. 1 to 8, in an alternative embodiment, the number of the upper bridge arm MOS transistor and the lower bridge arm MOS transistor is two, and the two upper bridge arm MOS transistors are a first upper bridge arm MOS transistor Q1 and a second upper bridge arm MOS transistor Q3, respectively;
the two lower bridge arm MOS tubes are respectively a first lower bridge arm MOS tube Q2 and a second lower bridge arm MOS tube Q4;
the inductor Lin is arranged in series between the alternating-current power supply AC and the common end of the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4.
In this embodiment, two upper bridge arm MOS transistors respectively constitute an upper bridge arm switch of a bridge arm circuit, and two lower bridge arm MOS transistors respectively constitute a lower bridge arm switch of the bridge arm circuit, where the bridge arm circuit constituted by the first upper bridge arm MOS transistor Q1 and the first lower bridge arm MOS transistor Q2 is referred to as a first bridge arm circuit; the bridge arm circuit formed by the second upper bridge arm MOS transistor Q3 and the second lower bridge arm MOS transistor Q4 is referred to as a second bridge arm circuit. The first upper bridge arm MOS transistor Q1 and the first lower bridge arm MOS transistor Q2 are alternately turned on, that is, when the first upper bridge arm MOS transistor Q1 is turned on, the first lower bridge arm MOS transistor Q2 keeps an off state, whereas when the first lower bridge arm MOS transistor Q2 is turned on, the first upper bridge arm MOS transistor Q1 keeps an off state. And the second upper bridge arm MOS transistors Q3 and the second lower bridge arm MOS transistors Q4 are alternately turned on, that is, when the second upper bridge arm MOS transistor Q3 is turned on, the second lower bridge arm MOS transistor Q4 keeps an off state, whereas when the second lower bridge arm MOS transistor Q4 is turned on, the second upper bridge arm MOS transistor Q3 keeps an off state. The alternating on-off of the two MOSFET tubes of the first bridge arm circuit and the alternating on-off of the two MOSFET tubes of the second bridge arm circuit are utilized to realize the boosting rectification for converting the alternating current input by the alternating current end into the direct current and outputting the direct current to supply power for the direct current load.
Referring to fig. 1 to 8, in the above embodiment, the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2 are power frequency switching transistors, and the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 are high frequency switching transistors.
In the embodiment, one end of an inductor Lin is connected with a zero line end of an alternating current power supply AC, and the other end of the inductor Lin is connected with a common end of a second upper bridge arm MOS transistor Q3 and a second lower bridge arm MOS transistor Q4; alternatively, one end of the inductor Lin is connected to a live line end of the AC power supply AC, and the other end of the inductor Lin is connected to a common end of the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2. When the inductor Lin is arranged at the zero line end of the alternating current power supply AC in series and the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4, the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2 are turned on/off according to the power frequency, that is, are turned on/off at a frequency of 50 Hz; the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 are turned on/off at a high frequency. Wherein, the high frequency range can be set to 15 k-40 KHz. When the inductor Lin is arranged at a live wire end of the alternating-current power supply AC in series and a common end of the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2, the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 are turned on/off according to a power frequency, that is, are turned on/off at a frequency of 50 Hz; the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2 are turned on/off at a high frequency. Wherein, the high frequency range can be set to 15 k-40 KHz.
Referring to fig. 1 to 8, in an alternative embodiment, the number of the bootstrap circuits 30 is two, and the two bootstrap circuits 30 are a first bootstrap circuit 31 and a second bootstrap circuit 32, respectively; the output end of the first bootstrap circuit 31 is connected with the source electrode of the first upper bridge arm MOS transistor Q1; the output end of the second bootstrap circuit 32 is connected to the source of the second upper bridge arm MOS transistor Q3.
In this embodiment, the number of the bootstrap circuits 30 is two corresponding to the first bridge arm circuit (not shown in the figure) and the second bridge arm circuit (not shown in the figure), specifically, the output end of the first bootstrap circuit 31 is connected to the drain of the first lower bridge arm MOS transistor Q2 in the first bridge arm circuit, and when the first lower bridge arm MOS transistor Q2 in the first upper bridge arm circuit is turned on, the first bootstrap circuit 31, the first lower bridge arm MOS transistor Q2, and the driving power supply circuit 20 form a charging loop, so as to implement storage of electric energy. When the first upper bridge arm MOS tube Q1 in the first bridge arm circuit is conducted, the electric energy is output to the source electrode of the first upper bridge arm MOS tube Q1 to raise the voltage of the grid source electrode of the first upper bridge arm MOS tube Q1, so that a floating power supply is provided for the first upper bridge arm MOS tube Q1, and the first upper bridge arm MOS tube Q1 is driven to be conducted. The output end of the second bootstrap circuit 32 is connected to the drain of the second upper arm MOS transistor Q3 in the second arm circuit, and when the second lower arm MOS transistor Q4 in the second upper arm circuit is turned on, the second bootstrap circuit 32, the second lower arm MOS transistor Q4, and the driving power supply circuit 20 form a charging loop, so as to implement storage of electric energy. When the second upper bridge arm MOS transistor Q3 in the second bridge arm circuit is turned on, the electric energy is output to the source electrode of the second upper bridge arm MOS transistor Q3 to raise the voltage of the gate electrode of the second upper bridge arm MOS transistor Q3, so that a floating power supply is provided for the second upper bridge arm MOS transistor Q3 to drive the second upper bridge arm MOS transistor Q3 to be turned on.
Referring to fig. 1 to 8, in the above embodiment, the first bootstrap circuit 31 includes a first diode Db1, a first resistor Rb1 and a first bootstrap capacitor Cb1, an anode of the first diode Db1 is connected to the output terminal of the driving power supply circuit 20, and a cathode of the first diode Db1 is connected to the first terminal of the first bootstrap capacitor Cb1 via the first resistor Rb 1; a second terminal of the first bootstrap capacitor Cb1 is an output terminal of the first bootstrap circuit 31.
In this embodiment, the parameters of the first resistor Rb1 and the first bootstrap capacitor Cb1 may be set according to the switching frequencies of the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2. Wherein the capacitance C of the first capacitor can be calculated according to the formula (1),
c ═ I × T1/Δ V (1); wherein, I is the driving current input to the gate of the upper arm MOS transistor, T1 is the maximum ON-state (ON) pulse width of the first upper arm MOS transistor Q1, and Δ V is the allowable discharge voltage. The first bootstrap capacitor Cb1 preferably has a capacitance of 10 to 50 μ F.
When the common terminal of the first upper leg MOS transistor Q1 and the first lower leg MOS transistor Q2 is pulled down to be close to the ground GND due to the conduction of the lower leg MOS transistors, the power driving circuit charges the first bootstrap capacitor Cb1 through the first resistor Rb1 and the first diode Db 1. When the first upper arm MOS transistor Q1 is turned on, after the common terminal of the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2 rises to the dc bus voltage, the first diode Db1 is turned off in the reverse direction to isolate the dc bus voltage from the driving power supply circuit 20, thereby preventing the high voltage on the dc bus side from being connected to the low voltage side of the driving power supply circuit 20 to burn out the components. At this time, the first bootstrap capacitor Cb1 discharges to provide a driving voltage to the gate of the first upper arm MOS transistor Q1. When the voltage at the common end of the first upper leg MOS transistor Q1 and the first lower leg MOS transistor Q2 is pulled low again, the first bootstrap capacitor Cb1 will be charged again through the driving power circuit 20 to supplement the electric energy released during the conduction period of the first upper leg MOS transistor Q1. In this way, the charging/discharging of the first bootstrap circuit 31 can be completed by the continuous swing of the levels of the common ends of the first upper arm MOS transistor Q1 and the first lower arm MOS transistor Q2 between the high level and the low level, and the voltage of the first bootstrap capacitor Cb1 floats up and down based on the source voltage of the first upper arm MOS transistor Q1.
Referring to fig. 1 to 8, in the above embodiment, the second bootstrap circuit 32 includes a second diode Db2, a second resistor Rb2 and a second bootstrap capacitor Cb2, an anode of the second diode Db2 is connected to the output terminal of the driving power supply circuit 20, and a cathode of the second diode Db2 is connected to the first terminal of the second bootstrap capacitor Cb2 via the second resistor Rb 2; a second terminal of the second bootstrap capacitor Cb2 is an output terminal of the first bootstrap circuit 31.
In this embodiment, the parameters of the second resistor Rb2 and the second bootstrap capacitor Cb2 may be set according to the switching frequencies of the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4. Wherein the capacitance C of the second capacitor can be calculated according to equation (1),
c ═ I × T1/Δ V (1); wherein, I is the driving current input to the gate of the upper arm MOS transistor, T1 is the maximum ON-state (ON) pulse width of the second upper arm MOS transistor Q3, and Δ V is the allowable discharge voltage. The second bootstrap capacitor Cb2 preferably has a capacitance of 50 to 100 μ F.
When the common terminal of the second upper leg MOS transistor Q3 and the second lower leg MOS transistor Q4 is pulled down to be close to the ground GND due to the conduction of the lower leg MOS transistors, the power driving circuit charges the second bootstrap capacitor Cb2 through the second resistor Rb2 and the second diode Db 2. When the second upper arm MOS transistor Q3 is turned on, after the common end of the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 rises to the dc bus voltage, the second diode Db2 is turned off in the reverse direction to isolate the dc bus voltage from the driving power supply circuit 20, thereby preventing the high voltage on the dc bus side from being connected to the low voltage side of the driving power supply circuit 20 to burn out the components. At this time, the second bootstrap capacitor Cb2 discharges to provide a driving voltage to the gate of the second upper arm MOS transistor Q3. When the voltage at the common end of the second upper leg MOS transistor Q3 and the second lower leg MOS transistor Q4 is pulled low again, the second bootstrap capacitor Cb2 will be charged again through the driving power circuit 20 to supplement the electric energy released during the conduction period of the second upper leg MOS transistor Q3. In this way, the charging/discharging of the second bootstrap circuit 32 can be completed by the continuous swing of the levels of the common ends of the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 between the high level and the low level, and the voltage of the second bootstrap capacitor Cb2 floats up and down based on the source voltage of the second upper arm MOS transistor Q3.
Referring to fig. 1 to 8, in the above embodiment, the first diode Db1 and the second diode Db2 are used to isolate the high voltage of the dc bus from the low voltage of the driving power supply, so as to prevent the high voltage on the dc bus from damaging the electronic components in the driving power supply circuit 20. In this embodiment, the first diode Db1 and the second diode Db2 may be ultrafast recovery diodes with high voltage resistance and small reverse leakage current to reduce charge loss.
The first resistor Rb1 and the second resistor Rb2 are respectively used for limiting the change rate of voltage so as to ensure that the corresponding bootstrap capacitor can be charged within the minimum on-time of the lower bridge arm MOS tube.
Referring to fig. 1 to 8, in an alternative embodiment, the driving power circuit 20 includes a first dc power VCC and a gate driving circuit (not shown) corresponding to each bridge arm MOS transistor, a control signal input end of each gate driving circuit is used for accessing a control signal, and a power input end of each gate driving circuit is connected to the first dc power VCC; the output end of each grid driving circuit is connected with the grid of the corresponding bridge arm MOS tube.
In this embodiment, the gate driving circuit may be implemented by using a gate driving IC, or may be implemented by using a driving circuit composed of discrete elements such as an operational amplifier, and the first direct current power source VCC is configured to provide a power supply voltage for the gate driving circuit. The output voltage value of the first direct current power source VCC may be 3.3V, 5V, and may be specifically set according to the driving voltage of the gate driver IC, which is not limited herein. The output end of the first direct current power VCC is further connected to the input end of each bootstrap circuit 30, so as to provide a charging power supply for the corresponding bootstrap circuit 30 when the lower bridge arm MOS transistor is turned on. The control signal received by the gate driving circuit can be provided by an external controller or can be a control signal input by a user through an upper computer or a software program, and the gate driving circuit converts the control signal into a corresponding PWM signal or a driving signal after receiving the control signal so as to drive a corresponding MOS tube to work.
Based on the above embodiment, the driving power circuit 20 further includes current limiting resistors (R11, R12, R21, R22) corresponding to each of the bridge arm MOS transistors, and each of the current limiting resistors is serially connected to an output terminal of one of the gate driving circuits and connected to one of the bridge arm MOS transistors.
In this embodiment, the current-limiting resistor is serially connected between the gate driving circuit and the bridge arm MOS transistor, and is configured to prevent the bridge arm MOS transistor from being burned down due to an excessive current output by the gate driving circuit.
In order to better illustrate the inventive concept of the present invention, the following description is made with reference to fig. 1 to 8 to illustrate the operation principle of the totem-pole bridgeless PFC circuit of the present invention:
in a power frequency positive half cycle, the first upper arm MOS transistor Q1 is kept in a conducting state, the first lower arm MOS transistor Q2 is kept in a cut-off state, and the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 are alternately conducted/cut-off at a high frequency.
Referring to fig. 3, when the second lower arm MOS transistor Q4 is turned on, the second upper arm MOS transistor Q3 is turned off, the current is output from the live wire end of the AC power supply AC, and returns to the neutral wire end (dotted line loop) of the AC power supply AC after sequentially flowing through the first upper arm MOS transistor Q1, the load (filter capacitor Cd1), the second lower arm MOS transistor Q4 and the inductor Lin, and the AC power supply AC and the inductor Lin output energy through the first upper arm MOS transistor Q1 and the second lower arm MOS transistor Q4 to supply power to the load and supply power to the filter capacitor Cd1, so that the filter capacitor Cd1 charges and stores energy. In this process, the electric energy of the first bootstrap capacitor Cb1 is loaded between the power supply terminal and the ground terminal of the gate driving circuit to raise the gate driving voltage of the first upper arm MOS transistor Q1, so as to ensure that the first upper arm MOS transistor Q1 is reliably turned on.
Referring to fig. 4, when the second upper arm MOS transistor Q3 is turned on, the second lower arm MOS transistor Q4 is turned off, the current of the AC power supply AC is output from the live wire end of the AC power supply AC, and flows from the first upper arm MOS transistor Q1, the second upper arm MOS transistor Q3 and the inductor Lin in sequence and then returns to the zero line end (dotted line loop) of the AC power supply AC, the AC power supply AC charges the inductor Lin through the first upper arm MOS transistor Q1 and the second upper arm MOS transistor Q3 to complete energy storage of the inductor Lin, and meanwhile, the dc load R1 supplies power through the filter capacitor Cd 1. In this process, the electric energy of the first bootstrap capacitor Cb1 is loaded between the power supply terminal and the ground terminal of the gate driving circuit to raise the gate driving voltage of the first upper arm MOS transistor Q1, so as to ensure that the first upper arm MOS transistor Q1 is reliably turned on.
In a power-frequency negative half cycle, the first lower bridge arm MOS tube Q2 is kept in a conducting state, the first upper bridge arm MOS tube Q1 is kept in a cut-off state, and the second upper bridge arm MOS tube Q3 and the second lower bridge arm MOS tube Q4 are alternately conducted/cut-off at a high-frequency.
Referring to fig. 5, when the second upper arm MOS transistor Q3 is turned on, the second lower arm MOS transistor Q4 is turned off, the current of the AC power supply AC is output from the zero line end of the AC power supply AC, and returns to the live line end (dotted line loop) of the AC power supply AC through the inductor Lin, the second upper arm MOS transistor Q3, the load (filter capacitor Cd1), and the first lower arm MOS transistor Q2 in sequence, the AC power supply AC and the inductor Lin output energy through the second upper arm MOS transistor Q3 and the first lower arm MOS transistor Q2 to supply power to the load, and supply electric energy to the filter capacitor Cd1 to charge and store energy to the filter capacitor Cd 1. In this process, when the first lower arm MOS transistor Q2 is turned on, the current of the first dc power supply VCC is output from the positive terminal of the first dc power supply VCC, and then returns to the negative terminal of the first dc power supply VCC (solid line loop) through the first diode Db1, the first resistor Rb1, the first bootstrap capacitor Cb1, and the first lower arm MOS transistor Q2, thereby completing the charging and energy storage of the first bootstrap capacitor Cb 1.
Referring to fig. 6, when the second lower arm MOS transistor Q4 is turned on, the second upper arm MOS transistor Q3 is turned off, the current of the AC power supply AC is output from the zero line end of the AC power supply AC, and returns to the live line end (dotted line loop) of the AC power supply AC through the inductor Lin, the second lower arm MOS transistor Q4 and the first lower arm MOS transistor Q2 in sequence, so that the inductor Lin is charged by the AC power supply AC through the first lower arm MOS transistor Q2 and the second lower arm MOS transistor Q4 to complete energy storage of the inductor Lin, and at this time, the filter capacitor Cd1 supplies power to the load. In this process, when the first lower arm MOS transistor Q2 is turned on, the current of the first dc power supply VCC is output from the positive terminal of the first dc power supply VCC, and then returns to the negative terminal of the first dc power supply VCC (solid line loop) through the first diode Db1, the first resistor Rb1, the first bootstrap capacitor Cb1, and the first lower arm MOS transistor Q2, thereby completing the charging and energy storage of the first bootstrap capacitor Cb 1.
In the process that the second upper arm MOS transistor Q3 and the second lower arm MOS transistor Q4 are conducted at a high frequency, when the second lower arm MOS transistor Q4 is conducted, the second bootstrap capacitor Cb2 forms a charging loop (not shown in the figure) through the first direct-current power supply VCC, the second diode Db2, the second resistor Rb2 and the second lower arm MOS transistor Q4 to store energy, and when the second upper arm MOS transistor Q3 is conducted, the electric energy of the second bootstrap capacitor Cb2 is loaded between the power supply end and the ground end of the gate driving circuit to raise the gate driving voltage of the second upper arm MOS transistor Q3, so as to ensure that the second upper arm MOS transistor Q3 is reliably conducted.
When a load is not connected to the output end of the totem-pole bridgeless PFC circuit or the load is in a standby state, the totem-pole bridgeless PFC circuit works in an intermittent oscillation mode, under the intermittent oscillation mode, the first upper bridge arm MOS tube Q1 and the second upper bridge arm MOS tube Q3 are generally in a cut-off state, and the first lower bridge arm MOS tube Q2 and the second lower bridge arm MOS tube Q4 are conducted in turn according to power frequency.
Referring to fig. 7, in a positive power-frequency half-cycle, the second lower arm MOS transistor Q4 is turned on, the first lower arm MOS transistor Q2 is turned off, the current of the AC power supply AC is output from the live wire end of the AC power supply AC, and returns to the zero line end (dotted line loop) of the AC power supply AC after sequentially flowing from the freewheeling diode of the first upper arm MOS transistor Q1, the load (filter capacitor Cd1), the second lower arm MOS transistor Q4 and the inductor Lin, so that the AC power supply AC is output through the first upper arm MOS transistor Q1 and the second lower arm MOS transistor Q4, thereby supplying electric energy to the filter capacitor Cd1 to charge and store energy in the filter capacitor Cd 1. In this process, when the second lower arm MOS transistor Q4 is turned on, the current of the first dc power supply VCC is output from the positive terminal of the first dc power supply VCC, and then returns to the negative terminal of the first dc power supply VCC (solid line loop) through the second diode Db2, the second resistor Rb2, the second bootstrap capacitor Cb2, and the first lower arm MOS transistor Q2, thereby completing the charging and energy storage of the second bootstrap capacitor Cb 2.
Referring to fig. 8, in a power-frequency negative half cycle, the first lower arm MOS transistor Q2 is turned on, the second lower arm MOS transistor Q4 is turned off, the current of the AC power supply AC is output from a zero line end of the AC power supply AC, and returns to a live wire end (a dotted line loop) of the AC power supply AC after sequentially flowing from the inductor Lin, the freewheeling diode of the second upper arm MOS transistor Q3Q1, the filter capacitor Cd1, and the inductor Lin of the first lower arm MOS transistor Q2, and the AC power supply AC is output through the first upper arm MOS transistor Q1 and the second lower arm MOS transistor Q4, so that electric energy is provided for the filter capacitor Cd1, and the filter capacitor Cd1 is charged and stored. In this process, when the first lower arm MOS transistor Q2 is turned on, the current of the first dc power supply VCC is output from the positive terminal of the first dc power supply VCC, and then returns to the negative terminal of the first dc power supply VCC (solid line loop) through the first diode Db1, the first resistor Rb1, the first bootstrap capacitor Cb1, and the first lower arm MOS transistor Q2, thereby completing the charging and energy storage of the first bootstrap capacitor Cb 1.
The invention also provides a power conversion device which comprises the totem-pole bridgeless PFC circuit. The detailed structure of the totem-pole bridgeless PFC circuit can refer to the above embodiments, and is not described herein again; it can be understood that, because the totem-pole bridgeless PFC circuit is used in the power conversion device of the present invention, the embodiment of the power conversion device of the present invention includes all technical solutions of all embodiments of the totem-pole bridgeless PFC circuit, and the achieved technical effects are also completely the same, and are not described herein again.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A totem-pole bridgeless PFC circuit is characterized by comprising at least one upper bridge arm MOS tube, at least one lower bridge arm MOS tube, an inductor, a filter capacitor and at least one bootstrap circuit, wherein each upper bridge arm MOS tube and one lower bridge arm MOS tube are connected in series to form a switch bridge arm circuit; the number of the bootstrap circuits corresponds to the number of the switch bridge arm circuits;
one end of the inductor is connected with an alternating current power supply, and the other end of the inductor is connected with the common end of the upper bridge arm MOS tube and the lower bridge arm MOS tube;
the filter capacitors are arranged at two ends of the switch bridge arm circuit in parallel;
the output end of the driving power supply circuit is respectively connected with the grid electrode of the lower bridge arm MOS tube and the input end of the bootstrap circuit; the output end of the bootstrap circuit is connected with the source electrode of the MOS tube of the upper bridge arm;
the driving power circuit is used for driving the upper bridge arm MOS tube and/or the lower bridge arm MOS tube to be conducted;
and the bootstrap circuit and the driving power supply circuit form a charging loop to store electric energy when the corresponding lower bridge arm MOS tube is conducted.
2. The totem-pole bridgeless PFC circuit of claim 1, wherein the number of the upper bridge arm MOS tubes and the lower bridge arm MOS tubes is two, and the two upper bridge arm MOS tubes are respectively a first upper bridge arm MOS tube and a second upper bridge arm MOS tube;
the two lower bridge arm MOS tubes are respectively a first lower bridge arm MOS tube and a second lower bridge arm MOS tube;
the inductor is arranged between the alternating-current power supply and the common ends of the second upper bridge arm MOS tube and the second lower bridge arm MOS tube in series.
3. The totem-pole bridgeless PFC circuit of claim 2, wherein the first upper bridge arm MOS transistor and the first lower bridge arm MOS transistor are power frequency switching transistors, and the second upper bridge arm MOS transistor and the second lower bridge arm MOS transistor are high frequency switching transistors.
4. The totem-pole bridgeless PFC circuit of claim 2, wherein the number of the bootstrap circuits is two, and the two bootstrap circuits are a first bootstrap circuit and a second bootstrap circuit, respectively; the output end of the first bootstrap circuit is connected with the source electrode of the MOS tube of the first upper bridge arm; and the output end of the second bootstrap circuit is connected with the source electrode of the second upper bridge arm MOS tube.
5. The totem-pole bridgeless PFC circuit of claim 4, wherein the first bootstrap circuit comprises a first diode, a first resistor and a first bootstrap capacitor, an anode of the first diode is connected to the output terminal of the driving power supply circuit, and a cathode of the first diode is connected to a first end of the first bootstrap capacitor through the first resistor; the second end of the first bootstrap capacitor is the output end of the first bootstrap circuit.
6. The totem-pole bridgeless PFC circuit of claim 4, wherein the second bootstrap circuit comprises a second diode, a second resistor and a second bootstrap capacitor, an anode of the second diode is connected to the output terminal of the driving power supply circuit, and a cathode of the second diode is connected to a first terminal of the second bootstrap capacitor through the second resistor; and the second end of the second bootstrap capacitor is the output end of the second bootstrap circuit.
7. The totem-pole bridgeless PFC circuit according to any one of claims 2 to 6, wherein the driving power supply circuit comprises a first direct current power supply and a gate driving circuit corresponding to each bridge arm MOS transistor, a control signal input end of each gate driving circuit is used for receiving a control signal, and a power supply input end of each gate driving circuit is connected with the first direct current power supply; the output end of each grid driving circuit is connected with the grid of the corresponding bridge arm MOS tube.
8. The totem-pole bridgeless PFC circuit of claim 7, wherein the driving power circuit further comprises a current limiting resistor corresponding to each of the bridge arm MOS transistors, and an output terminal of each of the gate driving circuits is connected to the gate of the bridge arm MOS transistor corresponding to the gate driving circuit through one of the current limiting resistors.
9. A power conversion device comprising the totem-pole bridgeless PFC circuit according to any one of claims 1 to 8.
10. An air conditioner characterized by comprising the totem-pole bridgeless PFC circuit according to any one of claims 1 to 8, or comprising the power conversion device according to claim 9.
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| CN201810591860.5A CN108736702A (en) | 2018-06-08 | 2018-06-08 | Totem non-bridge PFC circuits, power supply change-over device and air conditioner |
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| CN201810591860.5A CN108736702A (en) | 2018-06-08 | 2018-06-08 | Totem non-bridge PFC circuits, power supply change-over device and air conditioner |
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| CN116404864B (en) * | 2023-06-07 | 2023-08-08 | 西南交通大学 | Power decoupling step-up and step-down common-ground power factor correction method and topological structure |
| CN118137820A (en) * | 2024-05-10 | 2024-06-04 | 梵塔半导体技术(杭州)有限公司 | Control method and control device of totem pole PFC circuit and electronic equipment |
| CN118137820B (en) * | 2024-05-10 | 2024-07-12 | 梵塔半导体技术(杭州)有限公司 | Control method and control device of totem pole PFC circuit and electronic equipment |
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