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CN108631579B - UPS and method, system and equipment for adjusting DC bus voltage thereof - Google Patents

UPS and method, system and equipment for adjusting DC bus voltage thereof Download PDF

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Publication number
CN108631579B
CN108631579B CN201810601144.0A CN201810601144A CN108631579B CN 108631579 B CN108631579 B CN 108631579B CN 201810601144 A CN201810601144 A CN 201810601144A CN 108631579 B CN108631579 B CN 108631579B
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China
Prior art keywords
voltage
current
bus
point
adjusting
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CN201810601144.0A
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CN108631579A (en
Inventor
蔡钟山
王定富
高丽红
黄少辉
徐敏
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Zhangzhou Kehua Electric Technology Co Ltd
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Zhangzhou Kehua Technology Co Ltd
Kehua Hengsheng Co Ltd
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Priority to CN201810601144.0A priority Critical patent/CN108631579B/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • H02J9/061Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for DC powered loads
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Dc-Dc Converters (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The application discloses UPS and its direct current bus voltage adjustment method, system and equipment, include: acquiring the preceding-stage bus voltage of the current PFC circuit; judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage stabilization point voltage; if so, adjusting the voltage of the current voltage-stabilizing point, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage. According to the method and the device, when the preceding-stage bus voltage of the current PFC circuit is greater than the target voltage, the current voltage stabilization point voltage is adjusted, so that the preceding-stage bus voltage of the current PFC circuit is smaller than the adjusted voltage stabilization point voltage, the voltage loop in the PFC circuit is given to be greater than a corresponding feedback value, a switch tube in the PFC circuit is in a conducting state, at the moment, a mutual inductor in the PFC circuit cannot be saturated due to magnetic biasing, current sampling abnormity and current limiting abnormity are avoided, and the reliability of the PFC circuit is improved.

Description

UPS and method, system and equipment for adjusting DC bus voltage thereof
Technical Field
The present disclosure relates to the field of UPS technologies, and in particular, to a UPS, and a method, a system, and a device for adjusting a dc bus voltage thereof.
Background
In the current UPS (i.e. Uninterruptable Power System/Uninterruptable Power Supply) industry, the general voltage stabilization of the DC bus of the UPS is 360VDC, which ensures that the later stage inverter voltage can meet the rated inverter output under different loads and has the highest efficiency value to a certain extent. When the preceding-stage bus voltage of a PFC (Power factor correction) circuit exceeds the bus voltage at a voltage stabilizing point of the PFC circuit, the voltage ring in the PFC circuit is given to be smaller than a feedback value, a switching tube in the PFC circuit is not opened, and at the moment, a mutual inductor in the PFC circuit is easy to saturate due to magnetic biasing, so that PFC current sampling abnormity and current limiting abnormity are caused.
In summary, it can be seen that how to further improve the reliability of the PFC circuit is a problem yet to be solved.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a UPS, and a method, a system, and a device for adjusting a dc bus voltage thereof, which can further improve the reliability of a PFC circuit. The specific scheme is as follows:
in a first aspect, the present application discloses a method for adjusting a dc bus voltage of a UPS, including:
acquiring the preceding-stage bus voltage of the current PFC circuit;
judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit;
if so, adjusting the voltage of the current voltage-stabilizing point, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
Optionally, before determining whether the current preceding-stage bus voltage is greater than the target voltage, the method further includes:
and directly determining the current voltage at the voltage stabilizing point as the target voltage.
Optionally, before determining whether the current preceding-stage bus voltage is greater than the target voltage, the method further includes:
and performing subtraction processing on the current voltage of the voltage stabilizing point and a preset voltage value constant to obtain the target voltage.
Optionally, the adjusting the current regulated voltage point includes:
adjusting the voltage of the current voltage-stabilizing point based on a first preset adjustment formula;
wherein the first preset adjustment formula is:
Ubus_ref=Ucmp+ΔU;
in the formula of Ubus_refIndicating the current adjusted electricityPress UcmpAnd the delta U represents the current voltage of the voltage stabilization point and is a preset voltage value increment.
Optionally, the adjusting the current regulated voltage point includes:
adjusting the voltage of the current voltage-stabilizing point based on a second preset adjustment formula;
wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
In a second aspect, the present application discloses a UPS dc bus voltage regulation system, comprising:
the voltage acquisition module is used for acquiring the preceding-stage bus voltage of the current PFC circuit;
the voltage judging module is used for judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit;
and the voltage adjusting module is used for adjusting the current voltage-stabilizing point voltage when the voltage judging module judges that the current preceding-stage bus voltage is greater than the target voltage, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
Optionally, the UPS dc bus voltage adjustment system further includes:
and the target voltage determining module is used for directly determining the current voltage at the voltage stabilizing point as the target voltage, or subtracting the current voltage at the voltage stabilizing point from a preset voltage value constant to obtain the target voltage.
Optionally, the voltage adjustment module is specifically configured to adjust the voltage of the current voltage stabilization point based on a second preset adjustment formula; wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
In a third aspect, the present application discloses a UPS dc bus voltage regulation device, comprising a processor and a memory; wherein the processor implements the UPS dc bus voltage adjustment method disclosed above when executing the computer program stored in the memory.
In a fourth aspect, the present application discloses a UPS including the aforementioned UPS dc bus voltage regulation apparatus.
Therefore, the method and the device can adjust the current voltage of the voltage stabilization point under the condition that the voltage of the preceding-stage bus of the current PFC circuit is greater than the target voltage, so that the adjusted voltage is greater than the voltage of the preceding-stage bus of the current PFC circuit, wherein the target voltage is less than or equal to the voltage of the current voltage stabilization point. Therefore, according to the method, when the voltage of a preceding-stage bus of the current PFC circuit is greater than the voltage of a current voltage stabilization point, or when the voltage of the preceding-stage bus of the current PFC circuit is closer to the voltage of the current voltage stabilization point, the voltage of the current voltage stabilization point is adjusted, so that the voltage of the preceding-stage bus of the current PFC circuit is smaller than the adjusted voltage of the voltage stabilization point, a voltage loop in the PFC circuit is given a value greater than a corresponding feedback value, a switching tube in the PFC circuit is in a conduction state, a mutual inductor in the PFC circuit cannot be saturated due to magnetic biasing at the moment, current sampling abnormality and current limiting abnormality are avoided, and reliability of the PFC circuit is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flow chart of a UPS dc bus voltage regulation method disclosed herein;
FIG. 2 is a flow chart of a particular method for regulating the DC bus voltage of the UPS disclosed herein;
FIG. 3 is a flow chart of a particular UPS DC bus voltage regulation method disclosed herein;
FIG. 4 is a schematic diagram of a UPS DC bus voltage regulation system according to the present disclosure;
fig. 5 is a block diagram of a UPS dc bus voltage adjustment apparatus according to the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a method for adjusting the voltage of a UPS direct current bus, which is shown in figure 1 and comprises the following steps:
step S11: and acquiring the preceding-stage bus voltage of the current PFC circuit.
It should be noted that, according to the present embodiment, the PFC circuit with different structures may be selected to be applied to the UPS power supply according to different requirements of practical applications. A PFC circuit commonly used in the UPS is a PFC circuit based on a dual boost topology.
In addition, in this embodiment, the preceding-stage bus voltage of the PFC circuit may be a preceding-stage bus voltage of the PFC circuit formed after the mains voltage passes through the uncontrolled rectifier circuit, or may be a preceding-stage bus voltage of the PFC circuit directly formed without the mains voltage passing through the uncontrolled rectifier circuit.
Step S12: judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at the voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to the preset bus voltage stabilization point in the PFC circuit.
In a specific real-time manner, the target voltage may be the current regulated point voltage, that is, before the step S12, the present embodiment may directly determine the current regulated point voltage as the target voltage. Correspondingly, in the specific process of step S12, it is determined whether the current preceding-stage bus voltage is greater than the current voltage-stabilizing point voltage, and if so, it indicates that the transformer of the PFC circuit is likely to be saturated due to magnetic biasing, thereby reducing the reliability of the PFC circuit.
In another embodiment, the target voltage may be smaller than the present zener voltage, and it is understood that the difference between the target voltage and the present zener voltage may be consistent with the preset voltage constant, and the preset voltage constant is prevented from being too large. Specifically, the preset voltage constant may be any value between 5V and 10V. Correspondingly, before the step S12, the present embodiment may perform a subtraction process on the current zener voltage and the preset voltage value constant to obtain the target voltage. Accordingly, the specific process of step S12 is to determine whether the previous bus voltage is greater than the voltage value obtained by performing the subtraction processing, and if so, it indicates that the previous bus voltage is greater than the current stable point voltage, or that the previous bus voltage is very close to the current stable point voltage although being less than the current stable point voltage.
Step S13: if so, adjusting the voltage of the current voltage-stabilizing point, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
That is, in the case that the result of the determination in the step S12 is yes, it indicates that the previous bus voltage is greater than or close to the current regulated voltage point voltage, and in order to avoid the risk of saturation of the transformer in the PFC circuit caused by the previous bus voltage being greater than or close to the current regulated voltage point voltage, this embodiment adjusts the current regulated voltage point voltage and ensures that the adjusted regulated voltage point voltage is greater than the current previous bus voltage. It can be understood that, the above-mentioned adjusting the current stable voltage point specifically refers to performing an amplification process on the current stable voltage point.
Therefore, in the embodiment of the application, when the preceding-stage bus voltage of the current PFC circuit is greater than the target voltage, the current voltage at the voltage stabilization point is adjusted, so that the adjusted voltage is greater than the preceding-stage bus voltage of the current PFC circuit, where the target voltage is less than or equal to the current voltage at the voltage stabilization point. Therefore, according to the embodiment of the application, when the voltage of the preceding-stage bus of the current PFC circuit is greater than the voltage of the current voltage stabilization point, or when the voltage of the preceding-stage bus of the current PFC circuit is relatively close to the voltage of the current voltage stabilization point, the voltage of the current voltage stabilization point is adjusted, so that the voltage of the preceding-stage bus of the current PFC circuit is smaller than the adjusted voltage of the voltage stabilization point, a voltage loop in the PFC circuit is given to be greater than a corresponding feedback value, a switching tube in the PFC circuit is in a conduction state, a mutual inductor in the PFC circuit cannot be saturated due to magnetic biasing at the moment, current sampling abnormality and current limiting abnormality are avoided, and the reliability of the PFC circuit is improved.
Referring to fig. 2, an embodiment of the present application discloses a specific method for adjusting a dc bus voltage of a UPS, including:
step S21: and acquiring the preceding-stage bus voltage of the current PFC circuit.
Step S22: judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at the voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to the preset bus voltage stabilization point in the PFC circuit.
Step S23: if so, adjusting the current voltage of the voltage stabilizing point based on a first preset adjusting formula to ensure that the adjusted voltage is greater than the current preceding-stage bus voltage.
Wherein the first preset adjustment formula is:
Ubus_ref=Ucmp+ΔU;
in the formula of Ubus_refIndicates the regulated voltage, UcmpAnd the delta U represents the current voltage of the voltage stabilization point and is a preset voltage value increment.
That is, in the present embodiment, when the current preceding-stage bus voltage is greater than the target voltage, the current regulated voltage is added to a preset voltage increment, so as to obtain an adjusted regulated voltage that is greater than the current preceding-stage bus voltage.
It should be noted that, when the target voltage is a voltage value smaller than the current stable point voltage, the voltage value increment in the present embodiment may be equal to the preset voltage value constant in the foregoing embodiment, and may be set to 10V, for example.
Referring to fig. 3, an embodiment of the present application discloses a specific method for adjusting a dc bus voltage of a UPS, including:
step S31: and acquiring the preceding-stage bus voltage of the current PFC circuit.
Step S32: judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at the voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to the preset bus voltage stabilization point in the PFC circuit.
Step S33: if so, adjusting the current voltage of the voltage stabilizing point based on a second preset adjustment formula to ensure that the adjusted voltage is greater than the current preceding-stage bus voltage.
Wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
As can be seen from the second preset adjustment formula, in this embodiment, the voltage value raised by the dc bus is K under the condition that the voltage value corresponding to the commercial power voltage is raised by 1 VAC.
It can be understood that the pre-set bus voltage stabilizing point corresponds to a pre-stage voltage under a normal condition, specifically, the pre-stage voltage corresponds to a pre-stage voltage of the PFC circuit under a normal operation condition of the PFC circuit.
Correspondingly, an embodiment of the present application further discloses a UPS dc bus voltage adjustment system, as shown in fig. 4, the system includes:
the voltage obtaining module 11 is configured to obtain a preceding-stage bus voltage of the current PFC circuit;
a voltage judging module 12, configured to judge whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit;
and a voltage adjusting module 13, configured to adjust the current voltage-stabilizing point voltage when the voltage determining module 12 determines that the current preceding-stage bus voltage is greater than the target voltage, and ensure that the adjusted voltage is greater than the current preceding-stage bus voltage.
Further, the UPS dc bus voltage adjustment system in this embodiment may further include:
and the target voltage determining module is used for directly determining the current voltage at the voltage stabilizing point as the target voltage, or subtracting the current voltage at the voltage stabilizing point from a preset voltage value constant to obtain the target voltage.
In some embodiments, the voltage adjusting module 13 may specifically include:
the first adjusting unit is used for adjusting the voltage of the current voltage-stabilizing point based on a first preset adjusting formula;
wherein the first preset adjustment formula is:
Ubus_ref=Ucmp+ΔU;
in the formula of Ubus_refIndicates this toneVoltage after rectification, UcmpAnd the delta U represents the current voltage of the voltage stabilization point and is a preset voltage value increment.
In some embodiments, the voltage adjusting module 13 may specifically include:
the second adjusting unit is used for adjusting the voltage of the current voltage-stabilizing point based on a second preset adjusting formula;
wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
Therefore, in the embodiment of the application, when the preceding-stage bus voltage of the current PFC circuit is greater than the target voltage, the current voltage at the voltage stabilization point is adjusted, so that the adjusted voltage is greater than the preceding-stage bus voltage of the current PFC circuit, where the target voltage is less than or equal to the current voltage at the voltage stabilization point. Therefore, according to the embodiment of the application, when the voltage of the preceding-stage bus of the current PFC circuit is greater than the voltage of the current voltage stabilization point, or when the voltage of the preceding-stage bus of the current PFC circuit is relatively close to the voltage of the current voltage stabilization point, the voltage of the current voltage stabilization point is adjusted, so that the voltage of the preceding-stage bus of the current PFC circuit is smaller than the adjusted voltage of the voltage stabilization point, a voltage loop in the PFC circuit is given to be greater than a corresponding feedback value, a switching tube in the PFC circuit is in a conduction state, a mutual inductor in the PFC circuit cannot be saturated due to magnetic biasing at the moment, current sampling abnormality and current limiting abnormality are avoided, and the reliability of the PFC circuit is improved.
Further, referring to fig. 5, an embodiment of the present application further discloses a UPS dc bus voltage adjustment apparatus 20, which includes a processor 21 and a memory 22; wherein the processor, when executing the computer program stored in the memory, implements the steps of:
acquiring the preceding-stage bus voltage of the current PFC circuit; judging whether the current preceding-stage bus voltage is greater than the target voltage; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit; if so, adjusting the voltage of the current voltage-stabilizing point, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
In some specific embodiments, when the processor 21 executes the computer subprogram stored in the memory 22, the following steps may be specifically implemented: and directly determining the current voltage at the voltage stabilizing point as the target voltage.
In some specific embodiments, when the processor 21 executes the computer subprogram stored in the memory 22, the following steps may be specifically implemented: and performing subtraction processing on the current voltage of the voltage stabilizing point and a preset voltage value constant to obtain the target voltage.
In some specific embodiments, when the processor 21 executes the computer subprogram stored in the memory 22, the following steps may be specifically implemented: adjusting the voltage of the current voltage-stabilizing point based on a first preset adjustment formula; wherein the first preset adjustment formula is:
Ubus_ref=Ucmp+ΔU;
in the formula of Ubus_refIndicates the regulated voltage, UcmpAnd the delta U represents the current voltage of the voltage stabilization point and is a preset voltage value increment.
In some specific embodiments, when the processor 21 executes the computer subprogram stored in the memory 22, the following steps may be specifically implemented: adjusting the voltage of the current voltage-stabilizing point based on a second preset adjustment formula; wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseIndicating the preset bus stabilization voltageVoltage of preceding stage, U, corresponding to the point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
Further, the UPS dc bus voltage adjustment apparatus 20 in this embodiment may further include:
the input interface 23 is configured to obtain a computer program imported from the outside, store the obtained computer program in the memory 22, and further be configured to obtain various instructions and parameters transmitted by an external terminal device, and transmit the instructions and parameters to the processor 21, so that the processor 21 performs corresponding processing by using the various instructions and parameters. In this embodiment, the input interface 23 may specifically include, but is not limited to, a USB interface, a serial interface, and the like.
A communication unit 24 for establishing a telecommunication connection with an external terminal for remote data communication with the external terminal. In this embodiment, the communication unit 24 may specifically include, but is not limited to, a remote communication unit based on a wireless communication technology or a wired communication technology.
And the display unit 25 is used for displaying relevant information of the UPS direct-current bus voltage adjustment process in real time so that a user can know the specific conditions of the process in time.
Further, the application also discloses a UPS, which comprises the UPS direct current bus voltage adjusting device. For the specific structure of the device, reference may be made to the corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The UPS and the method, system and device for adjusting the dc bus voltage thereof provided by the present application are described in detail above, and a specific example is applied in the present application to explain the principle and implementation manner of the present application, and the description of the above embodiment is only used to help understand the method and core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A UPS direct current bus voltage adjusting method is characterized by comprising the following steps:
acquiring the preceding-stage bus voltage of the current PFC circuit;
judging whether the voltage of the preceding-stage bus is greater than a target voltage or not; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit;
if so, adjusting the voltage of the current voltage-stabilizing point, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
2. The method according to claim 1, wherein before determining whether the previous bus voltage is greater than the target voltage, the method further comprises:
and directly determining the current voltage at the voltage stabilizing point as the target voltage.
3. The method according to claim 1, wherein before determining whether the previous bus voltage is greater than the target voltage, the method further comprises:
and performing subtraction processing on the current voltage of the voltage stabilizing point and a preset voltage value constant to obtain the target voltage.
4. The method for adjusting the voltage of the UPS according to any one of claims 1 to 3, wherein the adjusting the current regulation point voltage comprises:
adjusting the voltage of the current voltage-stabilizing point based on a first preset adjustment formula;
wherein the first preset adjustment formula is:
Ubus_ref=Ucmp+ΔU;
in the formula of Ubus_refIndicates the regulated voltage, UcmpAnd the delta U represents the current voltage of the voltage stabilization point and is a preset voltage value increment.
5. The method for adjusting the voltage of the UPS according to any one of claims 1 to 3, wherein the adjusting the current regulation point voltage comprises:
adjusting the voltage of the current voltage-stabilizing point based on a second preset adjustment formula;
wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
6. A UPS direct current bus voltage adjustment system, comprising:
the voltage acquisition module is used for acquiring the preceding-stage bus voltage of the current PFC circuit;
the voltage judgment module is used for judging whether the voltage of the preceding-stage bus is greater than a target voltage or not; the target voltage is less than or equal to the current voltage at a voltage stabilization point, and the current voltage at the voltage stabilization point is the previous-stage voltage corresponding to a preset bus voltage stabilization point in the PFC circuit;
and the voltage adjusting module is used for adjusting the current voltage-stabilizing point voltage when the voltage judging module judges that the current preceding-stage bus voltage is greater than the target voltage, and ensuring that the adjusted voltage is greater than the current preceding-stage bus voltage.
7. The UPS dc bus voltage regulation system of claim 6, further comprising:
and the target voltage determining module is used for directly determining the current voltage at the voltage stabilizing point as the target voltage, or subtracting the current voltage at the voltage stabilizing point from a preset voltage value constant to obtain the target voltage.
8. The UPS direct current bus voltage adjustment system of claim 6 or 7,
the voltage adjusting module is specifically used for adjusting the voltage of the current voltage stabilizing point based on a second preset adjusting formula; wherein the second preset adjustment formula is:
Ubus_ref=Ubus_base+(Ugrid-Ucmp)*K;
in the formula of Ubus_refIndicates the regulated voltage, Ubus_baseRepresenting the corresponding preceding stage voltage, U, of the preset bus voltage stabilizing point under normal conditionsgridRepresenting the current preceding bus voltage, UcmpRepresenting the current regulated voltage point, K is a coefficient greater than 1.
9. The UPS direct-current bus voltage adjusting equipment is characterized by comprising a processor and a memory; wherein the processor, when executing the computer program stored in the memory, implements the UPS dc bus voltage adjustment method of any of claims 1 to 5.
10. A UPS comprising the UPS dc bus voltage regulation device of claim 9.
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