CN108414911B - Semiconductor wide temperature testing method - Google Patents
Semiconductor wide temperature testing method Download PDFInfo
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- CN108414911B CN108414911B CN201810171264.1A CN201810171264A CN108414911B CN 108414911 B CN108414911 B CN 108414911B CN 201810171264 A CN201810171264 A CN 201810171264A CN 108414911 B CN108414911 B CN 108414911B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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Abstract
The invention relates to a semiconductor wide temperature test method, a heat flow cover is directly covered on a fixed seal of a daughter board, high and low temperature tests are carried out on a semiconductor finished product, the heat flow cover is fixed and sealed for one time, the semiconductor finished product is taken out from the lower part, a lifting ladder is arranged below a socket, a drawer type chip loading device is arranged in the lifting ladder, a fixed elastic sheet is arranged outside a drawer, the fixed elastic sheet can be fixed in a fixed position at the top end of the lifting ladder through the spring principle for testing, the fixed elastic sheet is gathered towards the middle after the test, the drawer type chip loading device loses the fixation and can directly slide to the bottom from the lifting ladder, the finished product is taken out to facilitate the replacement of the finished product, and the drawer type chip loading device is moved to the top end. Through the hardware resource of reforming transform finished product test, reach and only need set up once the hot flow cover can carry out finished product's in batches high low temperature test, need not to remove the hot flow cover, guarantee the constancy of temperature in the hot flow cover, saved the operation to the hot flow cover, improved the efficiency of test.
Description
Technical Field
The invention relates to a testing technology, in particular to a semiconductor wide-temperature testing method.
Background
And (3) testing a finished product: the test method is used for testing the quality of the packaged chip; a heat flow cover: the device for testing the finished product at high and low temperatures covers the finished product chip like a cover, and can provide air flow of-55-125 degrees to blow the finished product chip to achieve the effect of high and low temperatures; DIB: the Dut Interface Board, the chip test Interface Board, is used for installing the finished chip and connecting the hardware of the test resource; socket, a Socket for loading finished chips, in which a certain number of pins are connected with pins on the chip.
When the integrated circuit is used for testing a finished product, the integrated circuit is usually not limited to normal temperature testing, certain chips or military chips which need to be used in high and low temperature environments need to be subjected to high and low temperature testing, the common equipment is a heat flow cover at the moment, the finished product chip is covered, and the test conditions are met by quickly raising the temperature and reducing the temperature through blowing.
The existing finished product high-low temperature test needs to move the cover of the heat flow cover away after each test, and covers the cover again after the chip is replaced, so that the operation is very troublesome and the time is wasted.
Fig. 1 is a schematic diagram of a conventional chip test interface board, wherein a Socket is fixedly mounted on a chip test interface board DIB, the Socket is connected with a peripheral flat cable, and the flat cable is connected with a tester. Fig. 2 is a schematic diagram of a high and low temperature test of a conventional finished product, a socket is mounted on a DIB, a finished chip is clamped into the socket, a spring plate in the socket abuts against each pin of the finished chip to perform a power-on high and low temperature test, a cover of a heat flow cover is directly pressed on the DIB, and gas is blown into the heat flow cover to achieve the purpose of temperature rise and temperature reduction.
The cover area of thermal current cover is fixed, according to finished product chip and socket's size, the socket quantity that generally can cover is limited, can't accomplish a plurality of finished product chips of once-testing, the finished product chip need incessantly be changed, change at every turn, all will open the thermal current cover, extract the finished product chip, change the finished product chip that does not survey, the thermal current cover all need look over down when pressing on the DIB at every turn and have between the DIB have the gap, in case there is the gap can lead to gas leakage, thereby the temperature is not up to standard, the angle assurance that needs in time to adjust to push down can not gas leakage. When the heat flow cover is lifted up, the previous sealing gas can be volatilized, so that the temperature is consistent with the room temperature, and after the heat flow cover is pressed again, the sealing gas needs to be blown for a certain time to reach the required temperature. Thus, a certain amount of time is wasted, and the testing efficiency is reduced.
Disclosure of Invention
The invention provides a semiconductor wide-temperature testing method aiming at the problem that a large amount of labor and time are wasted due to the fact that a heat flow cover needs to be loaded ceaselessly during high-low temperature testing of finished products, a finished product chip can be taken out from the lower side of a socket, the heat flow cover does not need to be moved away from a DIB to replace the chip, the heat flow cover can be fixed on the DIB all the time, air is blown all the time to ensure that the temperature cannot change, testing efficiency is greatly improved, steps for operating the heat flow cover are reduced, and only one time of loading of the heat flow cover is needed.
The technical scheme of the invention is as follows: a semiconductor wide temperature test method, there are 4 fixed columns at the edge of the test interface board of the chip, the daughter board is fixed on 4 fixed columns, the daughter board locates above the test interface board of the chip, use the winding displacement or shielded wire to carry on the connection of the resource between test interface board of the chip and the daughter board, the central area of daughter board welds the socket to load finished chip, there is a elevator connected between socket of daughter board and test interface board of the chip below the socket, there is a drawer type chip-loading device in the elevator, can move up and down in the elevator, the heat flux cover covers on daughter board and fixed seal directly; when the drawer type chip loading device with the semiconductor finished products moves to the top end of the elevator for fixing, namely the semiconductor finished products enter the socket from the lower part in place, the testing is started, the high-low temperature airflow is led out by the heat flow cover for carrying out the high-low temperature testing on the semiconductor finished products, and after the testing is finished, the drawer type chip loading device is moved to the bottom end through the elevator and is drawn out, and the semiconductor finished products are replaced; when the semiconductor finished product is tested and replaced, the daughter board and the upper heat flow cover are always kept in a sealing state, and the heat flow cover is always kept in a uniform air blowing state.
The front and the back of the drawer type chip loading device are respectively provided with two fixed elastic sheets, four fixed positions are arranged on two sides of the top end of the elevator, the four fixed elastic sheets can be popped out and clamped into the corresponding four fixed positions after the drawer type chip loading device reaches the top end, a chip in the drawer type chip loading device is in place, and the test is started.
The invention has the beneficial effects that: according to the semiconductor wide-temperature testing method, some hardware resources of finished product testing are improved, the high temperature and the low temperature of a finished product can be tested only by arranging the heat flow cover once, the heat flow cover does not need to be moved again every time a chip is replaced, the operation on the heat flow cover is saved, and the testing efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a conventional chip test interface board;
FIG. 2 is a schematic diagram of a high and low temperature test of a conventional finished product;
FIG. 3 is a schematic diagram of a conventional socket;
FIG. 4 is a diagram illustrating a semiconductor device under wide temperature range test according to the present invention;
FIG. 5 is a schematic view of the semiconductor device of the present invention after testing the wide temperature range, the stress of the fixed elastic sheet is gathered;
FIG. 6 is a schematic view of the drawer type chip mounting apparatus of the present invention lowered to a DIB board after the semiconductor wide temperature test;
FIG. 7 is a schematic drawing of the drawer-type chip mounting apparatus after the semiconductor wide temperature test according to the present invention.
Detailed Description
As shown in fig. 3, which is a schematic view of a conventional socket, a semiconductor off-chip is put in a semiconductor off-chip placing area 2 in the socket, socket4 is fixed to the DIB by screws 3, and has a cover above it to press the chip into full contact with the pins inside, as shown in fig. 4, a state diagram of a finished product during high and low temperature testing of the invention is shown, a Socket fixedly mounted on an original DIB is moved out and designed on a daughter board, the Socket is mounted on the daughter board, a scolet is inverted and mounted, a cover is removed, the Socket of the daughter board has a wire arranging port, pin resources inside the Socket scolet of the daughter board are connected with outer ring wire arranging port resources, the DIB has 4 fixing posts on the edge to fix the daughter board on the DIB, the DIB and the daughter board are connected with each other by using a wire arranging or a shielding wire, the Socket is welded on a central region of the daughter board, the Socket needs to put pins above, and a chip enters the Socket from below the Socket. An elevator is arranged below the Socket, a drawer type chip loading device is arranged in the elevator and can move up and down, the top end of the elevator is moved to be fixed, the chip enters the Socket from the lower part to be tested, and the chip is moved to the bottom end to be extracted and can be replaced by a finished chip; and the part above the daughter board, where the heat flow cover is pressed, is only required to be pressed once, and the blowing state is always kept, so that the socket temperature is basically kept unchanged, and the testing efficiency is improved.
An elevator is arranged below the socket and used for moving the drawer type chip loading device up and down, two fixed elastic sheets are arranged in front of and behind the drawer type chip loading device, four fixed positions are arranged on two sides of the top end of the elevator, the four fixed elastic sheets can be popped out and clamped into the corresponding four fixed positions after the drawer type chip loading device reaches the top end, a chip in the drawer type chip loading device is in place and starts to be tested, the fixed elastic sheets adopt a spring principle, force is applied towards two sides when external force is not applied, the two corresponding fixed elastic sheets can be gathered together by the external force, and fig. 4 is a schematic diagram of fixing the fixed elastic sheets in the fixed positions and carrying out finished product testing; FIG. 5 is a schematic view of the fixed elastic sheet being gathered under stress after the semiconductor wide temperature test is completed, the fixed elastic sheet is gathered in the middle through an external force, and the drawer-type chip mounting device can move up and down; FIG. 6 is a schematic view of the drawer-type chip mounter moving to the bottom of the elevator with a gap for drawing out the drawer after the semiconductor wide temperature test is completed and the drawer-type chip mounter is lowered to the DIB board; FIG. 7 is a schematic drawing of the drawer-type chip mounter after the semiconductor wide temperature test of the present invention, which is drawn out to facilitate chip replacement.
The semiconductor wide temperature test needs to use the heat flux cover to heat up and cool down, the heat flux cover is directly covered on the daughter board, the semiconductor finished product chip is changed below the daughter board, the heat flux cover is fixed and sealed once and can, the semiconductor finished product chip is taken out from the below, the socket below is the elevator, there is the drawer type chip loading device in the elevator, there is fixed shell fragment outside the drawer, can fix fixed shell fragment in the fixed position on elevator top through the spring principle, test, gather together fixed shell fragment to the centre after the test, the drawer type chip loading device loses fixedly, can directly slide to the bottom from the elevator, take out the chip and conveniently change the chip, after changing, move the drawer type chip loading device to the top, test. The whole process does not need to move the heat flow cover, so that the operation is saved, and the testing efficiency is improved.
Claims (2)
1. A semiconductor wide temperature test method is characterized in that 4 fixed columns are arranged on the edge of a finished chip test interface board, an auxiliary board is fixed on the 4 fixed columns, the auxiliary board is positioned above the finished chip test interface board, the finished chip test interface board and the auxiliary board are connected by using a flat cable or a shielding wire for resource connection, a socket for loading a finished chip is welded in the central area of the auxiliary board, a lifting ladder is arranged below the socket and connected between the auxiliary board socket and the finished chip test interface board, a drawer type finished chip loading device is arranged in the lifting ladder and can move up and down in the lifting ladder, and a heat flow cover is directly covered on the auxiliary board and is fixedly sealed; when the drawer type finished chip loading device with the finished chips moves to the top end of the lifting ladder to be fixed, the finished chips enter the socket from the lower part to be in place, the test can be started, the high-low temperature airflow is led out by the heat flow cover to carry out the high-low temperature test on the finished chips, and after the test is finished, the drawer type finished chip loading device is moved to the bottom end to be drawn out through the lifting ladder and the finished chips are replaced; when testing and changing finished product chip, daughter board and top heat flow cover remain the encapsulated situation all the time, and the heat flow cover keeps the even state of blowing always.
2. The method for testing the wide temperature range of a semiconductor device as claimed in claim 1, wherein the drawer-type finished chip loading device has two fixing spring pieces at the front and the rear thereof, and four fixing spring pieces are provided at two sides of the top end of the elevator, and after the drawer-type finished chip loading device reaches the top end, the four fixing spring pieces will be popped out and clamped into the corresponding four fixing positions, and the finished chip in the drawer-type finished chip loading device is in place to start the test.
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CN201810171264.1A CN108414911B (en) | 2018-03-01 | 2018-03-01 | Semiconductor wide temperature testing method |
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CN201810171264.1A CN108414911B (en) | 2018-03-01 | 2018-03-01 | Semiconductor wide temperature testing method |
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CN108414911B true CN108414911B (en) | 2020-04-14 |
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Families Citing this family (5)
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CN110058102A (en) * | 2019-05-16 | 2019-07-26 | 黄先日 | Electronic component temperature-detecting device |
CN112098198A (en) * | 2019-06-17 | 2020-12-18 | 汉达精密电子(昆山)有限公司 | Drawing force testing device |
CN113484733A (en) * | 2021-07-26 | 2021-10-08 | 北京中电华大电子设计有限责任公司 | High-low temperature testing device for semiconductor chip |
CN114200373B (en) * | 2021-12-09 | 2022-12-09 | 中国科学院上海微系统与信息技术研究所 | Small quantum resistance standard device |
CN118483551B (en) * | 2024-05-09 | 2024-11-05 | 无锡冠亚恒温制冷技术有限公司 | Chip high-low temperature testing device |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1232546A (en) * | 1996-10-07 | 1999-10-20 | 埃楚姆公司 | Modular, semiconductor reliability test system |
TW591734B (en) * | 2003-04-10 | 2004-06-11 | United Microelectronics Corp | IC tester system for eliminating electrostatic discharge damage |
CN1526076A (en) * | 2001-07-12 | 2004-09-01 | ��ʽ���簮������� | Apparatus for handling electronic components and method for controlling temperature of electronic components |
CN105654678A (en) * | 2016-01-29 | 2016-06-08 | 上海华岭集成电路技术股份有限公司 | Automatic monitoring device for state of test equipment |
CN205353132U (en) * | 2015-12-23 | 2016-06-29 | 超威半导体技术(中国)有限公司 | Automatic mechanism that inspects by ready samples of CPU test unit |
CN105891696A (en) * | 2014-11-03 | 2016-08-24 | 北京确安科技股份有限公司 | Integrated-circuit low-temperature test method |
CN106371001A (en) * | 2016-09-27 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | Device and method for controlling test temperature of chip to be tested |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2970628B2 (en) * | 1997-11-07 | 1999-11-02 | 日本電気株式会社 | High and low temperature prober and wafer measurement method |
KR20070028178A (en) * | 2005-09-07 | 2007-03-12 | 삼성전자주식회사 | Test socket for examining temperature characteristic of memory chip and control system having the same |
WO2015174631A1 (en) * | 2014-05-14 | 2015-11-19 | 주식회사 엔티에스 | Memory socket for inspecting temperature characteristics |
-
2018
- 2018-03-01 CN CN201810171264.1A patent/CN108414911B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1232546A (en) * | 1996-10-07 | 1999-10-20 | 埃楚姆公司 | Modular, semiconductor reliability test system |
CN1526076A (en) * | 2001-07-12 | 2004-09-01 | ��ʽ���簮������� | Apparatus for handling electronic components and method for controlling temperature of electronic components |
TW591734B (en) * | 2003-04-10 | 2004-06-11 | United Microelectronics Corp | IC tester system for eliminating electrostatic discharge damage |
CN105891696A (en) * | 2014-11-03 | 2016-08-24 | 北京确安科技股份有限公司 | Integrated-circuit low-temperature test method |
CN205353132U (en) * | 2015-12-23 | 2016-06-29 | 超威半导体技术(中国)有限公司 | Automatic mechanism that inspects by ready samples of CPU test unit |
CN105654678A (en) * | 2016-01-29 | 2016-06-08 | 上海华岭集成电路技术股份有限公司 | Automatic monitoring device for state of test equipment |
CN106371001A (en) * | 2016-09-27 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | Device and method for controlling test temperature of chip to be tested |
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