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CN108184073A - Image processing apparatus, system, electronic equipment and image processing method - Google Patents

Image processing apparatus, system, electronic equipment and image processing method Download PDF

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Publication number
CN108184073A
CN108184073A CN201810005796.8A CN201810005796A CN108184073A CN 108184073 A CN108184073 A CN 108184073A CN 201810005796 A CN201810005796 A CN 201810005796A CN 108184073 A CN108184073 A CN 108184073A
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China
Prior art keywords
image processing
exposure time
power supply
exposure
supply frequency
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CN201810005796.8A
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Chinese (zh)
Inventor
周新泽
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Shanghai Chuanying Information Technology Co Ltd
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Shanghai Chuanying Information Technology Co Ltd
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Priority to CN201810005796.8A priority Critical patent/CN108184073A/en
Publication of CN108184073A publication Critical patent/CN108184073A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70Circuitry for compensating brightness variation in the scene
    • H04N23/745Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70Circuitry for compensating brightness variation in the scene
    • H04N23/73Circuitry for compensating brightness variation in the scene by influencing the exposure time
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/53Control of the integration time
    • H04N25/531Control of the integration time by controlling rolling shutters in CMOS SSIS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

The present invention relates to a kind of image processing apparatus, system, electronic equipment and image processing method, described image processing unit, including:Acquisition module, for obtaining the time for exposure of often row pixel respectively;Judgment module, for judging the integral multiple of power supply supply frequency that whether the acquired time for exposure is twice;Adjust module, for the power supply supply frequency that the time for exposure is twice it is non-integral multiple when, the time for exposure is adjusted to the integral multiple of twice of power supply supply frequency;Execution module, for being exposed according to the time for exposure after adjustment.The present invention image processing apparatus and image processing method by the time for exposure is adjusted to twice power supply supply frequency integral multiple effectively to avoid the flicker in image processing process, so as to substantially increase the performance of image procossing.

Description

Image processing device, system, electronic device, and image processing method
Technical Field
The present invention relates to the field of electronic communication technologies, and in particular, to an image processing apparatus, an image processing system, an electronic device, and an image processing method.
Background
An image sensor is a device that converts an optical signal into an electrical signal, and is widely used in digital televisions and visual communication markets. At the end of the 60 s, the Bell real cell in the United states discovered that charges were transferred through semiconductor potential wells, and proposed a new concept of solid-state imaging and a one-dimensional CCD (Charge-Coupled Device) model Device.
By the beginning of the 90 s, the CCD technology has been relatively hot and has been widely used. However, as the application range of the CCD is expanded, its disadvantages are gradually revealed. First, the CCD technology chip technology is complex and not compatible with standard technologies. Secondly, the voltage power consumption required by the CCD technology chip is large, so the CCD technology chip is expensive and inconvenient to use.
Currently, the most attractive and potentially developing is the use of standard CMOS image sensors. I.e., image sensors produced by CMOS (Complementary Metal Oxide Semiconductor) technology. The CMOS image sensor chip adopts a CMOS process, and can integrate the image acquisition unit and the signal processing unit on the same chip.
Due to the characteristics, the system is suitable for large-scale mass production, and is suitable for applications requiring small size, low price and no high requirement on image pickup quality, such as a small-sized security camera, a miniature camera, a mobile phone, a computer network video conference system, a wireless handheld video conference system, a bar code scanner, a fax machine, a toy, biological microscopic counting, certain vehicle image pickup systems and other commercial fields.
Image sensors, such as CMOS image sensors (complementary metal oxide semiconductor image sensors), are currently used on an increasing number of electronic devices. CMOS image sensors have several advantages:
1) random window reading capability. Random window read operation is one aspect of CMOS image sensors that is functionally superior to CCDs, also referred to as region of interest selection.
2) And radiation resistance. In general, the potential radiation resistance of CMOS image sensors is significantly enhanced relative to CCD performance.
3) System complexity and reliability. The use of CMOS image sensors can greatly simplify the system hardware architecture.
4) And a non-destructive data reading method.
5) Optimized exposure control.
In view of the relatively superior performance of the CMOS image sensor, the CMOS image sensor has been widely used in various fields. In particular, many electronic devices use CMOS image sensors with electronic rolling shutters (rolling shutters). Unlike mechanical shutters, rolling shutters require different portions of the image to be exposed at different time intervals, i.e., each successive image row is offset in time, resulting in flicker (fliker) when image data is acquired under existing fluorescent light.
The COMOS image sensor using the rolling shutter performs exposure in a line-by-line manner, that is, the exposure time of any pixel (pixel) in the same line is consistent, that is, the starting point of the exposure time is consistent with the exposure time.
However, the CMOS image sensor using the rolling shutter can only ensure that the starting point of the exposure time of any pixel in each line is consistent with the exposure time, but cannot ensure that the starting point of the exposure time of any line is consistent, and although the exposure times are consistent, the integrated energy of the exposure is easy to generate difference, that is, the exposure amount of each line is different, and the phenomenon occurs when the light and the shade are alternated, which is flicker (fliker).
Therefore, how to effectively avoid the flicker phenomenon in the image processing process becomes one of the problems to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide an image processing device, an image processing system, an electronic device and an image processing method, which are used for effectively avoiding the problem of flicker generated in the image processing process.
In order to achieve the above object, the present invention provides an image processing apparatus, an image processing system, an electronic device, and an image processing method, wherein the image processing apparatus includes: the acquisition module is used for respectively acquiring the exposure time of each row of pixels; the judging module is used for judging whether the acquired exposure time is an integral multiple of two times of power supply frequency; the adjusting module is used for adjusting the exposure time to be integral multiple of the doubled power supply frequency when the exposure time is non-integral multiple of the doubled power supply frequency; and the execution module is used for carrying out exposure according to the adjusted exposure time.
The acquisition module includes: a clock signal acquisition unit for acquiring a clock signal of the pixel; a line length acquisition unit for acquiring a line length signal for each line of exposure; and the calculating unit is used for calculating the exposure time of each row of pixels according to the clock signal and the row length signal.
The adjusting module adjusts the exposure time to an integer multiple of twice a power supply frequency by adjusting a frequency of a clock signal of a pixel.
The present invention also provides an image processing system comprising: an image sensor having a rolling shutter, and an image processing apparatus of any of the foregoing.
The image sensor includes a CMOS image sensor.
The invention also provides an electronic device comprising the image processing system.
The electronic device includes: one or more of a mobile phone, a smartphone, a tablet, a handheld computer, a digital camera.
The invention also provides an image processing method, which comprises the following steps: respectively acquiring the exposure time of each row of pixels; judging whether the acquired exposure time is an integral multiple of twice of the power supply frequency; adjusting the exposure time to an integer multiple of twice the power supply frequency when the exposure time is a non-integer multiple of twice the power supply frequency; and carrying out exposure according to the adjusted exposure time.
The step of separately acquiring the exposure time of each row of pixels comprises: respectively acquiring a clock signal of a pixel and a line length signal of each line of exposure; and calculating the exposure time of each row of pixels according to the clock signal and the row length signal.
The step of adjusting the exposure time to an integer multiple of twice the power supply frequency comprises: the exposure time is adjusted to an integer multiple of twice the power supply frequency by adjusting the frequency of the clock signal of the pixel.
In summary, the image processing apparatus, the image processing system, the electronic device and the image processing method according to the present invention have the following advantages compared with the prior art:
the image processing device and the image processing method of the invention effectively avoid the flicker in the image processing process by adjusting the exposure time to be integral multiple of twice power supply frequency, thereby greatly improving the performance of image processing;
in addition, the image processing device and the image processing method have simple, reliable, flexible and convenient adjustment modes, thereby greatly reducing the cost of the image processing device and the image processing system.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.
FIG. 1 is a waveform diagram illustrating a supply frequency of a power supply according to the prior art;
FIG. 2 is a schematic diagram of an image processing apparatus according to the present invention;
FIG. 3 is a schematic structural diagram of an acquisition module according to the present invention;
FIG. 4 is a schematic diagram of an image processing system according to the present invention
FIG. 5 is a circuit diagram of an implementation of an image processing system in the present invention;
FIG. 6 is a circuit diagram of a pixel array of the CMOS image processor of the present invention;
fig. 7 is a flowchart illustrating an implementation manner of the image processing method according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is noted that, in this document, relational terms such as "first," "second," "third," and the like, if any, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," "includes," "including," "has," "having" or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrases "comprising … …" or "comprising … …" does not exclude the presence of additional elements in a process, method, article, or terminal that comprises the element. Further, herein, "greater than," "less than," "more than," and the like are understood to exclude the present numbers; the terms "above", "below", "within" and the like are to be understood as including the number.
The technical solution of the present invention will be described in detail with reference to fig. 1 to 7 by specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
As previously set forth: the present applicant has conducted intensive studies on the cause of flicker (flicker) generated when a CMOS image sensor acquires image data under a fluorescent lamp as a light source, and found that the root cause is caused by different light energies irradiated on different pixels, and the difference of the light energies received by the different pixels is the difference of the brightness of the image. The alternating current light source is mainly caused by power frequency interference, the alternating current light source has light intensity fluctuation, the current alternating current frequency is usually 50Hz, therefore, the light intensity fluctuation is 100Hz, and the period is 10 ms. As shown in fig. 1, the waveform of the current domestic ac with a power frequency of 50HZ is a sine wave, and the integral energy is shown in fig. 1.
Since the exposure of the CMOS image sensor is performed in a line-by-line manner, the exposure time of any one pixel is the same, that is, the exposure starting point and the exposure time of each pixel on the same line are the same, so that the energy received by all points on the same line is the same, and the exposure starting point is different between different lines although the exposure time is the same, so that the energy received by different lines is not necessarily the same, which causes the phenomenon of light and dark phases between different lines, thereby generating flicker.
Fig. 2 is a schematic structural diagram of an implementation of the image processing apparatus of the present invention, and as shown in fig. 2, the image processing apparatus includes: the device comprises an acquisition module 10, a judgment module 20, an adjustment module 30 and an execution module 40. Wherein,
an obtaining module 10, configured to obtain exposure time of each row of pixels respectively;
as shown in fig. 3, fig. 3 is a schematic structural diagram of an implementation manner of the obtaining module 10 in this embodiment, specifically, in this embodiment, the obtaining module 10 includes: a clock signal acquisition unit 101, a line length acquisition unit 102, and a calculation unit 103. Wherein,
a clock signal acquisition unit 101 for acquiring a clock signal of a pixel;
a line length acquisition unit 102 for acquiring a line length signal for each line exposure;
a calculating unit 103, configured to calculate an exposure time of each row of pixels according to the clock signal and the row length signal.
With continued reference to fig. 2, the determining module 20 is configured to determine whether the obtained exposure time is an integral multiple of twice the power supply frequency;
an adjusting module 30, configured to adjust the exposure time to be an integer multiple of the doubled power supply frequency when the exposure time is a non-integer multiple of the doubled power supply frequency;
and the execution module 40 is configured to perform exposure according to the adjusted exposure time.
In this embodiment, the adjusting module 30 adjusts the exposure time to be an integral multiple of twice the power supply frequency by adjusting the frequency of the clock signal of the pixel.
As shown in fig. 1, the current domestic ac power supply frequency is usually 50HZ, and the waveform thereof is sinusoidal, so that the fluctuation of the light intensity is 100HZ (i.e. twice the power supply frequency), that is, the period is 10 ms. Integral formula according to exposure time:
total Integration Time ≈ (coarse _ Integration Time line _ length)/vt _ clk; the integrated value of the exposure Time (Total Integration Time) of each line is correlated with the line length information (line _ length) and the clock signal (vt _ clk) of the pixel.
Under the condition that the line length information is fixed, the integral value of the exposure time of each line can be adjusted by adjusting the clock signal of the pixel; if the integral values of the exposure time of each row are integral multiples of twice the power supply frequency, flicker can be effectively avoided. The following detailed description is given with reference to specific embodiments.
For example, when the clock signal for the pixels is set to 224MHz, the exposure time for each row is about 23985 us; because the exposure time is not an integral multiple of 100HZ, the flicker phenomenon occurs. If the pixel clock signal is set to 280MHz, the exposure time of each line is finally calculated to be about 29991us, very close to an integer multiple of 100Hz, and there is no flicker phenomenon.
Specifically, the applicant of the present invention obtained a kernel log when a CMOS image sensor including a rolling shutter found flicker, and obtained the following information:
obtaining main log again to obtain the following information
I.e. corresponding exposure table
{29993,3200,1024,0,0,0},//TV=5.06(2277 Lines)AV=2.00 SV=6.64 BV=0.42
Reanalysis driven base configuration
It was found that the clock signal for the pixel was set to 224MHz, resulting in a rolling shutter (shutter) being miscalculated to 1821, which eventually could be written to the CMOS image sensor, resulting in a calculated exposure time (about 23985us) that is not an integer multiple of 100Hz, resulting in water ripple.
To address this flicker phenomenon, applicants set the pixel's clock signal to 280MHz, then shutter would be calculated to 2277,
1,shutter is 2277,framelength=2530,linelength=3688,
the final exposure time (about 29991us) is very close to an integral multiple of 100Hz, so that no water ripple exists, and the flicker phenomenon is effectively avoided.
In this embodiment, the obtaining module 10, the determining module 20, the adjusting module 30 and the executing module 40 may be implemented by hardware, software or a combination of hardware and software.
For example, the aforementioned modules may be integrated on the same circuit board, and the corresponding circuit modules implement the functions, and the circuit board may further include necessary memories (such as an FIFI memory, a RAM, or any other suitable memory). The clock signal, the line length signal, or the calculated exposure time of the pixels may be stored in the memory. In addition, the integrated circuit may be implemented as a microprocessor, such as a CPU, MCU, etc., executing executable instructions stored in a memory (e.g., RAM, ROM, distributed memory in an internet server, or any other suitable memory storing executable instructions), which is not limited in this respect.
As shown in fig. 4, the present invention also provides an image processing system, specifically, the image processing system includes: an image sensor 3 having a rolling shutter 2, and an image processing apparatus 1.
Specifically, in this embodiment, the image processing apparatus 1 may include an obtaining module 10, a determining module 20, an adjusting module 30, and an executing module 40. The image processing apparatus 1 in this embodiment can adopt the image processing apparatus shown in fig. 2, and is not described herein again.
In this embodiment, the image sensor includes a CMOS image sensor. As shown in FIG. 5, FIG. 5 is a circuit schematic diagram of one embodiment of an image processing system of the present invention.
In this embodiment, in the CMOS image processing system, various circuits are integrated on the same chip; specifically, an analog signal processing circuit, an I (2) C control interface, exposure/white balance control, a video timing generation circuit, a digital conversion circuit, row selection, column selection, and amplification, and a photosensitive cell array are integrated on the chip.
The analog signal processing circuit on the chip mainly performs a Correlated Double Sampling (CDS) function.
The on-chip a/D converters can be classified into pixel level, column level and chip level, i.e. one a/D converter for each pixel, one a/D converter for each column of pixels, or one a/D converter for each photo-sensing array. Due to the chip size limitation, a/D converters at the pixel level are not easy to implement.
A series of control registers are provided inside the CMOS chip, functions such as self-gain, automatic exposure, white balance, correction and the like are controlled through bus programming (such as a Pc bus), and the CMOS chip is simple in programming and flexible in control. The directly output digital image signal can be conveniently interfaced with a subsequent processing circuit for processing by a digital signal processor.
The basic operating principle of the CMOS image sensor is explained in detail below:
first, the pixel array is irradiated by the external light to generate a photoelectric effect, and corresponding charges are generated in the pixel units. The row selection logic unit gates corresponding row pixel units according to requirements. The image signals in the row pixel units are transmitted to the corresponding analog signal processing units and A/D converters through the signal buses of the columns where the image signals are located, and the image signals are converted into digital image signals to be output.
The row selection logic unit can scan the pixel array line by line or interlace. The row selection logic unit and the column selection logic unit are matched for use, so that the window extraction function of the image can be realized.
The main function of the analog signal processing unit is to amplify the signal and improve the signal-to-noise ratio. In addition, in order to obtain a practical camera with qualified quality, various control circuits, such as exposure time control, automatic gain control, etc., must be included in the chip. In order to operate each circuit in the chip at a predetermined clock, a plurality of timing control signals must be used. In order to facilitate the application of the camera, the chip is also required to output some timing signals, such as a synchronization signal, a line start signal, a field start signal, and the like.
One intuitive performance index of an image sensor is the ability to reproduce an image. The pixel array is a key functional module directly related to the index. According to different pixel array unit structures, the pixel units can be divided into passive pixel units PPS (passive pixel scheme), active pixel units APS (active pixel chemical) and logarithmic pixel units, and the active pixel units APS can be further divided into photosensitive diode type APS and grating type APS.
The above pixel array units have features, but they have basically the same working principle. The basic operation of the pixel array is described in detail below, as shown in fig. 6:
(1) firstly, entering a reset state, opening a gate tube M at the moment, charging the capacitor to V r, and enabling the diode to be in a reverse state;
(2) then the person is in a sampling state, the gate tube M is closed, the diode generates light current under illumination, charges stored on the capacitor are discharged, after a fixed time interval, the amount of charges reserved on the capacitor C is in direct proportion to the illumination, and an image is shot into the sensitive element array;
(3) finally, the method enters a 'reading state', and then the gate tube M is opened to read the charge voltage stored on the capacitor C in each pixel one by one.
The passive pixel element PPS appears earliest and the structure does not change much since it appears. The passive pixel unit PPS has simple structure, high pixel filling rate and high quantum efficiency, but has two obvious defects. First, its read noise is relatively large, typically 20 electrons, whereas commercial CCD-level technology chips typically have a read noise of 20 electrons. Second, as the number of pixels increases, the read rate increases, and thus the read noise becomes large.
The photosensitive diode type APS has high quantum efficiency, the quality of output graphic signals is improved greatly compared with the prior art due to the adoption of a new noise elimination technology, the read noise is generally 75-100 electrons, and the C3 in the structure is suitable for middle and low-grade application occasions.
In the grating type APS structure, fixed pattern noise is suppressed. The readout noise is 10 to 20 electrons. However, the process is complicated and is not a perfect CMOS process. Due to the introduction of the polysilicon covering layer, the quantum efficiency is low, especially for blue light. As far as now it appears, the overall performance advantages are not very significant.
As mentioned above, the image processing system may include a CMOS image processor, and various signal data acquired or calculated by the CMOS image processor may be stored in a memory, which may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic disk storage devices, flash memory devices, or other non-volatile solid state storage devices. In certain embodiments, the memory may also include memory that is remote from the one or more processors, such as network-attached memory accessed via RF circuitry or external ports and a communication network (not shown), which may be the internet, one or more intranets, Local Area Networks (LANs), wide area networks (WLANs), Storage Area Networks (SANs), etc., or a suitable combination thereof. The memory controller may control access to the memory by other components of the device, such as the CPU and peripheral interfaces.
In order to solve the problem of flicker caused by the inconsistency of the exposure energy between the rows, the image processing system in the embodiment adjusts the integral value of the exposure time to be an integral multiple of twice the power supply frequency when the integral value of the exposure time is not an integral multiple of twice the power supply frequency, so that the energy obtained during the exposure of each row is consistent, and the flicker is effectively avoided.
The invention also provides electronic equipment comprising the image processing system. In this embodiment, the electronic device includes, but is not limited to, a handheld computer, a tablet computer, a mobile phone, a smart phone, a media player, a Personal Digital Assistant (PDA), a digital camera, and the like, and also includes a combination of two or more of them.
The electronic device typically includes memory, a memory controller, one or more processing units (CPUs), peripheral interfaces, RF circuits, audio circuits, speakers, microphones, input/output (I/O) subsystems, touch screens, other output or control devices, and external ports. These components communicate over one or more communication buses or signal lines. It should be understood that the electronic device in this embodiment is only an example, and in a specific application, the components of the electronic device may have more or less components or have different component configurations; and the various components may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and/or application specific integrated circuits.
The electronic device may also include a power system for powering the various components. The power system may include a power management system, one or more power sources (e.g., battery, Alternating Current (AC)), a charging system, power failure detection circuitry, a power converter or inverter, a power status indicator (e.g., Light Emitting Diode (LED)), and any other components associated with power generation, management, and distribution in a portable device.
The present invention further provides an image processing method, as shown in fig. 7, fig. 7 is a flowchart illustrating an implementation manner of the image processing method of the present invention, and specifically the image processing method includes:
step S10, respectively acquiring the exposure time of each row of pixels;
step S20 of determining whether the acquired exposure time is an integral multiple of twice the power supply frequency;
when the exposure time is a non-integral multiple of twice the power supply frequency,
executing step S30 to adjust the exposure time to an integral multiple of twice the power supply frequency;
step S40 is executed to perform exposure according to the adjusted exposure time.
Specifically, in step S10, the step of respectively acquiring the exposure time of each row of pixels includes: respectively acquiring a clock signal of a pixel and a line length signal of each line of exposure; and calculating the exposure time of each row of pixels according to the clock signal and the row length signal.
Step S30, wherein the step of adjusting the exposure time to an integer multiple of twice the power supply frequency comprises: the exposure time is adjusted to an integer multiple of twice the power supply frequency by adjusting the frequency of the clock signal of the pixel.
In this embodiment, the current domestic ac power frequency is usually 50HZ, and the waveform thereof is a sine wave, so the fluctuation of the light intensity is 100HZ (i.e. twice the power supply frequency), i.e. the period is 10 ms. Integral formula according to exposure time:
total Integration Time ≈ (coarse _ Integration Time line _ length)/vt _ clk; the integrated value of the exposure Time (Total Integration Time) of each line is correlated with the line length information (line _ length) and the clock signal (vt _ clk) of the pixel.
Under the condition that the line length information is fixed, the integral value of the exposure time of each line can be adjusted by adjusting the clock signal of the pixel; if the integral values of the exposure time of each row are integral multiples of twice the power supply frequency, flicker can be effectively avoided. The following detailed description is given with reference to specific embodiments.
For example, when the clock signal for the pixels is set to 224MHz, the exposure time for each row is about 23985 us; because the exposure time is not an integral multiple of 100HZ, the flicker phenomenon occurs. If the pixel clock signal is set to 280MHz, the exposure time of each line is finally calculated to be about 29991us, very close to an integer multiple of 100Hz, and there is no flicker phenomenon.
Specifically, the applicant of the present invention obtained a kernel log when a CMOS image sensor including a rolling shutter found flicker, and obtained the following information:
obtaining main log again to obtain the following information
I.e. corresponding exposure table
{29993,3200,1024,0,0,0},//TV=5.06(2277 Lines)AV=2.00 SV=6.64 BV=0.42
Reanalysis driven base configuration
It was found that the clock signal for the pixel was set to 224MHz, resulting in a rolling shutter (shutter) being miscalculated to 1821, which eventually could be written to the CMOS image sensor, resulting in a calculated exposure time (about 23985us) that is not an integer multiple of 100Hz, resulting in water ripple.
To address this flicker phenomenon, applicants set the pixel's clock signal to 280MHz, then shutter would be calculated to 2277,
1,shutter is 2277,framelength=2530,linelength=3688,
the final exposure time (about 29991us) is very close to an integral multiple of 100Hz, so that no water ripple exists, and the flicker phenomenon is effectively avoided.
With continued reference to fig. 7, when the exposure time is an integral multiple of twice the power supply frequency, step S50 is executed to perform exposure according to the acquired exposure time.
Since the exposure time is an integral multiple of twice the power supply frequency, no adjustment is required, and no flicker is generated by directly performing exposure according to the acquired exposure time. Therefore, the adjusting time can be effectively shortened, and the exposure efficiency is improved.
In summary, the image processing apparatus, the image processing system, the electronic device and the image processing method provided by the present invention only need to determine the exposure time and adjust the exposure time only when the obtained exposure time is a non-integral multiple of twice the power supply frequency, so that the final exposure time is an integral multiple of twice the power supply frequency, thereby effectively avoiding the generation of the flicker phenomenon.
Compared with the prior art, the image processing device, the image processing system, the electronic equipment and the image processing method have the following advantages that: the adjustment mode is flexible and quick, the flicker can be effectively avoided, the cost does not need to be increased, and the adjustment efficiency is higher, so that the performance of the equipment is greatly improved.
As will be appreciated by one skilled in the art, the above-described embodiments may be provided as a method, apparatus, or computer program product. These embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. All or part of the steps in the methods according to the embodiments may be implemented by a program instructing related hardware, where the program may be stored in a storage medium readable by a computer device and used to execute all or part of the steps in the methods according to the embodiments.
The various embodiments described above are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a computer apparatus to produce a machine, such that the instructions, which execute via the processor of the computer apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.

Claims (10)

1. An image processing apparatus characterized by comprising:
the acquisition module is used for respectively acquiring the exposure time of each row of pixels;
the judging module is used for judging whether the acquired exposure time is an integral multiple of two times of power supply frequency;
the adjusting module is used for adjusting the exposure time to be integral multiple of the doubled power supply frequency when the exposure time is non-integral multiple of the doubled power supply frequency;
and the execution module is used for carrying out exposure according to the adjusted exposure time.
2. The image processing apparatus of claim 1, wherein the acquisition module comprises:
a clock signal acquisition unit for acquiring a clock signal of the pixel;
a line length acquisition unit for acquiring a line length signal for each line of exposure;
and the calculating unit is used for calculating the exposure time of each row of pixels according to the clock signal and the row length signal.
3. The image processing apparatus according to claim 2, wherein the adjusting module adjusts the exposure time to an integer multiple of twice a power supply frequency by adjusting a frequency of a clock signal of a pixel.
4. An image processing system, comprising: an image sensor having a rolling shutter, and an image processing apparatus as claimed in any one of claims 1 to 3.
5. The image processing system of claim 4, wherein the image sensor comprises a CMOS image sensor.
6. An electronic device, characterized in that it comprises an image processing system according to any of claims 4-5.
7. The electronic device of claim 6, wherein the electronic device comprises: one or more of a mobile phone, a smartphone, a tablet, a handheld computer, a digital camera.
8. An image processing method, comprising:
respectively acquiring the exposure time of each row of pixels;
judging whether the acquired exposure time is an integral multiple of twice of the power supply frequency;
adjusting the exposure time to an integer multiple of twice the power supply frequency when the exposure time is a non-integer multiple of twice the power supply frequency;
and carrying out exposure according to the adjusted exposure time.
9. The image processing method according to claim 8, wherein the step of separately acquiring the exposure time of each row of pixels comprises:
respectively acquiring a clock signal of a pixel and a line length signal of each line of exposure;
and calculating the exposure time of each row of pixels according to the clock signal and the row length signal.
10. The image processing method according to claim 9, wherein the step of adjusting the exposure time to an integer multiple of twice a power supply frequency comprises: the exposure time is adjusted to an integer multiple of twice the power supply frequency by adjusting the frequency of the clock signal of the pixel.
CN201810005796.8A 2018-01-03 2018-01-03 Image processing apparatus, system, electronic equipment and image processing method Pending CN108184073A (en)

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Application publication date: 20180619