CN107966865A - Production method, array base palte and the display panel of array base palte - Google Patents
Production method, array base palte and the display panel of array base palte Download PDFInfo
- Publication number
- CN107966865A CN107966865A CN201711370713.7A CN201711370713A CN107966865A CN 107966865 A CN107966865 A CN 107966865A CN 201711370713 A CN201711370713 A CN 201711370713A CN 107966865 A CN107966865 A CN 107966865A
- Authority
- CN
- China
- Prior art keywords
- alignment mark
- black matrix
- underlay substrate
- base palte
- array base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Optical Filters (AREA)
- Liquid Crystal (AREA)
Abstract
The present invention provides a kind of production method of array base palte, by carrying out surface hydrophobicity processing to one side of the alignment mark backwards to underlay substrate, so that the alignment mark surface hydrophobicity, so that when black matrix material is deposited on the underlay substrate, due to the hydrophobic performance on the alignment mark surface, so that the black matrix material will not be deposited on the alignment mark, or it is deposited on thinner thickness of the thickness compared with the black matrix material layer of other positions of the black matrix material layer on the alignment mark, and then the black matrix material layer is avoided to block the alignment mark, ensure clear identification of the alignment device to the alignment mark, and then ensure the positional precision of the black matrix, improve the quality of the liquid crystal display panel.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of production method of array base palte, array base palte and display
Panel.
Background technology
When preparing black matrix on liquid crystal display panel, register guide is first generally set on the substrate for forming the black matrix
Note, then black matrix material layer is formed on the substrate, the black matrix material layer is finally patterned to obtain the black matrix.
When patterning the black matrix material layer, for pattern the black matrix material layer light shield need with the alignment mark into
Row contraposition.But when the thickness of the black matrix material layer is thicker, the black matrix material layer can block the register guide
Note, so as to influence identification of the alignment device to the alignment mark, and then influences the positional precision of the black matrix, influences the liquid
The quality of LCD panel.
The content of the invention
The present invention provides a kind of production method of array base palte, array base palte and display panel, avoids the black matrix material
The bed of material blocks the alignment mark alignment device, so as to improve the positional precision of the black matrix, improves the liquid
The quality of LCD panel.
The production method of the array base palte includes step:
Alignment mark is formed on underlay substrate;
Surface hydrophobicity processing is carried out to one side of the alignment mark backwards to the underlay substrate so that the alignment mark
Backwards to the surface hydrophobicity of the underlay substrate;
Black matrix material layer is deposited on the underlay substrate so that the black matrix material layer covers the substrate base
Plate, and the black matrix material layer is less than the other positions of black matrix material layer corresponding to the thickness of the position of the alignment mark
The thickness put;Alternatively, the black matrix material layer covers the underlay substrate in addition to corresponding to the position of the alignment mark
Other positions;
Pattern the black matrix material layer and form black matrix.
Wherein, step " carrying out surface hydrophobicity processing to one side of the alignment mark backwards to the underlay substrate " includes:
Hydrophobic film layer is covered backwards to the one side of the underlay substrate in the alignment mark, the surface energy of the hydrophobic film layer is less than
The surface energy of the alignment mark.
Wherein, the hydrophobic film layer is fluoro containing polymers film layer, siliceous macromolecule membrane layer or functional molecular layer.
Wherein, the hydrophobic film layer by vapour deposition, electrochemical deposition, inkjet printing, spraying, scraper for coating or
Any one mode is formed on the alignment mark in dip coated.
Wherein, step " handling one side of the alignment mark backwards to the underlay substrate " includes:To described right
The one side backwards to the underlay substrate of position mark is handled, in the one side backwards to the underlay substrate of the alignment mark
Form hydrophobic micro-nano structure.
Wherein, the array substrate manufacturing method further includes step:Thin film transistor (TFT) and cabling are formed on underlay substrate,
The cabling is formed with the alignment mark by same processing procedure.
Wherein, the array substrate manufacturing method further includes step:Patterned colourama is formed in the black matrix
Resistance layer and pixel electrode.
The array base palte includes underlay substrate, alignment mark on the underlay substrate and is laminated in the substrate
Black matrix on substrate, the black matrix cover the alignment mark, and the thickness of the black matrix covered on the alignment mark is small
In the thickness of the black matrix other positions;Alternatively, the black matrix and the alignment mark are misaligned.
Wherein, the alignment mark deviates from the one side of the underlay substrate covered with hydrophobic film layer or the contraposition
Mark deviates from the one side of the underlay substrate formed with hydrophobic micro-nano structure.
The display panel includes the array base palte.
The production method of the array base palte provided by the invention, by the alignment mark backwards to the underlay substrate
One side carry out surface hydrophobicity processing so that the alignment mark surface hydrophobicity so that the black matrix material is deposited on
When on the underlay substrate, due to the hydrophobic performance on the alignment mark surface, so that the black matrix material will not sink
Product on the alignment mark, or the black matrix material layer being deposited on the alignment mark thickness compared with other positions
Black matrix material layer thinner thickness, and then avoid the black matrix material layer from blocking the alignment mark, ensure contraposition
Clear identification of the device to the alignment mark, and then ensure the positional precision of the black matrix, improve the liquid crystal display panel
Quality.
Brief description of the drawings
For more clearly illustrate the present invention construction feature and effect, come below in conjunction with the accompanying drawings with specific embodiment to its into
Row describes in detail.
Fig. 1 is the flow chart of the production method of the array base palte of the embodiment of the present invention;
Fig. 2-Fig. 5 is the section signal of the array base palte of each step of production method of the array base palte of embodiment described in Fig. 1
Figure.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes.Wherein, the drawings are for illustrative purposes only and are merely schematic diagrams, it is impossible to is interpreted as the limitation to this patent.
Referring to Fig. 1, the present invention provides a kind of production method of array base palte.In the present embodiment, pass through the array base
The production method of plate makes to obtain array base palte 100.Wherein, the production method of the array base palte 100 includes:
Step 110, referring to Fig. 2, on underlay substrate 10 formed alignment mark 20.
On the underlay substrate 10 thin film transistor (TFT) 30 and cabling 40 are formed by patterning processes.The thin film transistor (TFT)
30 is same as the prior art with the production method of the cabling 40, herein without repeating.Wherein, the cabling 40 with it is described right
Position mark 20 is formed by same processing procedure.Specifically, the first metal material layer is formed on the underlay substrate 10, to described
One metal material layer carries out light blockage coating, exposure, development, the patterning processes such as etching form the of the thin film transistor (TFT) 30 at the same time
One metal layer, the cabling 40 and the alignment mark 20.Easily learn, the alignment mark 20 is metallic diaphragm.
In the present embodiment, the alignment mark 20 is formed for metallic aluminium.Further, the array base palte 100 includes viewing area and encloses
Non-display area around the viewing area.The alignment mark 20 of the present invention is located in the non-display area, to avoid described right
Position 20 shading of mark.
Further, in some embodiments of the invention, color light resistance layer is also formed with the underlay substrate 10.
Step 120, referring to Fig. 3, to the alignment mark 20 backwards to the underlay substrate 10 one side carry out surface dredge
Water process so that the alignment mark 20 is hydrophobic backwards to the one side of the underlay substrate 10.
In the present embodiment, surface hydrophobicity processing bag is carried out backwards to the one side of the underlay substrate 10 to the alignment mark 20
Include:Hydrophobic film layer 50 is covered on the alignment mark 20.Specifically, beaten by vapour deposition, electrochemical deposition, ink-jet
Hydrophobic material is formed on the alignment mark 20 by any one mode in print, spraying, scraper for coating or dip coated, and
So that the hydrophobic material is formed on the alignment mark 20, the hydrophobic material on the alignment mark 20 is formed at i.e.
For the hydrophobic film layer 50.Wherein, the hydrophobic film layer 50 for fluoro containing polymers film layer, siliceous macromolecule membrane layer or
The relatively low film layer of the surface energies such as functional molecular layer so that the hydrophobic film layer 50 has hydrophobic, oleophobic characteristic.It is described to dredge
Surface energy of the surface energy of water thin film layer 50 at least below the alignment mark 20.Also, by selected to use described hydrophobic
The difference of material, selects different thin film-forming methods.In the present embodiment, the hydrophobic material is organic siliconresin or fluorocarbon resin,
It is formed at by way of inkjet printing on the alignment mark 20.Also, by controlling the ink-jet region of the inkjet printing,
So that the hydrophobic film layer 50 is only covered in or the region slightly larger than the alignment mark 20.It is it is understood that described " right
One side of the position mark 20 backwards to the underlay substrate 10 ", which refers to cover, corresponds to the contraposition in the film layer of the alignment mark 20
The position of mark 20.For example, in the present embodiment, the first metal layer of the alignment mark 20 and the thin film transistor (TFT) is located at together
One layer, multi-layer transparent insulating layer and/or passivation layer are also formed with the alignment mark 20, described " alignment mark 20 is backwards to institute
State the one side of underlay substrate 10 " refer to insulating layer or passivation of the alignment mark 20 away from the most last layer of the underlay substrate
On the layer and 20 corresponding position of alignment mark.Wherein, to alignment mark 20 backwards to the underlay substrate 10 one side into
Projection of the hydrophobic film layer 50 of row surface hydrophobicity processing on first metal material layer covers the alignment mark 20.
In the other embodiments of invention, color light resistance layer is also formed with the underlay substrate 10, then described " alignment mark 20 is backwards to institute
State the one side of underlay substrate 10 " refer in the color light resistance layer with the 20 corresponding position of alignment mark.
In the other embodiments of invention, surface is carried out to one side of the alignment mark 20 backwards to the underlay substrate 10
Hydrophobic treatment can also be:By the micro-processing methods such as photoetching technique, laser etching techniques to the alignment mark 20 backwards
The one side of the underlay substrate is handled, and hydrophobic micro-nano structure is formed on the surface of the alignment mark 20.Wherein, it is described
Micro-nano structure is the regular geometry set with array, wherein, the size of the geometry is micron-sized structure,
So that the micro-nano structure has preferable hydrophobic, oleophobic performance.
In other embodiments of the invention, table is carried out to one side of the alignment mark 20 backwards to the underlay substrate 10
Face hydrophobic treatment can also be:One side by way of ion implanting to the alignment mark 20 backwards to the underlay substrate 10
Carry out surface modification, i.e., the other elements of one side doping in the alignment mark 20 backwards to the underlay substrate 10, so as to drop
Surface energy of the low alignment mark 20 backwards to the one side of the underlay substrate 10 so that the alignment mark 20 is backwards to the lining
The surface of substrate 10 has good hydrophobic, oleophobic performance.
Step 130, referring to Fig. 4, depositing black matrix material layer 60 on the underlay substrate 10 so that the black matrix
Material layer 60 covers the underlay substrate 10, and the black matrix material layer 60 corresponds to the thickness of the position of the alignment mark 20
Thickness of the degree less than 60 other positions of black matrix material layer;Alternatively, the black matrix material layer 60 covers the substrate base
Other positions of the plate 10 in addition to corresponding to the position of the alignment mark 20.
Specifically, pass through any one mode such as vapour deposition or inkjet printing, spraying, scraper for coating, dip coated
Black matrix material layer 60 is deposited on the underlay substrate 10 so that the black matrix material layer 60 covers the underlay substrate
10.Since the alignment mark 20 is backwards to the surface hydrophobicity of the underlay substrate 10, the black matrix material layer 60 is not easy shape
Described in Cheng Yu on alignment mark 20, so that the black matrix material layer 60 corresponds to the thickness of the position of the alignment mark 20
Thickness of the degree less than 60 other positions of black matrix material layer;Alternatively, the black matrix material layer 60 will not be formed at it is described
On alignment mark 20, i.e., described black matrix material layer 60 only covers the underlay substrate 10 and removes corresponding to the alignment mark 20
Other positions outside position.At this time, the alignment mark 20 will not be by the black matrix material blocks, so that in follow-up processing procedure
In, ensure that the alignment device can clearly identify the alignment mark 20.In the present embodiment, the black matrix material layer 60 is only
Cover other positions of the underlay substrate 10 in addition to corresponding to the position of the alignment mark 20.
Step 140, referring to Fig. 5, patterning the black matrix material layer 60 forms black matrix 61.
Light shield is arranged on the side formed with the black matrix material layer 60 on the underlay substrate 10.It is right on the light shield
The position of alignment mark 20 described in Ying Yu on underlay substrate 10 is equipped with correspondence markings.By alignment device to the alignment mark 20
It is identified, is aligned with adjusting the correspondence markings on the light shield with the alignment mark 20 on the underlay substrate 10.Again
By being developed to the black matrix material layer 60, being exposed, the Patternized technique such as etching and form black matrix 61.
In the present embodiment, the array base palte 100 is the array base palte 100 of GOA structures, i.e. 60 direct row of color light resistance layer
Described in Cheng Yu on array base palte 100.Therefore, after the black matrix 61 is formed, the production method of the array base palte 100 is also
Including step:Patterned color light resistance layer and pixel electrode (not shown) are formed in the black matrix 61.Wherein, institute
Pixel electrode is stated to be electrically connected by via and the thin film transistor (TFT) 30.It is understood that in other realities of the present invention
Apply in example, the color light resistance layer is also formed with the underlay substrate 10.I.e. after the black matrix 61 is formed, described
Only need to form patterned pixel electrode in black matrix 61.The production method of the array base palte 100 provided by the invention, leads to
Cross and surface hydrophobicity processing is carried out to one side of the alignment mark 20 backwards to the underlay substrate 10 so that the alignment mark 20
One side backwards to the underlay substrate 10 is hydrophobic, so that when being that black matrix material is deposited on the underlay substrate 10, by
Hydrophobic performance in 20 surface of alignment mark, so that the black matrix material will not be deposited on the alignment mark 20
On, or the black matrix material layer 60 being deposited on the alignment mark 20 thickness compared with other positions black matrix material
The thinner thickness of layer 60, and then avoid the black matrix material layer 60 from blocking the alignment mark 20, ensure alignment device to institute
The clear identification of alignment mark 20 is stated, and then ensures the positional precision of the black matrix 61, improves the product of the array base palte 100
Matter.Made it is understood that the production method can be not only used for array base palte 100, can also need to make applied to other
On the substrate for making black matrix 61, such as the making of the color membrane substrates in common liquid crystal display panel, or OLED display panel
Making etc..
Referring to Fig. 5, the present invention provides a kind of array base palte 100, the array base palte 100 is by the array base palte 100
Production method obtain.The array base palte 100 includes underlay substrate 10, the alignment mark 20 on the underlay substrate 10
And it is laminated in the black matrix 61 on the underlay substrate 10.
The underlay substrate 10 can be the flexible base board of the formation such as rigid substrates or PI, PET of the formation such as glass.This
In embodiment, the alignment mark 20 is the metal film layer with certain geometrical shape, so that the alignment device can
Clearly identification, also, the contraposition of the array base palte 100 and light shield is conveniently realized by the alignment mark 20.This implementation
In example, the alignment mark 20 is square aluminum metal film layer.It is understood that the alignment mark 20 can also be
The other shapes such as triangle, cross.Further, the quantity of the alignment mark 20 is at least one.In the present embodiment, institute
Alignment mark 20 is stated as four, four alignment marks 20 are located on four angles of the underlay substrate 10 respectively, so that real
The contraposition of the existing underlay substrate 10 and the light shield.
Further, in the present embodiment, the alignment mark 20 is in the one side of the underlay substrate 10 covered with thin
Water thin film layer 50.The hydrophobic film layer 50 only covers the alignment mark 20, or slightly larger than the alignment mark 20 so that institute
The one side that alignment mark 20 is stated away from the underlay substrate 10 has hydrophobic, fuel shedding quality, so that the black matrix 61 is not
The alignment mark 20 is easily formed in the one side of the underlay substrate 10.Alternatively, in other embodiments of the invention
In, the alignment mark 20 deviates from the one side of the underlay substrate 10 formed with hydrophobic micro-nano structure, or the register guide
Note 20 has carried out surface modification away from the one side of the underlay substrate 10, so that the alignment mark 20 deviates from the substrate
The one side of substrate 10 has hydrophobic, fuel shedding quality.
Further, in the present embodiment, array setting is additionally provided between the underlay substrate 10 and the black matrix 61
Thin film transistor (TFT) 30 and corresponding cabling 40.Wherein, the thin film transistor (TFT) 30 includes the first metal layer, the first metal layer
It is located at same layer with the cabling 40 and the alignment mark 20.The black matrix 61 covers the thin film transistor (TFT) 30 and described
Cabling 40, so as to ensure that the array base palte 100 has good appearance.Also, in the present embodiment, the black matrix 61
Also cover the alignment mark 20.Since one side of the alignment mark 20 away from the underlay substrate 10 has hydrophobic, oleophobic
Characteristic, the black matrix 61 are not easily formed in the alignment mark 20 in the one side of the underlay substrate 10, therefore, institute
The thickness for stating the black matrix 61 covered on alignment mark 20 is less than the thickness of 61 other positions of black matrix so that by described black
What the alignment mark 20 that matrix 61 covers can be readily apparent is identified by alignment device.Also, in other implementations of the present invention
In example, the black matrix 61 and the alignment mark 20 are misaligned, i.e., described alignment mark 20 will not be covered by the black matrix 61
Lid so that the alignment mark 20 can be easier clearly to be identified by alignment device.
Further, the array base palte 100 includes viewing area and non-display area, the alignment mark 20 and described hydrophobic
Film layer 50 is respectively positioned in the non-display area, so that the alignment mark 20 and the hydrophobic film layer 50 will not be to institutes
The light transmission for stating array base palte 100 has an impact.
Further, the array base palte 100 is the array base palte 100 of GOA structures, i.e., is gone back on described array base palte 100
Formed with color light resistance layer.In the present embodiment, patterned color light resistance layer and pixel electrode are additionally provided with the black matrix 61.
Wherein, the pixel electrode is electrically connected by via and the thin film transistor (TFT) 30.
The array base palte 100 provided by the invention, due to the hydrophobic performance on 20 surface of alignment mark, so that
The black matrix material layer 60 will not be deposited on the alignment mark 20, or is deposited on described on the alignment mark 20
The thickness of black matrix material layer 60 and then avoids the black matrix material compared with the thinner thickness of the black matrix material layer 60 of other positions
The bed of material 60 can block the alignment mark 20, ensure clear identification of the alignment device to the alignment mark 20, and then described in guarantee
The positional precision of black matrix 61, improves the quality of the array base palte 100.
The present invention also provides a kind of display panel, the display panel includes the array base palte 100.Due to the array
The black matrix 61 of substrate 100 has higher positional precision so that and the array base palte 100 has higher quality,
So that the display panel also has higher quality.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (10)
1. a kind of production method of array base palte, it is characterised in that including step:
Alignment mark is formed on underlay substrate;
Surface hydrophobicity processing is carried out to one side of the alignment mark backwards to the underlay substrate so that the alignment mark is backwards
The surface hydrophobicity of the underlay substrate;
Black matrix material layer is deposited on the underlay substrate so that the black matrix material layer covers the underlay substrate, and
The thickness that the black matrix material layer corresponds to the position of the alignment mark is less than the black matrix material layer other positions
Thickness;Alternatively, the black matrix material layer covering underlay substrate is other in addition to corresponding to the position of the alignment mark
Position;
Pattern the black matrix material layer and form black matrix.
2. the production method of array base palte as claimed in claim 1, it is characterised in that step is " to the alignment mark backwards
The one side of the underlay substrate carries out surface hydrophobicity processing " include:One side in the alignment mark backwards to the underlay substrate
Hydrophobic film layer is covered, the surface energy of the hydrophobic film layer is less than the surface energy of the alignment mark.
3. the production method of array base palte as claimed in claim 2, it is characterised in that the hydrophobic film layer is fluorine-containing high score
Sub- film layer, siliceous macromolecule membrane layer or functional molecular layer.
4. the production method of array base palte as claimed in claim 2, it is characterised in that the hydrophobic film layer is sunk by gas phase
Any one mode is formed at the contraposition in product, electrochemical deposition, inkjet printing, spraying, scraper for coating or dip coated
On mark.
5. the production method of array base palte as claimed in claim 1, it is characterised in that step is " to the alignment mark backwards
The one side of the underlay substrate is handled " include:To the alignment mark at the one side of the underlay substrate
Reason, hydrophobic micro-nano structure is formed in the one side backwards to the underlay substrate of the alignment mark.
6. the production method of array base palte as claimed in claim 1, it is characterised in that the array substrate manufacturing method also wraps
Include step:Thin film transistor (TFT) and cabling are formed on underlay substrate, the cabling passes through same processing procedure shape with the alignment mark
Into.
7. the production method of array base palte as claimed in claim 1, it is characterised in that the array substrate manufacturing method also wraps
Include step:Patterned color light resistance layer and pixel electrode are formed in the black matrix.
A kind of 8. array base palte, it is characterised in that including underlay substrate, alignment mark and stacking on the underlay substrate
Black matrix on the underlay substrate, the black matrix cover the alignment mark, the black square covered on the alignment mark
The thickness of battle array is less than the thickness of the black matrix other positions;Alternatively, the black matrix and the alignment mark are misaligned.
9. array base palte as claimed in claim 8, it is characterised in that the alignment mark deviates from the one side of the underlay substrate
On covered with hydrophobic film layer or the alignment mark away from the underlay substrate one side formed with hydrophobic micro-nano structure.
10. a kind of display panel, it is characterised in that including the array base palte described in claim 8-9 any one.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711370713.7A CN107966865A (en) | 2017-12-18 | 2017-12-18 | Production method, array base palte and the display panel of array base palte |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711370713.7A CN107966865A (en) | 2017-12-18 | 2017-12-18 | Production method, array base palte and the display panel of array base palte |
Publications (1)
Publication Number | Publication Date |
---|---|
CN107966865A true CN107966865A (en) | 2018-04-27 |
Family
ID=61994542
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201711370713.7A Pending CN107966865A (en) | 2017-12-18 | 2017-12-18 | Production method, array base palte and the display panel of array base palte |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107966865A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108919582A (en) * | 2018-08-07 | 2018-11-30 | 深圳市华星光电技术有限公司 | The production method and BOA substrate of black matrix" |
CN110211502A (en) * | 2019-06-28 | 2019-09-06 | 云谷(固安)科技有限公司 | The production method of array substrate and preparation method thereof and display panel |
CN110764327A (en) * | 2019-10-22 | 2020-02-07 | 深圳市华星光电技术有限公司 | Array substrate and preparation method thereof |
CN111077744A (en) * | 2020-01-03 | 2020-04-28 | Tcl华星光电技术有限公司 | Array substrate preparation method, array substrate and liquid crystal display panel |
US11194199B2 (en) | 2020-01-03 | 2021-12-07 | Tcl China Star Optoelectronics Technology Co., Ltd | Method of manufacturing array substrate, array substrate, and LCD panel |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101225510A (en) * | 2008-01-11 | 2008-07-23 | 东华大学 | Plasma preparation method of super-hydrophobic and super-hydrophilic titanium oxide film |
CN101647106A (en) * | 2007-03-15 | 2010-02-10 | 富士通株式会社 | Surface-hydrophobicized film, material for formation of surface-hydrophobicized film, wiring layer, semiconductor device and process for producing semiconductor device |
CN104253089A (en) * | 2014-09-25 | 2014-12-31 | 京东方科技集团股份有限公司 | Preparation method of array substrate, array substrate and display device |
CN104808377A (en) * | 2015-05-13 | 2015-07-29 | 合肥鑫晟光电科技有限公司 | Alignment mark position displaying method, array substrate and manufacturing method of array substrate |
JP2015233044A (en) * | 2014-06-09 | 2015-12-24 | 大日本印刷株式会社 | Organic semiconductor element manufacturing method and organic semiconductor element |
CN106054482A (en) * | 2016-08-17 | 2016-10-26 | 京东方科技集团股份有限公司 | Array substrate, method for manufacturing same and display device |
-
2017
- 2017-12-18 CN CN201711370713.7A patent/CN107966865A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101647106A (en) * | 2007-03-15 | 2010-02-10 | 富士通株式会社 | Surface-hydrophobicized film, material for formation of surface-hydrophobicized film, wiring layer, semiconductor device and process for producing semiconductor device |
CN101225510A (en) * | 2008-01-11 | 2008-07-23 | 东华大学 | Plasma preparation method of super-hydrophobic and super-hydrophilic titanium oxide film |
JP2015233044A (en) * | 2014-06-09 | 2015-12-24 | 大日本印刷株式会社 | Organic semiconductor element manufacturing method and organic semiconductor element |
CN104253089A (en) * | 2014-09-25 | 2014-12-31 | 京东方科技集团股份有限公司 | Preparation method of array substrate, array substrate and display device |
CN104808377A (en) * | 2015-05-13 | 2015-07-29 | 合肥鑫晟光电科技有限公司 | Alignment mark position displaying method, array substrate and manufacturing method of array substrate |
CN106054482A (en) * | 2016-08-17 | 2016-10-26 | 京东方科技集团股份有限公司 | Array substrate, method for manufacturing same and display device |
Non-Patent Citations (2)
Title |
---|
北京航空制造工程研究所: "《航空制造技术》", 30 December 2013, 航空工业出版社 * |
杨洪兴,姜希猛等: "《绿色建筑发展与可再生能源应用》", 31 December 2016, 中国铁道出版社 * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108919582A (en) * | 2018-08-07 | 2018-11-30 | 深圳市华星光电技术有限公司 | The production method and BOA substrate of black matrix" |
CN110211502A (en) * | 2019-06-28 | 2019-09-06 | 云谷(固安)科技有限公司 | The production method of array substrate and preparation method thereof and display panel |
CN110764327A (en) * | 2019-10-22 | 2020-02-07 | 深圳市华星光电技术有限公司 | Array substrate and preparation method thereof |
CN111077744A (en) * | 2020-01-03 | 2020-04-28 | Tcl华星光电技术有限公司 | Array substrate preparation method, array substrate and liquid crystal display panel |
WO2021134833A1 (en) * | 2020-01-03 | 2021-07-08 | Tcl华星光电技术有限公司 | Array substrate preparation method, array substrate, and liquid crystal display panel |
US11194199B2 (en) | 2020-01-03 | 2021-12-07 | Tcl China Star Optoelectronics Technology Co., Ltd | Method of manufacturing array substrate, array substrate, and LCD panel |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107966865A (en) | Production method, array base palte and the display panel of array base palte | |
CN104659287B (en) | Pixel defining layer and preparation method, display base plate and preparation method, display device | |
KR101586263B1 (en) | Narrow frame touch input sheet and manufacturing method of same | |
WO2020258869A1 (en) | Display panel, preparation method therefor, and display device | |
US20140131743A1 (en) | Light-emitting Display Backplane, Display Device and Manufacturing Method of Pixel Define Layer | |
US9268169B2 (en) | Display panel with pixel define layer, manufacturing method of pixel define layer of display panel, and display device | |
US9575356B2 (en) | Polarizer, display substrate, display panel having the same and method of manufacturing the same | |
US20190305058A1 (en) | Pixel defining layer, production method thereof, and display substrate | |
CN109920933A (en) | Display base plate and its manufacturing method, display panel, display device | |
CN105445986A (en) | Display panel and preparation method thereof as well as display device | |
JP3830916B2 (en) | Manufacturing method of liquid crystal display element | |
CN105489786A (en) | Packaging structure and packaging method of array substrate and display panel | |
US20200353507A1 (en) | Ultrasonic sensor and manufacturing method therefor, and ultrasonic sensor array and display device | |
CN103728797B (en) | Display floater and preparation method thereof and display unit | |
CN107428127A (en) | Conducting structures, its manufacture method and the electrode including conducting structures | |
US12127468B2 (en) | Production method to produce a precision micro-mask including attaching a mask frame to a metal layer by laser welding and an AMOLED display manufactured therefrom | |
CN102646717A (en) | Array substrate, manufacturing method thereof and display device | |
CN108511394A (en) | Array substrate and its manufacturing method, display device | |
US10488710B2 (en) | Array substrate and method for manufacturing the same, and display apparatus | |
CN101221357B (en) | Device for fabricating thin film pattern and method for fabricating thin film with the same | |
CN106773406A (en) | A kind of electronic equipment, array base palte and preparation method thereof | |
CN108649052A (en) | A kind of array substrate and preparation method thereof, display device | |
CN109346619A (en) | OLED display panel and preparation method thereof | |
CN107093681B (en) | A kind of pixel defining layer preparation method, pixel defining layer and display panel | |
CN110133928A (en) | Array substrate and its manufacturing method, display panel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180427 |
|
RJ01 | Rejection of invention patent application after publication |