CN107863058A - The control circuit and control method of display panel - Google Patents
The control circuit and control method of display panel Download PDFInfo
- Publication number
- CN107863058A CN107863058A CN201711177286.0A CN201711177286A CN107863058A CN 107863058 A CN107863058 A CN 107863058A CN 201711177286 A CN201711177286 A CN 201711177286A CN 107863058 A CN107863058 A CN 107863058A
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- pmic
- control circuit
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- sequential control
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 230000000052 comparative effect Effects 0.000 claims description 15
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 8
- 235000018734 Sambucus australis Nutrition 0.000 description 1
- 244000180577 Sambucus australis Species 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- OGFXBIXJCWAUCH-UHFFFAOYSA-N meso-secoisolariciresinol Natural products C1=2C=C(O)C(OC)=CC=2CC(CO)C(CO)C1C1=CC=C(O)C(OC)=C1 OGFXBIXJCWAUCH-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The present invention discloses the control circuit and control method of a kind of display panel.The control circuit of the display panel includes：PMIC and P Gamma chips, sequential control circuit, flash memory；The chip connects the sequential control circuit, and sequential control circuit connects the flash memory；The chip removes the built-in nonvolatile storage for store code, and required code is pre-stored within the flash memory during work；The chip produces voltage required for sequential control circuit so that sequential control circuit starts normal work first；Code required during reading chip operation from flash memory after the sequential control circuit normal work, then write the register of chip.Present invention also offers the control method of the display panel.The control circuit and control method of the display panel of the present invention can remove the NVM of PMIC and P Gamma chips, reach the purpose for reducing cost.
Description
Technical field
The present invention relates to the control circuit and control method of display technology field, more particularly to a kind of display panel.
Background technology
Digital power management integrated circuit (Digital PMIC) and programmable gamma correction (P-Gamma) circuit is all aobvious
Show the circuit commonly used in panel driving.PMIC and P-Gamma circuits are all built-in with for when storing work as programmable circuit
The NVM (NonVolatile Memory, nonvolatile storage) of required code (code), and at present typically by PMIC and P-
Gamma circuits, which merge, forms single PMIC and P-Gamma chips, applied to display panel drive control, to realize numeral electricity
Source control and programmable gamma correction function.
As shown in figure 1, it is existing display panel control circuit schematic diagram, mainly include：PMIC and P-Gamma chips
11, sequential control circuit (T-con) 12, and flash memory (Flash) 13；PMIC the and P-Gamma chips 11 are via I2C buses connect
The sequential control circuit 12 is connect, the sequential control circuit 12 connects the flash memory 13 via spi bus；PMIC the and P-Gamma cores
The all built-in nonvolatile storage of PMIC and P-Gamma circuits that piece 11 is included.
Referring to Fig. 2, it is timing diagram when display panel control circuit shown in Fig. 1 works.As is shown in phantom lines, it is powered
After (Power On), the code required during read work from built-in nonvolatile storage of PMIC and P-Gamma chips 11, so
All voltage VDD33/VDD12/VDD18 required for being exported afterwards according to from predetermined electrifying timing sequence to sequential control circuit 12 etc..
Prior art is because PMIC and P-Gamma built-in chip types NVM causes cost increase (cost up), Er Qieru
Fruit caused due to ESD (Electro-static Driven Comb) or other reasons inside PMIC and P-Gamma chips built in register
(register) when being written over, exception is will appear from, whole SECO plate (T-CON board) will be caused to burn when serious, because
This needs improvement badly.
The content of the invention
Therefore, it is an object of the invention to provide a kind of control circuit of display panel, NVM built in removal, cost is reduced.
Another object of the present invention is to provide a kind of control method of display panel, NVM built in removal, cost is reduced.
To achieve the above object, the invention provides a kind of control circuit of display panel, including：PMIC and P-Gamma
Chip, sequential control circuit, flash memory；PMIC the and P-Gamma chips connect the sequential control circuit, and the sequential control circuit connects
Connect the flash memory；PMIC the and P-Gamma chips remove the built-in nonvolatile storage for store code；
The flash memory is previously stored with code required during PMIC and P-Gamma chip operations；
After the display panel control circuit is powered, PMIC the and P-Gamma chips produce sequential control circuit first
Required voltage, so that sequential control circuit starts normal work；
Generation required during reading PMIC and P-Gamma chip operations from flash memory after the sequential control circuit normal work
Code, then write the register of PMIC and P-Gamma chips.
Wherein, PMIC the and P-Gamma chips are via I2C buses connect the sequential control circuit.
Wherein, the sequential control circuit connects the flash memory via spi bus.
Wherein, PMIC the and P-Gamma chip operations when institute that the sequential control circuit will first be read from the flash memory
The code needed is stored in the storage region inside sequential control circuit, then writes the register of PMIC and P-Gamma chips；
The sequential control circuit is spaced from the register of PMIC and P-Gamma chips and reads PMIC and P- to schedule
Required code during Gamma chip operations, then during PMIC and P-Gamma chip operations with sequential control circuit storage inside
Required code is compared, and obtains comparative result；And PMIC the and P-Gamma chips are updated according to the comparative result
Code in register.
Wherein, when the comparative result is PMIC and P- from the register reading of the PMIC and P-Gamma chips
During Gamma chip operations during PMIC the and P-Gamma chip operations of required code and the sequential control circuit storage inside
During required code difference, the sequential control circuit reads required during PMIC and P-Gamma chip operations from flash memory again
Code, then write the registers of PMIC and P-Gamma chips, and by PMIC the and P-Gamma chip operations when institute of reading
The code needed is stored in the storage region inside sequential control circuit.
Wherein, the generation for corresponding to display panel different mode and state required during PMIC the and P-Gamma chip operations
Code is stored respectively in diverse location in flash memory, when sequential control circuit detects the pattern of display panel and state changes
When, sequential control circuit in time from the correspondence position of flash memory read corresponding to code, then write PMIC and P-Gamma chips
Register.
Present invention also offers the control method of above-mentioned display panel, the control circuit of the display panel includes：PMIC and
P-Gamma chips, sequential control circuit, flash memory；PMIC the and P-Gamma chips connect the sequential control circuit, the sequential control
Circuit processed connects the flash memory；PMIC the and P-Gamma chips remove the built-in nonvolatile storage for store code；Institute
State flash memory and be previously stored with code required during PMIC and P-Gamma chip operations；After the display panel control circuit is powered,
PMIC the and P-Gamma chips produce the voltage required for sequential control circuit first, so that sequential control circuit starts just
Often work；Generation required during reading PMIC and P-Gamma chip operations from flash memory after the sequential control circuit normal work
Code, the register of PMIC and P-Gamma chips is then write, wherein：
Required generation during PMIC the and P-Gamma chip operations that the sequential control circuit will first be read from the flash memory
Code is stored in the storage region inside sequential control circuit, then writes the register of PMIC and P-Gamma chips；
The sequential control circuit is spaced from the register of PMIC and P-Gamma chips and reads PMIC and P- to schedule
Required code during Gamma chip operations, then during PMIC and P-Gamma chip operations with sequential control circuit storage inside
Required code is compared, and obtains comparative result；And PMIC the and P-Gamma chips are updated according to the comparative result
Code in register.
Wherein, when the comparative result is PMIC and P- from the register reading of the PMIC and P-Gamma chips
During Gamma chip operations during PMIC the and P-Gamma chip operations of required code and the sequential control circuit storage inside
During required code difference, the sequential control circuit reads required during PMIC and P-Gamma chip operations from flash memory again
Code, then write the registers of PMIC and P-Gamma chips, and by PMIC the and P-Gamma chip operations when institute of reading
The code needed is stored in the storage region inside sequential control circuit.
Wherein, a frame or more frame time of the predetermined time interval for display panel.
Wherein, the generation for corresponding to display panel different mode and state required during PMIC the and P-Gamma chip operations
Code is stored respectively in diverse location in flash memory, when sequential control circuit detects the pattern of display panel and state changes
When, sequential control circuit in time from the correspondence position of flash memory read corresponding to code, then write PMIC and P-Gamma chips
Register.
Wherein, the electrifying timing sequence of the voltage required for the sequential control circuit is set by peripheral circuit.
To sum up, the control circuit of display panel of the invention and control method can be by the NVM of PMIC and P-Gamma chips
Remove, reach the purpose for reducing cost；Prevent because ESD or other reasons cause code to be written over and exception occur, improve
Reliability.
Brief description of the drawings
Below in conjunction with the accompanying drawings, by the way that the embodiment of the present invention is described in detail, technical scheme will be made
And other beneficial effects are apparent.
In accompanying drawing,
Fig. 1 is existing display panel control circuit schematic diagram；
Fig. 2 is timing diagram when display panel control circuit shown in Fig. 1 works；
Fig. 3 is the circuit diagram of the preferred embodiment of control circuit one of display panel of the present invention；
Fig. 4 is timing diagram when circuit shown in Fig. 3 works.
Embodiment
Circuit diagram referring to Fig. 3 and Fig. 4, Fig. 3 for the preferred embodiment of control circuit one of display panel of the present invention, figure
4 be timing diagram when circuit shown in Fig. 3 works.The control circuit of the display panel mainly includes：PMIC and P-Gamma chips
21st, sequential control circuit 22, flash memory 23；PMIC the and P-Gamma chips 21 are via I2C buses connect the sequential control circuit
22, the sequential control circuit 22 connects the flash memory 23 via spi bus；PMIC the and P-Gamma chips 21, which do not have, to be used to deposit
The nonvolatile storage of code is stored up, PMIC the and P-Gamma chips 21 code required when working is pre-stored within the flash memory 23
In.As shown in dotted portion in Fig. 4, during work, sequential control circuit 22 reads code from flash memory 23, and write PMIC and
P-Gamma chips 21.
Sequential control circuit 22 is required when first the PMIC and P-Gamma chips 21 read from the flash memory 23 are worked
Code is stored in the storage region inside sequential control circuit 22, then writes the register of PMIC and P-Gamma chips 21.
Sequential control circuit 22 is spaced from the register of PMIC and P-Gamma chips 21 and reads PMIC and P-Gamma to schedule
Required code when chip 21 works, then the PMIC and P-Gamma chips 21 with the storage inside of sequential control circuit 22 work
Shi Suoxu code is compared, and obtains comparative result；And PMIC the and P-Gamma chips are updated according to the comparative result
Code in 21 register.When the comparative result is to be read from the register of the PMIC and P-Gamma chips 21
The code required when working of PMIC and P-Gamma chips 21 and the PMIC and P- of the storage inside of sequential control circuit 22
During the work of Gamma chips 21 during required code difference, the sequential control circuit 22 reads PMIC from flash memory 23 again
And required code when working of P-Gamma chips 21, the register of PMIC and P-Gamma chips 21 is then write, and will read
PMIC and P-Gamma chips 21 when working required code be stored in the storage region inside sequential control circuit 22.
The code that sequential control circuit 22 is re-read can replacing the code that the inside of sequential control circuit 22 stored originally
Change.During code update in the register of PMIC and P-Gamma chips 21, code original in register can also be replaced
Fall.
Present invention also offers the control method of above-mentioned display panel, mainly include：
After the display panel control circuit is powered, PMIC the and P-Gamma chips produce needed for sequential control circuit first
The voltage wanted is so that sequential control circuit starts normal work.After the sequential control circuit normal work, read from flash memory
Required code during PMIC and P-Gamma chip operations, then write the register of PMIC and P-Gamma chips.The sequential control
Circuit processed be spaced to schedule from the registers of PMIC and P-Gamma chips read PMIC and P-Gamma chip operations when
Required code, then code required during PMIC and P-Gamma chip operations with sequential control circuit storage inside carry out
Compare；If it find that comparing mistake, the sequential control circuit reads PMIC and P-Gamma chip operations when institute from flash memory again
The code needed, then write the register of PMIC and P-Gamma chips；Ensure the generation in PMIC and P-Gamma chip registers
Code is written over afterwards the only wrong frame of meeting or more frame times, then will be automatically corrected, after so ensuring abnormal appearance
A period of time can recover automatically, improve reliability；Prevent because ESD or other reasons cause code to be written over and occur different
Often.
The present invention removes the NVM of PMIC and P-Gamma built-in chip types, and all codes are stored in into flash memory, save NVM,
Reaching reduces the purpose of cost.It is powered (Power On) each time, code is removed from flash memory by sequential control circuit and then write again
To register corresponding to PMIC and P-Gamma chips, so after being powered, the PMIC of PMIC and P-Gamma chips must be produced first
All voltage VDD33/VDD12/VDD18 required for raw T-CON etc., electrifying timing sequence (power sequence) can be by outer
Enclose circuit arbitrarily to set, posting for code write-in PMIC and P-Gamma chips is read from flash memory after sequential control circuit normal work
Storage, so as to which PMIC and P-Gamma chips just have output.
Code under different mode and state can be stored in flash memory diverse location by the present invention, then work as sequential control circuit
Detect pattern and when state changes, code can be taken out of from flash memory correspondence position in time and carry out and write PMIC and P-
Gamma chips correspond to register position, improve application.
To sum up, display panel control circuit of the invention and control method can move the NVM of PMIC and P-Gamma chips
Remove, reach the purpose for reducing cost；Prevent that raising can because ESD or other reasons cause code to be written over and exception occur
By property.
It is described above, for the person of ordinary skill of the art, can be with technique according to the invention scheme and technology
Other various corresponding changes and deformation are made in design, and all these changes and deformation should all belong to the appended right of the present invention
It is required that protection domain.
Claims (11)
- A kind of 1. control circuit of display panel, it is characterised in that including：PMIC and P-Gamma chips, sequential control circuit, Flash memory；PMIC the and P-Gamma chips connect the sequential control circuit, and the sequential control circuit connects the flash memory；The PMIC and P-Gamma chips remove the built-in nonvolatile storage for store code；The flash memory is previously stored with code required during PMIC and P-Gamma chip operations；After the display panel control circuit is powered, PMIC the and P-Gamma chips produce needed for sequential control circuit first The voltage wanted, so that sequential control circuit starts normal work；Code required during reading PMIC and P-Gamma chip operations from flash memory after the sequential control circuit normal work, Then the register of PMIC and P-Gamma chips is write.
- 2. the control circuit of display panel as claimed in claim 1, it is characterised in that PMIC the and P-Gamma chips via I2C buses connect the sequential control circuit.
- 3. the control circuit of display panel as claimed in claim 1, it is characterised in that the sequential control circuit is total via SPI Line connects the flash memory.
- 4. the control circuit of display panel as claimed in claim 1, it is characterised in that the sequential control circuit first will be from institute Required code is stored in the memory block inside sequential control circuit when stating PMIC the and P-Gamma chip operations read in flash memory Domain, then write the register of PMIC and P-Gamma chips；The sequential control circuit is spaced from the register of PMIC and P-Gamma chips and reads PMIC and P- to schedule Required code during Gamma chip operations, then during PMIC and P-Gamma chip operations with sequential control circuit storage inside Required code is compared, and obtains comparative result；And PMIC the and P-Gamma chips are updated according to the comparative result Code in register.
- 5. the control circuit of display panel as claimed in claim 4, it is characterised in that when the comparative result is from described Required code and the sequential control during PMIC the and P-Gamma chip operations that the register of PMIC and P-Gamma chips is read During PMIC the and P-Gamma chip operations of circuit storage inside processed during required code difference, the sequential control circuit is again Code required during PMIC and P-Gamma chip operations is read from flash memory, then writes the deposit of PMIC and P-Gamma chips Device, and required code during by PMIC the and P-Gamma chip operations of reading is stored in the memory block inside sequential control circuit Domain.
- 6. the control circuit of display panel as claimed in claim 1, it is characterised in that PMIC the and P-Gamma chip operations The Shi Suoxu code corresponding to display panel different mode and state is stored respectively in the diverse location in flash memory, when sequential control When the pattern and state of circuit detecting processed to display panel change, sequential control circuit is read from the correspondence position of flash memory in time Corresponding code is taken, then writes the register of PMIC and P-Gamma chips.
- 7. a kind of control method of display panel, the control circuit of the display panel include：PMIC and P-Gamma chips, sequential Control circuit, flash memory；PMIC the and P-Gamma chips connect the sequential control circuit, and the sequential control circuit connects the flash memory； PMIC the and P-Gamma chips remove the built-in nonvolatile storage for store code；The flash memory is previously stored with Required code during PMIC and P-Gamma chip operations；After the display panel control circuit is powered, the PMIC and P- Gamma chips produce the voltage required for sequential control circuit first, so that sequential control circuit starts normal work；When described Code required during reading PMIC and P-Gamma chip operations from flash memory, then writes after sequence control circuit normal work The register of PMIC and P-Gamma chips, it is characterised in that：Required code is protected during PMIC the and P-Gamma chip operations that the sequential control circuit will first be read from the flash memory The storage region inside sequential control circuit be present, then write the register of PMIC and P-Gamma chips；The sequential control circuit is spaced from the register of PMIC and P-Gamma chips and reads PMIC and P- to schedule Required code during Gamma chip operations, then during PMIC and P-Gamma chip operations with sequential control circuit storage inside Required code is compared, and obtains comparative result；And PMIC the and P-Gamma chips are updated according to the comparative result Code in register.
- 8. the control method of display panel as claimed in claim 7, it is characterised in that when the comparative result is from described Required code and the sequential control during PMIC the and P-Gamma chip operations that the register of PMIC and P-Gamma chips is read During PMIC the and P-Gamma chip operations of circuit storage inside processed during required code difference, the sequential control circuit is again Code required during PMIC and P-Gamma chip operations is read from flash memory, then writes the deposit of PMIC and P-Gamma chips Device, and required code during by PMIC the and P-Gamma chip operations of reading is stored in the memory block inside sequential control circuit Domain.
- 9. the control method of display panel as claimed in claim 7, it is characterised in that the predetermined time interval is display panel A frame or more frame times.
- 10. the control method of display panel as claimed in claim 7, it is characterised in that PMIC the and P-Gamma chip operations The Shi Suoxu code corresponding to display panel different mode and state is stored respectively in the diverse location in flash memory, when sequential control When the pattern and state of circuit detecting processed to display panel change, sequential control circuit is read from the correspondence position of flash memory in time Corresponding code is taken, then writes the register of PMIC and P-Gamma chips.
- 11. the control method of display panel as claimed in claim 7, it is characterised in that the sequential is set by peripheral circuit The electrifying timing sequence of voltage required for control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201711177286.0A CN107863058A (en) | 2017-11-22 | 2017-11-22 | The control circuit and control method of display panel |
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| CN201711177286.0A CN107863058A (en) | 2017-11-22 | 2017-11-22 | The control circuit and control method of display panel |
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| CN201711177286.0A Pending CN107863058A (en) | 2017-11-22 | 2017-11-22 | The control circuit and control method of display panel |
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Cited By (15)
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|---|---|---|---|---|
| CN109345991A (en) * | 2018-12-14 | 2019-02-15 | 惠科股份有限公司 | Display driving method, display driving device and display device |
| CN109712555A (en) * | 2019-02-25 | 2019-05-03 | 合肥京东方显示技术有限公司 | Control circuit board, additional circuit boards and display device |
| CN110136666A (en) * | 2019-05-05 | 2019-08-16 | 深圳市华星光电技术有限公司 | Sequence controller and timing control panel |
| CN110675794A (en) * | 2019-09-12 | 2020-01-10 | 深圳市华星光电技术有限公司 | Power management chip and driving method and driving system thereof |
| CN110718177A (en) * | 2019-11-15 | 2020-01-21 | Tcl华星光电技术有限公司 | Display device and screen recovery method thereof |
| CN110767188A (en) * | 2019-10-12 | 2020-02-07 | 深圳市华星光电技术有限公司 | Display panel driving system |
| CN110890076A (en) * | 2019-11-25 | 2020-03-17 | Tcl华星光电技术有限公司 | Display panel driving system |
| CN110930911A (en) * | 2019-12-02 | 2020-03-27 | Tcl华星光电技术有限公司 | Monitoring method and monitoring system for display panel control circuit |
| CN111105743A (en) * | 2019-12-23 | 2020-05-05 | Tcl华星光电技术有限公司 | Control circuit and control method of display panel and display device |
| CN111462692A (en) * | 2020-05-15 | 2020-07-28 | 京东方科技集团股份有限公司 | Driving circuit, restarting method thereof and display device |
| CN111583881A (en) * | 2020-05-18 | 2020-08-25 | 深圳市华星光电半导体显示技术有限公司 | Time sequence control panel |
| CN112017608A (en) * | 2020-09-01 | 2020-12-01 | Tcl华星光电技术有限公司 | Liquid crystal display and voltage regulating method thereof |
| CN112233629A (en) * | 2020-10-14 | 2021-01-15 | 深圳市华星光电半导体显示技术有限公司 | Debugging method and system for preventing panel from flickering |
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| CN115150665A (en) * | 2022-06-24 | 2022-10-04 | 深圳创维－Rgb电子有限公司 | Configuration updating method, device, equipment and medium for power management circuit board |
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| CN110718177A (en) * | 2019-11-15 | 2020-01-21 | Tcl华星光电技术有限公司 | Display device and screen recovery method thereof |
| WO2021103146A1 (en) * | 2019-11-25 | 2021-06-03 | Tcl华星光电技术有限公司 | Display panel drive system and display device |
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| CN110930911A (en) * | 2019-12-02 | 2020-03-27 | Tcl华星光电技术有限公司 | Monitoring method and monitoring system for display panel control circuit |
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| CN111462692A (en) * | 2020-05-15 | 2020-07-28 | 京东方科技集团股份有限公司 | Driving circuit, restarting method thereof and display device |
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| CN111583881A (en) * | 2020-05-18 | 2020-08-25 | 深圳市华星光电半导体显示技术有限公司 | Time sequence control panel |
| CN112017608A (en) * | 2020-09-01 | 2020-12-01 | Tcl华星光电技术有限公司 | Liquid crystal display and voltage regulating method thereof |
| CN112233629A (en) * | 2020-10-14 | 2021-01-15 | 深圳市华星光电半导体显示技术有限公司 | Debugging method and system for preventing panel from flickering |
| CN112233629B (en) * | 2020-10-14 | 2022-04-01 | 深圳市华星光电半导体显示技术有限公司 | Debugging method and system for preventing panel from flickering |
| CN113160769A (en) * | 2021-04-25 | 2021-07-23 | Tcl华星光电技术有限公司 | Driving system and driving method of display panel |
| WO2022227021A1 (en) * | 2021-04-25 | 2022-11-03 | Tcl华星光电技术有限公司 | Driving system and driving method for display panel |
| US12067926B2 (en) | 2021-04-25 | 2024-08-20 | Tcl China Star Optoelectronics Technology Co., Ltd. | Driving system and driving method of display panel |
| CN115150665A (en) * | 2022-06-24 | 2022-10-04 | 深圳创维－Rgb电子有限公司 | Configuration updating method, device, equipment and medium for power management circuit board |
| CN115150665B (en) * | 2022-06-24 | 2024-06-25 | 深圳创维－Rgb电子有限公司 | Configuration updating method, device, equipment and medium of power management circuit board |
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