CN107727243A - Un-cooled infrared focal plane array reading circuit - Google Patents
Un-cooled infrared focal plane array reading circuit Download PDFInfo
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- CN107727243A CN107727243A CN201711175496.6A CN201711175496A CN107727243A CN 107727243 A CN107727243 A CN 107727243A CN 201711175496 A CN201711175496 A CN 201711175496A CN 107727243 A CN107727243 A CN 107727243A
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- 238000001514 detection method Methods 0.000 claims abstract description 14
- 239000003990 capacitor Substances 0.000 claims description 8
- 230000005669 field effect Effects 0.000 claims description 6
- 230000010354 integration Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000004043 responsiveness Effects 0.000 abstract description 13
- 238000010586 diagram Methods 0.000 description 6
- 230000005855 radiation Effects 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 238000003331 infrared imaging Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001421 changed effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005459 micromachining Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910001935 vanadium oxide Inorganic materials 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/02—Constructional details
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
- G01J5/22—Electrical features thereof
- G01J5/24—Use of specially adapted circuits, e.g. bridge circuits
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
- G01J2005/202—Arrays
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- General Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Radiation Pyrometers (AREA)
Abstract
The present invention provides a kind of un-cooled infrared focal plane array reading circuit, including：Biasing circuit, the biasing circuit can produce bias current；Bias generating circuit, the bias generating circuit are connected to the output of the biasing circuit, the bias current can be converted into bias voltage；Detection and integrating circuit, the detection are connected to the output of the biasing circuit and the output of the bias generating circuit with integrating circuit, can produce the almost identical electric current of two-way, caused two-way difference between currents are integrated and are used as voltage output.By the reading circuit of the present invention, detector voltage output caused by underlayer temperature fluctuation and responsiveness change can be offset, meets no TEC and the requirement without catch application.
Description
Technical field
The present invention relates to infrared imagery technique, more particularly to the un-cooled infrared focal plane array in infrared imagery technique
Reading circuit.
Background technology
At present, non refrigerating infrared imaging technology has important application in fields such as military affairs, industrial or agricultural, medical science, astronomy.Make
For the infrared focal plane array of non refrigerating infrared imaging technological core, including infrared detector array and reading circuit two parts.
Wherein, microbolometer FPA array (FPA) has higher sensitivity, is a kind of most widely used uncooled ir
Focal plane arrays (FPA), its operation principle is that temperature changes after thermo-sensitive material absorbs incident infra-red radiation, so as to cause self-resistance
The change of value, the size of the change detection infrared radiation signal by measuring its resistance value.
The cantilever beam micro-bridge structure that micro-metering bolometer is generally made using micromachining technology.Bridge floor deposition has one layer
Thermo-sensitive material with high temperature coefficient of resistance (TCR), bridge floor have excellent mechanical performances by two and are coated with conductive material
Bridge leg supports, and the contact point of bridge leg and substrate is bridge pier, and bridge pier is electrically connected to the silicon reading circuit under micro-metering bolometer
(ROIC) on.By bridge leg and bridge pier, thermo-sensitive material is connected in the electricity passage of reading circuit, and formation one is temperature sensitive
And it is connected to the pixel cell on reading circuit.
Sensitive pixels unit is also known as sensitive micro-metering bolometer, corresponding to have two kinds of blind micro-metering bolometers, its
A kind of middle bridge floor is constantly equal to underlayer temperature, referred to as calorifics short circuit micro-metering bolometer with the short circuit of substrate calorifics, temperature；Another kind is
Structure is identical with sensitive micro-metering bolometer, but is blocked, so being unable to induction targets radiation, is referred to as being blocked micro-
Bolometer.Sensitive pixels unit resistance can be effectively offset using both blind micro-metering bolometers with underlayer temperature to change
The output voltage fluctuation brought, realizes no TEC (TEC) function.
The effect of reading circuit is then the processing and reading for completing micro-metering bolometer signal, and reading circuit is to infrared imaging
The performance of system has a major impact.In recent years, requirement more and more higher of the user to infrared focal plane array seeker component, not only
It is required that high-performance also requires low-power consumption, easy to use.Traditional infrared focal plane array seeker component needs strictly to be controlled with TEC
Underlayer temperature processed, ensure that detector performance is not influenceed by underlayer temperature fluctuation.Meanwhile need at regular intervals with catch school
Just ensureing picture quality.But on the one hand catch can increase power consumption and noise, disguised, another aspect, catch correction are reduced
During can not object observing, bring inconvenience to user.
The infrared focal plane array seeker component of a new generation does not use TEC temperature controls, it is not required that catch corrects, this master
To be realized by the particular design of reading circuit.Reading circuit needs to try offset detector voltage output and responsiveness to lining
The sensitiveness of bottom temperature, ensures in working range, and voltage output and responsiveness fluctuation are smaller and substantially linear.So, use
Family can compensate for the fluctuation of voltage output and responsiveness when designing movement, realize no TEC and without catch.
The content of the invention
The brief overview on the present invention is given below, to provide on the basic of certain aspects of the invention
Understand.It should be appreciated that this general introduction is not the exhaustive general introduction on the present invention.It is not intended to determine the pass of the present invention
Key or pith, nor is it intended to limit the scope of the present invention.Its purpose only provides some concepts in simplified form,
In this, as the preamble in greater detail discussed later.
Present invention solves the technical problem that one of be to provide a kind of non-refrigerating infrared focal plane reading circuit, lining can be offset
Detector voltage output caused by the temperature fluctuation of bottom and responsiveness change, meet no TEC and the requirement without catch application.
One aspect of the present invention provides a kind of un-cooled infrared focal plane array reading circuit, including：Biasing circuit, institute
Bias current can be produced by stating biasing circuit；Bias generating circuit, the bias generating circuit are connected to the biasing circuit
Output, can be converted to bias voltage by the bias current；Detection and integrating circuit, the detection are connected to integrating circuit
The output of the biasing circuit and the output of the bias generating circuit, can produce the almost identical electric current of two-way, to being produced
Raw two-way difference between currents are integrated and are used as voltage output.
According to the above of the present invention, un-cooled infrared focal plane array reading circuit provided by the invention, pass through reality
Now good matching, detector voltage output caused by underlayer temperature fluctuation and responsiveness change are counteracted, disclosure satisfy that no TEC
With the requirement applied without catch.
By excellent below in conjunction with accompanying drawing the following detailed description of the embodiment of the present invention, these and other of the invention
Point will be apparent from.
Brief description of the drawings
In order to which the above and other advantages and features of the present invention are expanded on further, below in conjunction with the accompanying drawings to the specific of the present invention
Embodiment is described in further detail.The accompanying drawing together with following detailed description include in this manual and
Form the part of this specification.Element with identical function and structure is denoted with the same reference numerals.It should be appreciated that
These accompanying drawings only describe the typical case of the present invention, and are not to be taken as the restriction to the scope of the present invention.In the accompanying drawings：
Fig. 1 is the schematic diagram of the un-cooled infrared focal plane array reading circuit of first embodiment of the invention；
Fig. 2 is the schematic diagram of the un-cooled infrared focal plane array reading circuit of second embodiment of the invention；
Fig. 3 is the schematic diagram of the un-cooled infrared focal plane array reading circuit of third embodiment of the invention.
Embodiment
The one exemplary embodiment of the present invention is described hereinafter in connection with accompanying drawing.For clarity and conciseness,
All features of actual embodiment are not described in the description.It should be understood, however, that developing any this actual implementation
It must be made during example much specific to the decision of embodiment, to realize the objectives of developer, for example, symbol
Those restrictive conditions related to system and business are closed, and these restrictive conditions may have with the difference of embodiment
Changed.In addition, it will also be appreciated that although development is likely to be extremely complex and time-consuming, to having benefited from the disclosure
For those skilled in the art of content, this development is only routine task.Herein, it is also necessary to a bit of explanation
It is that, in order to avoid having obscured the present invention because of unnecessary details, illustrate only in the accompanying drawings and according to the solution of the present invention
Closely related device structure and/or processing step, and eliminate the other details little with relation of the present invention.
One aspect of the present invention provides a kind of un-cooled infrared focal plane array reading circuit, including：Biasing circuit, institute
Bias current can be produced by stating biasing circuit；Bias generating circuit, the bias generating circuit are connected to the biasing circuit
Output, can be converted to bias voltage by the bias current；Detection and integrating circuit, the detection are connected to integrating circuit
The output of the biasing circuit and the output of the bias generating circuit, can produce the almost identical electric current of two-way, to being produced
Raw two-way difference between currents are integrated and are used as voltage output.
As described in foregoing Background Section, as the infrared focal plane array of non refrigerating infrared imaging technological core,
Including infrared detector array and reading circuit two parts.The reading circuit of the present invention is for offset detector voltage output and sound
Should rate to the sensitiveness of underlayer temperature, ensure that voltage output and responsiveness fluctuation are smaller and substantially linear in working range,
The bias current of detector is produced by biasing circuit so that detector keeps constant current in different temperature, by inclined
Generation circuit is pressed, bias current is converted to the bias voltage of detector, for offsetting the fluctuation of the noise of bias, underlayer temperature
And Joule heat, and then by detecting the electric current almost identical with integrating circuit generation two-way, then make difference to electric current and integration is
Voltage output.Due to voltage output and the temperature coefficient very little of responsiveness, therefore it disclosure satisfy that no TEC and the requirement without catch.
Embodiments of the invention are described in detail below in conjunction with accompanying drawing.
Fig. 1 is the schematic diagram of the un-cooled infrared focal plane array reading circuit of first embodiment of the invention.It is real first
Apply in example, as shown in figure 1, biasing circuit 10 includes：Input bias current Ib, the 5th FET M5, the 4th FET M4With
3rd operational amplifier op3.Input bias current IbOne end is grounded or power line Vsk, the 5th FET M of another termination5's
Drain electrode and the 4th FET M4Grid, the node is named as Veb, is the output of biasing circuit 10.3rd operational amplifier
Op3 positive inputs terminate reference voltage Vref, and negative input terminates the 5th FET M5Source electrode, output meet the 5th FET M5
Grid.4th FET M4Source electrode connect power line Vsk or ground wire, drain electrode connects the 3rd operational amplifier op3 negative input
End.
Fig. 2 is the schematic diagram of the un-cooled infrared focal plane array reading circuit of second embodiment of the invention.It is real second
Apply in example, as shown in Fig. 2 the 4th FET M4Grid and drain electrode can also short circuit, can now simplify circuit, save
Three operational amplifier op3 and the 5th FET M5.Fig. 3 is that the un-cooled infrared focal plane array of third embodiment of the invention is read
Go out the schematic diagram of circuit.In the third embodiment, as shown in figure 3, having increased the 6th FET M newly on the basis of Fig. 26, this
Effect tube grid and drain electrode short circuit, and drain and meet input bias current Ib, source electrode meets the 4th FET M4Drain electrode.6th
FET M6Grid be also output Vcas.
In the first embodiment of the present invention, as shown in figure 1, bias generating circuit 20 includes the first mirror image FET
M1m, the second operational amplifier op2, the 3rd FET M3, mirror image microbolometer resistance Rsm.First mirror image FET M1m
Grid meets the first output Veb of biasing circuit 10, and source electrode connects power line Vsk or ground wire, and drain electrode meets the 3rd FET M3Source
Pole and the second operational amplifier op2 negative input end.Second operational amplifier op2 just terminates reference voltage Vref, output end
Meet the 3rd FET M3Grid.And the 3rd FET M3Drain electrode meet mirror image microbolometer resistance RsmAnode, should
Node is the output of bias generating circuit 20, and nodename is D.Mirror image microbolometer resistance RsmNegativing ending grounding line or electricity
Source line Vsk.For the focal plane arrays (FPA) of M rows N row, D point voltages need to drive the detection of N row and integrating circuit 30, so D points can connect
One analogue buffer bf is exported again.
As shown in figure 3, in the third embodiment, bias generating circuit 20 also includes the second mirror image FET M5m, its grid
Pole meets the second output Vcas of biasing circuit 10, and source electrode meets the first mirror image FET M1mDrain electrode, drain electrode connect the 3rd field-effect
Pipe M3Source electrode and the second operational amplifier op2 negative input end.
Mirror image microbolometer resistance RsmAll it is by same material such as vanadium oxide, non-with sensitive microbolometer resistance
The thermo-sensitive resistor that crystal silicon and titanium oxide make.Mirror image microbolometer resistance can have identical hot with sensitive microbolometer
Learn, electrical characteristic, be simply blocked, can not induction targets radiation, also can be with the short circuit of substrate calorifics, temperature be constantly equal to substrate temperature
Degree.In order to reduce noise, mirror image microbolometer resistance Rsm, the 3rd FET M3, the first mirror image FET M1m, the second mirror
As FET M5m, the structure such as the second operational amplifier op2 can be that K row are in parallel, K span is between 1 to 80.For
Matching, mirror image microbolometer resistance is equal with sensitive microbolometer resistance, and often row has a micro- radiation of K row mirror images
Heat meter.
As shown in figure 1, in the first embodiment of the present invention, detection includes the first FET M with integrating circuit 301、
Second FET M2, the first operational amplifier op1, sensitive microbolometer Rs, integrator amplifier opint, reset switch Srst
With integrating capacitor Cint.First FET M1Grid connect biasing circuit 10 first output Veb, source electrode connect power line Vsk or
Ground wire, drain electrode meet the second FET M2Drain electrode, integrator amplifier opint negative input end, integrating capacitor CintAnode and
Reset switch SrstOne end.First operational amplifier op1 positive inputs terminate the output of bias generating circuit 20, negative input termination
Second FET M2Source electrode and sensitive microbolometer RsAnode, output termination the second FET M2Grid.It is sensitive
Microbolometer RsNegativing ending grounding line or power line Vsk.Integrator amplifier opint positive input termination reference voltage
Vref, output termination integrating capacitor CintNegative terminal and reset switch SrstThe other end.
As shown in figure 3, in the third embodiment, detection also includes the 7th FET M with integrating circuit 307, its grid
The second output Vcas of biasing circuit 10 is met, source electrode meets the first FET M1Drain electrode, drain electrode meet the second FET M2Leakage
Pole and integrator amplifier opint negative input end.
The present invention is specifically described by taking 640*512 array infrared focal plane array reading circuits as an example below, but not
For limiting the scope of the present invention.
As shown in Figure 1, 2, 3, infrared focal plane array reading circuit includes biasing circuit 10, bias generating circuit 20 and visited
Survey and integrating circuit 30.In detection and integrating circuit 30, integrator amplifier opint is to the first FET M1With sensitive micro- spoke
Penetrate heat meter RsDifference between currents integrated, its export expression formula be：
Wherein, I1It is the first FET M1Electric current, ISIt is sensitive microbolometer RsElectric current.TintAnd CintRespectively
It is the time of integration and integrating capacitor, VintIt is the output of integrator amplifier.
And the first FET M1With sensitive microbolometer RsElectric current be all by biasing circuit 10, bias generating circuit
20 controls.For matching, the first FET M1, the first mirror image FET M1mWith the 4th FET M4It is matching,
It may thus be appreciated that：
I1=Ib,......(2)
I1m=K*Ib,......(3)
Wherein VDIt is node D voltage, IbIt is the size of input bias current, without temperature coefficient.Then, detector is defeated
Going out expression formula is：
Under complete matching condition, RsmFor Rs1/K, therefore voltage output VintEqual to reference voltage Vref.But, due to
The heterogeneity of microbolometer resistance, actually voltage output VintWill be in reference voltage VrefFluctuation up and down.But, from formula
(5) understand, even if there is heterogeneity, VintSubstantially without temperature coefficient, because RsmWith RsTemperature coefficient cancel out each other
.
The response of detector is to work as target temperature TtDT is changedtWhen, the temperature T of sensitive microbolometersDT is changeds,
Then the resistance R of sensitive microbolometersChange, so that integrator exports VintChange.Then, responsiveness
For：
Wherein, αsIt is the temperature-coefficient of electrical resistance of sensitive microbolometer, representative value is -0.022/ DEG C,It is sensitive micro- spoke
Heat meter temperature is penetrated with the rate of change of target temperature, is determined by target temperature, microbolometer manufacture craft and optical component parameter,
Representative value is 0.01.It was found from formula (6), due to mirror image microbolometer resistance RsmWith sensitive microbolometer RsTemperature system
Number is cancelled out each other, the temperature coefficient of responsiveness also very little.
Compare formula (5) and (6) to understand, infrared focal plane read-out circuit of the invention using mirror image microbolometer with it is quick
Sense microbolometer realizes good matching, counteracts voltage output caused by underlayer temperature fluctuation and responsiveness change, electricity
Pressure output and the temperature coefficient very little of responsiveness, are also ensured that under various substrate, the stabilization of voltage output and responsiveness
Property, therefore disclosure satisfy that requirement of the detector without TEC and without catch, enormously simplify system design, reduce cost, power consumption,
Area and volume.
Above by specific embodiment, the present invention is described, but the present invention is not limited to these specific implementations
Example.It will be understood by those skilled in the art that various modifications, equivalent substitution, change etc. can also be made to the present invention, these conversion
, all should be within protection scope of the present invention without departing from the spirit of the present invention.Also, in the structure of the present invention, each portion
Part can be decomposed and/or reconfigured, and these decompose and/or reconfigured the equivalents that be considered as the present invention.
Claims (10)
- A kind of 1. un-cooled infrared focal plane array reading circuit, it is characterised in that including：Biasing circuit (10), the biasing circuit (10) can produce bias current；Bias generating circuit (20), the bias generating circuit (20) are connected to the output of the biasing circuit (10), can incite somebody to action The bias current is converted to bias voltage；Detection and integrating circuit (30), the detection are connected to output and the institute of the biasing circuit (10) with integrating circuit (30) The output of bias generating circuit (20) is stated, the almost identical electric current of two-way can be produced, caused two-way difference between currents are entered Row integrates and is used as voltage output.
- 2. un-cooled infrared focal plane array reading circuit as claimed in claim 1, it is characterised in that the biasing circuit (10) input bias current (I is includedb), the 5th FET (M5), the 4th FET (M4) and the 3rd operational amplifier (op3),Input bias current (the Ib) one end is grounded or power line (Vsk), another termination the 5th FET (M5) Drain electrode and the 4th FET (M4) grid, the 4th FET (M4) grid as the biasing circuit (10) the first output (Veb)；3rd operational amplifier (op3) the positive input termination reference voltage (Vref), negative input terminate the 5th field-effect Manage (M5) source electrode, output meet the 5th FET (M5) grid；4th FET (the M4) source electrode connect the power line (Vsk) or ground wire, drain electrode connects the 3rd operational amplifier (op3) negative input end.
- 3. un-cooled infrared focal plane array reading circuit as claimed in claim 1, it is characterised in that the biasing circuit (10) input bias current (I is includedb) and the 4th FET (M4),4th FET (the M4) grid and drain electrode short circuit, grid as the biasing circuit (10) first output (Veb)。
- 4. un-cooled infrared focal plane array reading circuit as claimed in claim 3, it is characterised in that the biasing circuit (10) the 6th FET (M is also included6),6th FET (the M6) grid and drain electrode short circuit, and drain meet the input bias current (Ib), source electrode connects 4th FET (the M4) drain electrode, and the 6th FET (M6) grid as the biasing circuit (10) Second output (Vcas).
- 5. the un-cooled infrared focal plane array reading circuit as described in one of claim 1-3, it is characterised in that the bias Generation circuit (20) includes the first mirror image FET (M1m), the second operational amplifier (op2), the 3rd FET (M3), mirror As microbolometer resistance (Rsm),The first mirror image FET (M1m) grid connect the biasing circuit (10) first output (Veb), source electrode connects power supply Line (Vsk) or ground wire, drain electrode meet the 3rd FET (M3) source electrode and second operational amplifier (op2) it is negative Input；Second operational amplifier (op2) is just terminating reference voltage (Vref), and output terminates the 3rd FET (M3) Grid；3rd FET (the M3) drain electrode meet the mirror image microbolometer resistance (Rsm) anode, the micro- spoke of mirror image Penetrate heat meter resistance (Rsm) output node (D) of the anode as the bias generating circuit (20)；The mirror image microbolometer resistance (Rsm) negativing ending grounding line or power line (Vsk).
- 6. un-cooled infrared focal plane array reading circuit as claimed in claim 4, it is characterised in thatThe bias generating circuit (20) includes the first mirror image FET (M1m), the second mirror image FET (M5m), second fortune Calculate amplifier (op2), the 3rd FET (M3), mirror image microbolometer resistance (Rsm),The first mirror image FET (M1m) grid connect the biasing circuit (10) first output (Veb), source electrode connects power supply Line (Vsk) or ground wire, drain electrode meet the second mirror image FET (M5m) source electrode；The second mirror image FET (M5m) grid connect the biasing circuit (10) it is described second output (Vcas), source electrode connects First mirror image FET (M1m) drain electrode, drain electrode meet the 3rd FET (M3) source electrode and second computing put The negative input end of big device (op2)；Second operational amplifier (op2) is just terminating reference voltage (Vref), and output terminates the 3rd FET (M3) Grid；3rd FET (the M3) drain electrode meet the mirror image microbolometer resistance (Rsm) anode, the micro- spoke of mirror image Penetrate heat meter resistance (Rsm) output node (D) of the anode as the bias generating circuit (20)；The mirror image microbolometer resistance (Rsm) negativing ending grounding line or power line (Vsk).
- 7. the un-cooled infrared focal plane array reading circuit as described in claim 5 or 6, it is characterised in that the bias production Raw circuit (20) also includes analogue buffer (bf),The output node (D) connects the analogue buffer (bf), the output as the bias generating circuit (20).
- 8. un-cooled infrared focal plane array reading circuit as claimed in claims 6 or 7, it is characterised in that the mirror image is micro- Bolometer resistance (Rsm), the 3rd FET (M3), the first mirror image FET (M1m), second image field Effect pipe (M5m), second operational amplifier (op2) be that K row are in parallel, K span is between 1 to 80.
- 9. the un-cooled infrared focal plane array reading circuit as described in one of claim 1-3, it is characterised in that the detection Include the first FET (M with integrating circuit (30)1), the second FET (M2), it is the first operational amplifier (op1), sensitive micro- Bolometer (Rs), integrator amplifier (opint), reset switch (Srst) and integrating capacitor (Cint),First FET (the M1) grid connect the biasing circuit (10) first output (Veb), source electrode connects power line (Vsk) or ground wire, drain electrode meet the second FET (M2) drain electrode, the negative input end of integrator amplifier (opint), product Divide electric capacity (Cint) anode and reset switch (Srst) one end；First operational amplifier (op1) positive input terminates the output of the bias generating circuit (20), negative input termination institute State the second FET (M2) source electrode and the sensitive microbolometer (Rs) anode, output terminates second field-effect Manage (M2) grid；Sensitive microbolometer (the Rs) negativing ending grounding line or power line (Vsk)；The positive input termination reference voltage (Vref) of the integrator amplifier (opint), output termination integrating capacitor (Cint) it is negative End and reset switch (Srst) the other end.
- 10. the un-cooled infrared focal plane array reading circuit as described in one of claim 4-8, it is characterised in that the spy Survey includes the first FET (M with integrating circuit (30)1), the 7th FET (M7), the second FET (M2), first fortune Calculate amplifier (op1), sensitive microbolometer (Rs), integrator amplifier (opint), reset switch (Srst) and integrating capacitor (Cint),First FET (the M1) grid connect the biasing circuit (10) first output (Veb), source electrode connects power line (Vsk) or ground wire, drain electrode meet the 7th FET (M7) source electrode；7th FET (the M7) grid connect the second output (Vcas) of biasing circuit (10), source electrode connects the first field-effect Manage (M1) drain electrode, drain electrode meet the second FET (M2) drain electrode, integrator amplifier (opint) negative input end, integration Electric capacity (Cint) anode and reset switch (Srst) one end；First operational amplifier (op1) positive input terminates the output of the bias generating circuit (20), negative input termination institute State the second FET (M2) source electrode and the sensitive microbolometer (Rs) anode, output terminates second field-effect Manage (M2) grid；Sensitive microbolometer (the Rs) negativing ending grounding line or power line (Vsk)；The positive input termination reference voltage (Vref) of the integrator amplifier (opint), output termination integrating capacitor (Cint) it is negative End and reset switch (Srst) the other end.
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