CN107678909A - The circuit and method of monitoring chip configuration status in a kind of server - Google Patents
The circuit and method of monitoring chip configuration status in a kind of server Download PDFInfo
- Publication number
- CN107678909A CN107678909A CN201710635684.6A CN201710635684A CN107678909A CN 107678909 A CN107678909 A CN 107678909A CN 201710635684 A CN201710635684 A CN 201710635684A CN 107678909 A CN107678909 A CN 107678909A
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- China
- Prior art keywords
- logic control
- control element
- circuit
- server
- chip
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- 238000012544 monitoring process Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims abstract description 8
- 230000007257 malfunction Effects 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 claims description 3
- 238000001514 detection method Methods 0.000 abstract description 6
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000015607 signal release Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3089—Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents
- G06F11/3093—Configuration details thereof, e.g. installation, enabling, spatial arrangement of the probes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Debugging And Monitoring (AREA)
Abstract
The present invention provides the circuit and method of monitoring chip configuration status in a kind of server.Circuit includes functional chip, logic control element and the resistance configuration circuit being connected with functional chip configuration pin and other modules.The reset signal and configuration pin of functional chip are connected on logic control element.The present invention is directed to the whether correct purpose of detection function chip configuration information, by the way that reset signal, configuration are signally attached into logic control element, compare mechanism by the detection of logic control element, realizes record during to chip configuration information mistake and alarm.
Description
Technical field
The present invention relates to server chips to configure detection technique.
Background technology
In server design, its functional chip used has various configurations pattern, it is necessary to which designer is according to reality
Need to set its configuration information.Chip can gather the level state of specific pin when resetting, to carry out internal configuration.In chip
After reset signal release, the specific pin can return to other functions.It is mainly connected as shown in Figure 1.
Because configuration feature and other functions are shared, the configuration pin can be also connected in other functional modules, should
Connection may influence whether the configuration state of functional chip.Therefore in the conventionally test of server, can use oscillograph to
Put low and high level state when pin resets and carry out actual measurement, to ensure the correctness of design.But the measurement expends excessively
Workload.Therefore a kind of design for being capable of automatic detection chip configuration status is needed.
The content of the invention
The present invention is in order to solve the above technical problems, therefore, the present invention provides monitoring chip configuration status in a kind of server
Circuit and method, it has and chip configuration information can be monitored automatically, the advantages of mistake is recorded and alarmed automatically.
To achieve these goals, the present invention adopts the following technical scheme that.
The circuit of monitoring chip configuration status in a kind of server, include functional chip, logic control element and and work(
The resistance configuration circuit and other modules of energy chip configuration pin connection.The reset signal and configuration pin of functional chip are connected to
On logic control element.
Further, logic control element is that (Complex Programmable Logic Device, complexity can by CPLD
Programmed logic device) or FPGA（Field-Programmable Gate Array, field programmable gate array）One kind.
Further, one or more of the reset signal from button, electrification reset circuit or other logic units.
Further, logic control element connection BMC（Baseboard Management Controller substrate management
Controller）, for BMC sending function chip status information.
Further, logic control element connecting fault indicator lamp, for display function failure of chip state.
A kind of method of monitoring chip configuration status in server, logic control element persistently detect the side of reset signal
Edge, if low during reset signal reset effectively, rising edge is just detected, conversely then detects trailing edge.When detecting corresponding edges
Afterwards, logic control element reads the level state of current configuration pin, and is compared with default normal condition, if the two is not
Unanimously, then logic control element misregistration information and alarm.
Further, when the level state of configuration pin is compared with default normal condition, when the two is inconsistent, logic
Control unit and lights malfunction indicator lamp to the information of BMC transmission chip config failures.
Beneficial effects of the present invention：The present invention be directed to the whether correct purpose of detection function chip configuration information, pass through by
Reset signal, configuration are signally attached to logic control element, compare mechanism by the detection of logic control element, realize to core
Record and alarm during piece configuration information mistake.
Brief description of the drawings
Fig. 1 is prior art circuits connection diagram.
Fig. 2 is the present embodiment circuit connection diagram.
Embodiment
The invention will be further described with embodiment below in conjunction with the accompanying drawings.
The circuit of monitoring chip configuration status in a kind of server, match somebody with somebody comprising functional chip, CPLD and with functional chip
Put the resistance configuration circuit and other modules of pin connection.The reset signal and configuration pin of functional chip are connected on CPLD.
Reset signal comes from button, electrification reset circuit and other logic units.CPLD connection BMC, for BMC sending function chips
Status information.CPLD connecting fault indicator lamps, for display function failure of chip state.
A kind of method of monitoring chip configuration status in server, CPLD persistently detect the edge of reset signal, if multiple
It is low during the signal of position to reset effectively, rising edge is just detected, conversely then detects trailing edge.After corresponding edges are detected, CPLD is read
The level state of current configuration pin is taken, and is compared with default normal condition, if the two is inconsistent, CPLD records are wrong
False information is simultaneously alarmed.CPLD and lights malfunction indicator lamp to the information of BMC transmission chip config failures.
Although above-mentioned the embodiment of the present invention is described with reference to accompanying drawing, model not is protected to the present invention
The limitation enclosed, one of ordinary skill in the art should be understood that on the basis of technical scheme those skilled in the art are not
Need to pay various modifications or deformation that creative work can make still within protection scope of the present invention.
Claims (7)
1. the circuit of monitoring chip configuration status in a kind of server, it is characterised in that include functional chip, logic control list
Member and the resistance configuration circuit being connected with functional chip configuration pin and other modules；The reset signal of functional chip and match somebody with somebody
Pin is put to be connected on logic control element.
2. the circuit of monitoring chip configuration status in server as claimed in claim 1, it is characterised in that logic control element is
CPLD or FPGA one kind.
3. the circuit of monitoring chip configuration status in server as claimed in claim 1, it is characterised in that reset signal comes from and pressed
The one or more of key, electrification reset circuit or other logic units.
4. the circuit of monitoring chip configuration status in server as claimed in claim 1, it is characterised in that logic control element connects
BMC is met, for BMC sending function chip status information.
5. the circuit of monitoring chip configuration status in server as claimed in claim 1, it is characterised in that logic control element connects
Malfunction indicator lamp is connect, for display function failure of chip state.
6. a kind of method of monitoring chip configuration status in server, it is characterised in that logic control element persistently detects reset
The edge of signal, if low during reset signal reset effectively, rising edge is just detected, conversely then detects trailing edge；When detecting
After corresponding edges, logic control element reads the level state of current configuration pin, and is compared with default normal condition,
If the two is inconsistent, logic control element misregistration information is simultaneously alarmed.
7. the method for monitoring chip configuration status in server as claimed in claim 6, it is characterised in that when configuration pin
Level state is compared with default normal condition, and when the two is inconsistent, logic control element is to BMC transmission chip config failures
Information, and light malfunction indicator lamp.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710635684.6A CN107678909B (en) | 2017-07-31 | 2017-07-31 | Circuit and method for monitoring chip configuration state in server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710635684.6A CN107678909B (en) | 2017-07-31 | 2017-07-31 | Circuit and method for monitoring chip configuration state in server |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107678909A true CN107678909A (en) | 2018-02-09 |
| CN107678909B CN107678909B (en) | 2020-06-16 |
Family
ID=61133681
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710635684.6A Active CN107678909B (en) | 2017-07-31 | 2017-07-31 | Circuit and method for monitoring chip configuration state in server |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107678909B (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919696A (en) * | 2018-05-29 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of method of achievable UID-LED multiposition control |
| CN108923977A (en) * | 2018-07-10 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of configuration method of server, device and server apparatus |
| CN109101358A (en) * | 2018-07-27 | 2018-12-28 | 郑州云海信息技术有限公司 | Server system and its hardware log recording device and method |
| CN109508279A (en) * | 2018-11-28 | 2019-03-22 | 郑州云海信息技术有限公司 | A kind of server monitoring device, method and its system |
| CN111752223A (en) * | 2020-06-29 | 2020-10-09 | 配天机器人技术有限公司 | Signal configuration method, input/output device and computer storage medium |
| CN112463502A (en) * | 2020-12-11 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Method, device and system for detecting pin state of programmable logic device |
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| US5544092A (en) * | 1994-02-25 | 1996-08-06 | Intel Corporation | Method and apparatus for configuring an integrated circuit |
| CN1916916A (en) * | 2006-08-31 | 2007-02-21 | 株洲南车时代电气股份有限公司 | Circuit and method for guaranteeing reliable configurartion of field programmable gate array |
| CN101136036A (en) * | 2006-10-12 | 2008-03-05 | 中兴通讯股份有限公司 | Combined on site programmable gate array verification device |
| CN101778007A (en) * | 2009-01-12 | 2010-07-14 | 哈尔滨威帝电子股份有限公司 | System and method for automatically testing I/O pin of CAN bus control module |
| CN102169160A (en) * | 2010-02-08 | 2011-08-31 | 无锡中星微电子有限公司 | Pin multiplexing verifying device and method for integrated circuit |
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| CN104461994A (en) * | 2014-11-12 | 2015-03-25 | 中国航空工业集团公司洛阳电光设备研究所 | FPGA-based embedded processor dynamic configuration circuit and method |
| CN105606986A (en) * | 2014-11-12 | 2016-05-25 | 比亚迪股份有限公司 | Chip external function pin detection system, detection method and chip |
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| US5544092A (en) * | 1994-02-25 | 1996-08-06 | Intel Corporation | Method and apparatus for configuring an integrated circuit |
| CN1916916A (en) * | 2006-08-31 | 2007-02-21 | 株洲南车时代电气股份有限公司 | Circuit and method for guaranteeing reliable configurartion of field programmable gate array |
| CN101136036A (en) * | 2006-10-12 | 2008-03-05 | 中兴通讯股份有限公司 | Combined on site programmable gate array verification device |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919696A (en) * | 2018-05-29 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of method of achievable UID-LED multiposition control |
| CN108919696B (en) * | 2018-05-29 | 2020-03-20 | 郑州云海信息技术有限公司 | Method capable of realizing UID-LED multi-state control |
| CN108923977A (en) * | 2018-07-10 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of configuration method of server, device and server apparatus |
| CN109101358A (en) * | 2018-07-27 | 2018-12-28 | 郑州云海信息技术有限公司 | Server system and its hardware log recording device and method |
| CN109508279A (en) * | 2018-11-28 | 2019-03-22 | 郑州云海信息技术有限公司 | A kind of server monitoring device, method and its system |
| CN111752223A (en) * | 2020-06-29 | 2020-10-09 | 配天机器人技术有限公司 | Signal configuration method, input/output device and computer storage medium |
| CN111752223B (en) * | 2020-06-29 | 2022-04-01 | 配天机器人技术有限公司 | Signal configuration method, input/output device and computer storage medium |
| CN112463502A (en) * | 2020-12-11 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Method, device and system for detecting pin state of programmable logic device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107678909B (en) | 2020-06-16 |
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| TA01 | Transfer of patent application right |
Effective date of registration: 20200526 Address after: 215100 No. 1 Guanpu Road, Guoxiang Street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant after: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: 450000 Henan province Zheng Dong New District of Zhengzhou City Xinyi Road No. 278 16 floor room 1601 Applicant before: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY Co.,Ltd. |
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