CN107633867A - SPI Flash test system and method based on FT4222 - Google Patents
SPI Flash test system and method based on FT4222 Download PDFInfo
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- CN107633867A CN107633867A CN201710853972.9A CN201710853972A CN107633867A CN 107633867 A CN107633867 A CN 107633867A CN 201710853972 A CN201710853972 A CN 201710853972A CN 107633867 A CN107633867 A CN 107633867A
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- 238000012360 testing method Methods 0.000 title claims abstract description 88
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000010998 test method Methods 0.000 claims abstract description 12
- 239000002253 acid Substances 0.000 claims abstract description 7
- 238000004891 communication Methods 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 3
- 238000013519 translation Methods 0.000 claims description 3
- 235000013399 edible fruits Nutrition 0.000 claims 1
- 238000013112 stability test Methods 0.000 abstract description 3
- 230000006870 function Effects 0.000 description 9
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000006399 behavior Effects 0.000 description 3
- 238000011022 operating instruction Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000012942 design verification Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The present invention discloses a kind of SPI Flash test system and method based on FT4222, the test statement that the method for testing inputs according to tester, call the FT4222 chipsets in debugging acid, for the SPI NAND Flash module configuration testing conditions of different parameters, test statement is finally loaded into FT4222 chip modules the SPI NAND Flash modules are tested.The method of testing can test simple SPI NAND Flash reading and writing, erasing, BurnIn test (stability test), while can also reach some special test purposes by changing test software programs code.
Description
Technical field
The present invention relates to a kind of SPI NAND Flash method of testings based on FT4222, belong to SPI NAND Flash surveys
Examination field.
Background technology
SPI NAND Flash tests are generally connected by two blocks of FPGA plates, and one piece is used as Host ends, and one piece is used as Device
Whether end, the various functions for performing different instruction testing Device ends during test by Host ends are correct.The method has 2 disadvantages
End, one is due to that the bin file that Host ends perform is burnt in ROM, therefore, it is necessary to which frequently burning, number in test process
It is tired.Second, this test can only survey function and the response of SPI under normal circumstances, some special circumstances or test content can not
Realize, underaction.
Then, Host behaviors are simulated using FT4222, the instruction that needs are performed is edited in text document, during test only
Need to change the content in text document, then by software program Load File and perform, instruction can take in any combination
Match somebody with somebody, and convenient modification, improve efficiency.
SPI protocol is a simple easily communication protocol, can all be existed on various main control chips, for connecting periphery mould
Block.Storage chip is widely used at present, and demand is big, and SPI NAND Flash have an application in various equipment, and Flash
Stability needs a large amount of tests to ensure, and SPI NAND Flash test needs substantial amounts of data reading-writing for a long time, at random
The complicated operations such as block access, so needing the method for a system to test Flash.
The content of the invention
For above-mentioned technical problem, the present invention is intended to provide a kind of SPI NAND Flash test sides based on FT4222
Method, the method for testing can test simple SPI NAND Flash reading and writing, erasing, BurnIn test (stability survey
Examination), while can also reach some special test purposes by changing test software programs code.
To achieve the above object, the present invention adopts the following technical scheme that：
SPI Flash test system based on FT4222, the test system include processor module, SPI NAND Flash
Communication connection between module, FT4222 chip modules and each module.
Connected between processor module and the FT4222 chip module by USB.
The processor module is instructed through USB transmission to FT4222 chip modules for generating test instruction, the test,
By FT4222 chip modules self-carried USB and the translation function of SPI protocol, instruction to be measured is converted into SPI forms, is transmitted to SPI
After NAND Flash module operating instructions, then by FT4222 chip modules result is transferred back on the processor module, from
And the correctness of decision instruction operation.
SPI Flash method of testing based on FT4222, the test statement that the method for testing inputs according to tester, adjust
With the FT4222 chipsets in debugging acid, for the SPI NAND Flash module configuration testing conditions of different parameters, most
Test statement is loaded into FT4222 chip modules afterwards to test the SPI NAND Flash modules.
Further, methods described specifically includes following steps：
Step 1, the instruction of test required for being inputted in processor module；
Step 2, after script file inputs, open and call debugging acid, obtain the chip being connected with processor and set
It is standby, choose FT4222 chipsets；Then SPI NAND flash modules parameters are set and test required condition, by described in
Instruction document to be measured is loaded into, and SPI NAND Flash test job is realized by the built-in function of FT4222 chip modules；
Step 3, the correctness of waveform check command operation result is observed by logic analyser.
The processor module is PC.
It is described that the instruction of test is specially required for input in processor module：A text document is created first, it is defeated
The instruction of test required for entering, if a plurality of combination needs branch to input, form is two byte hexadecimal numbers, with space every
Open, be arranged in order down, inputted with new line.
The logic analyser gathers data signal from FPGA.
The present invention has following innovation：
Host behaviors are simulated using FT4222, the instruction that needs are performed is edited in text document, is only needed during test
The content in text document to be changed, then by software program Load File and is performed, instruction can arrange in pairs or groups in any combination, and
And convenient modification, improve efficiency.
SPI protocol is a simple easily communication protocol, can all be existed on various main control chips, for connecting periphery mould
Block.Storage chip is widely used at present, and demand is big, and SPI NAND Flash have an application in various equipment, and Flash
Stability needs a large amount of tests to ensure, and SPI NAND Flash test needs substantial amounts of data reading-writing for a long time, at random
The complicated operations such as block access, so needing the method for a system to test Flash.
The method of testing can test simple SPI NAND Flash reading and writing, erasing, BurnIn test (stability
Test), while can also reach some special test purposes by changing test software programs code, such as H2Test is simulated,
The read-write of random block, various data pattern combination and test flash read-write efficiency etc., and in testing can be with
Increase test event on demand, reach automatic test function.
Brief description of the drawings
Fig. 1 is the system construction drawing of method of testing of the present invention.
Embodiment
The present invention provides a kind of SPI NAND Flash test systems based on FT4222, as shown in figure 1, the test system
System includes the communication connection between processor module, SPI NAND Flash modules, FT4222 chip modules and each module；Institute
State and connected between processor module and FT4222 chip modules by USB.
The processor module is instructed through USB transmission to FT4222 chip modules for generating test instruction, the test,
By FT4222 chip modules self-carried USB and the translation function of SPI protocol, instruction to be measured is converted into SPI forms, is transmitted to SPI
After NAND Flash module operating instructions, then by FT4222 chip modules result is transferred back on the processor module, from
And the correctness of decision instruction operation.
Based on above-mentioned test system, the present invention provides a method of testing, and the method for testing inputs according to tester
Test statement, the FT4222 chipsets in debugging acid are called, configured for the SPI NAND Flash modules of different parameters
Test condition, test statement is finally loaded into FT4222 chip modules the SPI NAND Flash modules are tested.
Specifically, methods described specifically includes following steps：
Step 1, the instruction of test required for being inputted in processor module；A plurality of single instructing combination is got up to edit
Automatic test is carried out into script, reduces cumbersome manual operation, the advantage of script；
Step 2, after script file inputs, open and call debugging acid, obtain the chip being connected with processor and set
It is standby, choose FT4222 chipsets；Then SPI NAND flash modules parameters are set and test required condition, by described in
Instruction document to be measured is loaded into, and SPI NAND Flash test job is realized by the built-in function of FT4222 chip modules；(with pin
The manner is run, and editability is strong, easy to operate)
Step 3, tested according to the operating process on interface, waveform check command is observed by logic analyser and transported
The correctness of row result.
The data signal that above-mentioned logic analyser gathers from FPGA, as chip enables, command/address latches, and read-write makes
Can, the information such as data, the correctness of check command operation result.
Programmable circuit used by the present embodiment, the design that circuit is completed with hardware description language are burnt on FPGA
Tested, programmable circuit here is conventional selection, is for testing SPI Flash here as IC design verifications.
The processor module is PC.
It is described that the instruction of test is specially required for input in processor module：A text document is created first, it is defeated
The instruction of test required for entering, if a plurality of combination needs branch to input, form is two byte hexadecimal numbers, with space every
Open, be arranged in order down, inputted with new line.
Embodiment：
1) text document is created first, the instruction of test required for inputting, if a plurality of combination needs branch to input,
Form is two byte hexadecimal numbers, is separated, is arranged in order down with space, inputted with new line.Such as：
Write order 0x02+column addr+ data
Read command 0x03/0x3b/0x6b/0xeb/0xbb+column addr+ length (two byte hexadecimals)
0x13/0x10+block/page addr
Erasing order 0xd8+block addr
2) after script file input, Debug Tool is opened, click on Scan button, open
FT4222device, then set on interface various flash parameters and test needed for condition, after the completion of click on load
File button, the instruction document created just now is loaded into, calls FT4222 built-in function to realize SPI NAND by programming
Flash test job.
3) operation result is shown in right side blank region, while can observe waveform check command by logic analyser and transport
The correctness of row result.
The method of testing can test simple SPI NAND Flash reading and writing, erasing, BurnIn test (stability
Test), at the same can also by changing test software programs code, such as it is a plurality of it is single instruct it is regular, can on demand or
Say it is according to Flash working characteristics, example is exactly described by next sentence.Combine to reach some special test mesh
, such as H2Test is simulated, and flash whole districts block sequential write read check, the read-write of random block, the write-read behaviour that address changes at random
Make, various data pattern combinations, different pieces of information such as full 0, complete 1 and random number etc., and test flash read-write effect
Can, flash write-read speed stability etc., and test event can be increased on demand in testing, reach automatic test
Function.
Described above is only the preferred embodiment of the present invention, it should be pointed out that：For the ordinary skill people of the art
For member, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as protection scope of the present invention.
Claims (8)
1. the SPI Flash test system based on FT4222, it is characterised in that the test system includes processor module, SPI
Communication connection between NAND Flash modules, FT4222 chip modules and each module.
2. the SPI Flash test system according to claim 1 based on FT4222, it is characterised in that the processor die
Connected between block and FT4222 chip modules by USB.
3. the SPI Flash test system according to claim 2 based on FT4222, it is characterised in that the processor die
Block is used to generate test instruction, and the test instruction is carried through USB transmission to FT4222 chip modules by FT4222 chip modules
USB and SPI protocol translation function, instruction to be measured is converted into SPI forms, is transmitted to the operation of SPI NAND Flash modules and refers to
After order, then by FT4222 chip modules result is transferred back on the processor module, it is correct so as to decision instruction operation
Property.
4. the SPI Flash method of testing based on FT4222, it is characterised in that the survey that the method for testing inputs according to tester
Sentence is tried, calls the FT4222 chipsets in debugging acid, survey is configured for the SPI NAND Flash modules of different parameters
Strip part, test statement is finally loaded into FT4222 chip modules the SPI NAND Flash modules are tested.
5. the SPI Flash method of testing according to claim 4 based on FT4222, it is characterised in that methods described is specific
Comprise the following steps：
Step 1, the instruction of test required for being inputted in processor module；
Step 2, after script file inputs, open and call debugging acid, obtain the chipset being connected with processor, choosing
Middle FT4222 chipsets；Then SPI NAND flash modules parameters are set and test required condition, will be described to be measured
Instruct document to be loaded into, SPI NAND Flash test job is realized by the built-in function of FT4222 chip modules；
Step 3, the correctness of waveform check command operation result is observed by logic analyser.
6. the SPI Flash method of testing according to claim 5 based on FT4222, it is characterised in that the processor die
Block is PC.
7. the SPI Flash method of testing according to claim 5 based on FT4222, it is characterised in that described in processor
The required instruction tested is inputted in module is specially：A text document is created first, the instruction of test required for inputting, such as
Fruit is that a plurality of combination needs branch to input, and form is two byte hexadecimal numbers, is separated, is arranged in order down with space, input
It is complete with new line.
8. the SPI Flash method of testing according to claim 5 based on FT4222, it is characterised in that the logic analysis
Instrument gathers data signal from FPGA.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710853972.9A CN107633867B (en) | 2017-09-20 | 2017-09-20 | SPI flash memory test system and method based on FT4222 |
| PCT/CN2018/103038 WO2019056935A1 (en) | 2017-09-20 | 2018-08-29 | Ft4222-based testing system and method for spi flash |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710853972.9A CN107633867B (en) | 2017-09-20 | 2017-09-20 | SPI flash memory test system and method based on FT4222 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107633867A true CN107633867A (en) | 2018-01-26 |
| CN107633867B CN107633867B (en) | 2020-12-01 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710853972.9A Active CN107633867B (en) | 2017-09-20 | 2017-09-20 | SPI flash memory test system and method based on FT4222 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107633867B (en) |
| WO (1) | WO2019056935A1 (en) |
Cited By (7)
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| CN108733389A (en) * | 2018-05-31 | 2018-11-02 | 深圳市德名利电子有限公司 | A kind of Flash data analysis filter |
| WO2019056935A1 (en) * | 2017-09-20 | 2019-03-28 | 南京扬贺扬微电子科技有限公司 | Ft4222-based testing system and method for spi flash |
| WO2020103839A1 (en) * | 2018-11-22 | 2020-05-28 | Changxin Memory Technologies, Inc. | Method, device and terminal for testing memory chip |
| CN111596200A (en) * | 2020-05-25 | 2020-08-28 | 上海岱矽集成电路有限公司 | Integrated circuit tester |
| RU199833U1 (en) * | 2019-06-03 | 2020-09-22 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Петрозаводский государственный университет" | Modular system for electrical and functional testing of FPGA-based NAND memory chips |
| CN112416668A (en) * | 2020-10-26 | 2021-02-26 | 中国电力科学研究院有限公司 | Method and system for testing Flash data transmission rate |
| CN115509206A (en) * | 2022-09-29 | 2022-12-23 | 山东华芯半导体有限公司 | Testing method of NAND control chip |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN107633867B (en) | 2020-12-01 |
| WO2019056935A1 (en) | 2019-03-28 |
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Denomination of invention: SPI flash memory test system and method based on ft4222 Effective date of registration: 20210810 Granted publication date: 20201201 Pledgee: Bank of Jiangsu Co.,Ltd. Nanjing Jiangbei new area sub branch Pledgor: NANJING HEYANGTEK Co.,Ltd. Registration number: Y2021980007493 |
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| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Building 63, Jinghui Science and Technology Innovation Park, 123 Jinghui West Road, Xinwu District, Wuxi City, Jiangsu Province, 214000 Patentee after: Jiangsu Yangheyang Microelectronics Technology Co.,Ltd. Country or region after: China Address before: 210000 12 -80, bu Yue Road, Qiaolin street, Pukou District, Nanjing, Jiangsu, China. 12 Patentee before: NANJING HEYANGTEK Co.,Ltd. Country or region before: China |