CN107483867A - A kind of TICO format 4s K/8K decoders and its implementation - Google Patents
A kind of TICO format 4s K/8K decoders and its implementation Download PDFInfo
- Publication number
- CN107483867A CN107483867A CN201710724985.6A CN201710724985A CN107483867A CN 107483867 A CN107483867 A CN 107483867A CN 201710724985 A CN201710724985 A CN 201710724985A CN 107483867 A CN107483867 A CN 107483867A
- Authority
- CN
- China
- Prior art keywords
- video
- tico
- data
- sdi
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/40—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using video transcoding, i.e. partial or full decoding of a coded input stream followed by re-encoding of the decoded output stream
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/22—Adaptations for optical transmission
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Computer Graphics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses a kind of TICO format 4s K/8K decoders and its implementation, the decoder includes：Clock synchronization module, produce video data signal input module and the clock needed for 12G SDI vision signal output modules；Video data signal input module, under the control of clock caused by clock synchronization module, the 4K/8K ultra high-definition signals of input are detected, the separating treatment of video flowing audio stream is completed to obtain video stream data and digital audio and video signals according to testing result；Video TICO decoder modules, video stream data is subjected to the decoding of TICO forms to obtain the video data of YUV quantizations；12G SDI vision signal output modules, the video data sampling that YUV quantifies is converted into vision signal and digital audio and video signals and carries out embedding processing, and handles to obtain 12G SDI data signals by the progress of embedding signal sample-synchronous under the control of clock synchronization module and is exported.
Description
Technical field
The present invention relates to a kind of decoder and its implementation, is solved more particularly to a kind of ultra high-definition TICO format 4s K/8K
Code device and its implementation.
Background technology
With the development of video processing technique, the definition as video source signal has been over existing high definition HD
(HD refers to high definition, High-Definition, resolution ratio 920x 1080,1920x 1080, strictly speaking should be FHD, also referred to as
1080P；Ultra HD and FHD belong to HD sequences, and Ultra HD resolution ratio is 4 times of FHD resolution ratio, i.e., length and width are respectively
2 times, up to 3840x2160) and 3G pixel resolutions.TICO(Tiny latency and compression ration
The image algorithm standard of codec, pole slight time delay and compression ratio) form turns into current international main code form, but
4K/8K ultra high-definition video field does not improve IP conversion decoding devices and the gateway production of feasible TICO forms accordingly also at present
Product, and, it is necessary to which image restoring degree is high and naked eyes are without the high-quality of compression for the processing and network transmission for 4K/8K vision signals
The conversion of amount and decoder are preserved in 10G or more band optical fiber network, handed over to realize 4K/8K ultra high-definition vision signal
Mutually, transmit and distribute, broadcast, while also just need the conversion decoding device of corresponding 4K/8K video source signals, therefore, have in fact
Necessity proposes a kind of ultra high-definition TICO format decoders and its implementation, to solve the above problems.
The content of the invention
To overcome above-mentioned the shortcomings of the prior art, the purpose of the present invention is to provide a kind of TICO format 4s K/8K solutions
Code device and its implementation, are provided with the ultrahigh resolution video for 4K/8K and digital media subscriber and improve feasible TICO lattice
The IP switch decoders and gateway product of formula.
Another object of the present invention is to provide a kind of TICO format 4s K/8K decoders and its implementation, to ensure
On the premise of high quality video signal output of the high video image reduction degree and naked eyes without compression, realize that 4K/8K's is super
The demand that high-definition video signal preserves in 10G or more band optical fiber network, interacts, transmits and distribute, broadcast.
A further object of the present invention is to provide a kind of TICO format 4s K/8K decoders and its implementation, can answered extensively
For the shooting of the program source of various 4K/8K ultra high-definitions videos and Internet video field of media, storage, network high definition video
IP Transmission systems, the control of long-range ultra high-definition and distribution broadcast system and the ultra high-definition in broadcasting and TV field are live, relay and Transmission system,
Studio/broadcast/Broadcast Control and network transmission system.
In view of the above and other objects, the present invention proposes a kind of TICO format 4s K/8K decoders, including：
Clock synchronization module, for synchronous using outside three-level/two-stage reference sync signal as baseband signal clock base
12G-SDI or ultra high-definition SDI data serial signals are handled, or satellite GPS master clocks are converted into 10G IP video network data
Clock needed for pretreatment；
Video data signal input module, under the control of clock caused by the clock synchronization module, to input
4K/8K ultra high-definition signals detected, video flowing audio stream separating treatment is completed to obtain TICO forms according to testing result
The video stream data and digital audio and video signals of packing；
Video TICO decoder modules, it is separated for will be exported from the video data signal input module
The video stream data of TICO forms packing carries out TICO form decodings；
12G-SDI vision signal output modules, 4 quantified for the YUV that TICO is decoded will to be passed through：4：4 video datas take
Sample is converted into 4：2：0 vision signal and digital audio and video signals carry out embedding processing, and by under the control of clock synchronization module
Embedding signal carries out sample-synchronous and handles to obtain 12G-SDI data signals to be exported.
Further, the TICO format decoders also include control module, for controlling the clock synchronization module, regarding
Frequency data-signal input module, video TICO decoder modules, each function of 12G-SDI vision signal output modules, and complete 1G
The SNMP state-detections of Ethernet.
Further, the video data signal input module is used for the control in clock caused by the clock synchronization module
Under system, the 4K/8K ultra high-definition signals of input are detected, input processing is carried out simultaneously to it when it is the data of IP streams to detect
Isolate TICO format video flow datas after completing FEC forward error corrections processing, when detect be TICO forms 3G-SDI code streams
When the video stream data and digital audio and video signals of TICO forms are directly separated out to it.
Further, the clock synchronization module includes：
Digital video clock is synchronous, for outside three-level/two-stage reference sync signal to be converted into baseband signal 12G-SDI
Or the clock needed for ultra high-definition SDI data serial signal transactings is synchronous；
PTP network exact clocks, for satellite GPS master clocks to be regarded according to being converted to the consensus standards of IEEE 1588
Clock in frequency data-signal input module needed for 10G IP video network data outputs.
Further, the video data signal input module includes：
IP stream input detection/3G-SDI data stream separation submodules, for when caused by the clock synchronization module 10
Under the control of clock, the 4K/8K ultra high-definition signals of input are detected, when according to SMPTE2022/2110 standard detections to being
10G IP stream data when input buffered is carried out to it, by the data in buffering by before FEC to contrast error correction function
After being handled, then the packet for not losing error completely is delivered into video-voice frequency flow and does separation function processing, to separate video flowing
And audio stream data, the video fluxions of TICO forms is directly separated out to it when it is the 3G-SDI code streams of TICO forms to detect
According to and digital audio and video signals；
Video flowing/audio stream separation submodule, for complete video flowing and the audio stream of separation TICO form code streams with
To the video stream data and digital audio and video signals of the TICO forms of separation.
Further, the control module by establish guidance panel control the clock synchronization module, video counts it is believed that
Number input module, video TICO decoder modules, each function of 12G-SDI vision signal output modules, and complete 1G Ethernets
SNMP state-detections and remote control.
Further, the video TICO decoder modules first have to the overall index of flow data in extraction buffering in decoding
Information, after index information extraction, the information such as required main chart and packet header are discharged from packet, according to the index of extraction
With the information such as data packet head, the instruction for disassembling packet is sent, all data for entering buffering sequentially enter queue and waited and tear open
Xie Haiyuanshuojubao, disassemble reduction data timestamp is stamped according to the relevant information of extraction after, be sent into the 12G-SDI videos
Signal output module carries out video/audio embedding processing, and embedding before processing also needs to quantify YUV after decoding 4：4：4 videos
Data sampling is converted into 4：2：0 video data.
To reach above-mentioned purpose, the present invention also provides a kind of implementation method of TICO format 4s K/8K decoders, including as follows
Step：
Step 1, under the control of clock caused by the clock synchronization module, utilize video data signal input module
The 4K/8K ultra high-definition signals of input are detected, the work(of separation TICO form video/audio data flows is completed according to testing result
Can, with the video stream data and digital audio and video signals of the TICO forms separated；
Step 2, the TICO lattice that will be exported using video TICO decoder modules from the video data signal input module
The video stream data of formula carries out TICO form decodings；
Step 3, quantified the YUV by TICO decodings using 12G-SDI vision signals output module 4：4：4 videos
Data sampling is converted into 4：2：0 video data signal and digital audio and video signals carry out embedding processing, and in clock synchronization module
The data serial signal that the progress of embedding signal sample-synchronous is handled to obtain to 12G-SDI under control is exported.
Further, step 2 includes：
Extract the overall index information of flow data in buffering first in decoding,
Secondly, after index information extraction, the information such as required main chart and packet header are discharged from packet；
According to information such as the index of extraction and data packet heads, the instruction for disassembling packet, all numbers for entering buffering are sent
According to sequentially entering queue and wait restoring data bag to be dismantled；
Disassemble reduction data timestamp is stamped according to the relevant information of extraction after, be sent into the output of 12G-SDI vision signals
Module carries out video/audio embedding processing, and embedding before processing also needs to quantify YUV after decoding 4：4：4 video datas sample
It is converted into 4：2：0 video data.
Further, in step 1, under the control of clock caused by the clock synchronization module, to the 4K/ of input
8K ultra high-definition signals are detected, when according to SMPTE2022/2110 standard detections to be 10G IP flow data when, will buffer
After interior data before FEC to the function of contrast error correction by being handled, then the packet for not losing error completely is delivered to and regarded
Frequency stream/audio stream separation function processing submodule, to separate video stream data, when detect be TICO forms 3G-SDI code streams
When the video stream data and digital audio and video signals of TICO forms are directly separated out to it.
Compared with prior art, a kind of TICO format 4s K/8K decoders of the present invention and the superelevation that its implementation is 4K/8K
Definition video and digital media subscriber provide the IP switch decoders and gateway product for improving feasible TICO forms, are protecting
On the premise of having demonstrate,proved the high quality video signal output of high video image reduction degree and naked eyes without compression, the present invention realizes
The need that 4K/8K ultra high-definition vision signal preserves in 10G or more band optical fiber network, interacts, transmits and distribute, broadcast
Ask.
Brief description of the drawings
Fig. 1 is a kind of structural representation of TICO format decoders of the present invention；
Fig. 2 is that a kind of IP stream input detection/3G-SDI data stream separation submodules of TICO format decoders of the present invention show
It is intended to (being free of 3G-SDI data stream separations)；
Fig. 3 is a kind of step flow chart of the implementation method of TICO format decoders of the present invention.
Embodiment
Below by way of specific instantiation and embodiments of the present invention are described with reference to the drawings, those skilled in the art can
Understand the further advantage and effect of the present invention easily by content disclosed in the present specification.The present invention can also pass through other differences
Instantiation implemented or applied, the various details in this specification also can be based on different viewpoints with application, without departing substantially from
Various modifications and change are carried out under the spirit of the present invention.
Fig. 1 is a kind of structural representation of TICO format 4s K/8K decoders of the present invention.As shown in figure 1, the present invention is a kind of
TICO format decoders, including：Clock synchronization module 10, video data signal input module 20, video TICO decoder modules 30,
12G-SDI vision signals output module 40 and control module 50.
Wherein, clock synchronization module 10 is by digital video clock synchronization submodule and PTP network exact clock submodule groups
Into being respectively used to using outside three-level/two-stage reference sync signal as baseband signal clock base synchronization process 12G-SDI or super
High definition SDI data serial signals, or satellite GPS master clocks are converted into 10G IP video network numbers by IEEE1588 consensus standards
Clock needed for Data preprocess, in the specific embodiment of the invention, the data of 4K vision signals are realized using fpga chip design
Clock is synchronous, rebuild, when base handle, and the network PTP sub-micros of the consensus standards of IEEE 1588 are realized using fpga chip design
Wonderful level high precision clock is synchronous, processing；Video data signal input module 20 flows input detection/3G-SDI data stream separations by IP
Submodule and video flowing/audio stream separation submodule composition, have 10G IP network data-signal input processings function, SMPTE-
2022FEC and the transmission signal detection process functions of SMPTE 2110 and the 3G-SDI input datas after TICO said shanks
Flow separation processing function, under the control of clock caused by clock synchronization module 10, being detected to input signal, 1) when
By SMPTE2022/2110 standard detections to be 10G IP stream data when input buffered is carried out to it, by the number in buffering
Video flowing/sound is delivered to after by being handled before FEC to the function of contrast error correction, then by the packet for not losing error completely
The processing of frequency flow separation submodule, to separate video stream data, 2) it is straight to its when it is the 3G-SDI code streams of TICO forms to detect
The video stream data and digital audio and video signals for isolating TICO forms are connect, in the specific embodiment of the invention, uses fpga chip
The data receiver function treatment that 10G network IP signals are inputted in real time with SMPTE-2110 agreements is realized in design, uses fpga chip
The data receiver function treatment that 10G network IP signals are inputted in real time based on SMPTE-2022 group agreements is realized in design, is carried out simultaneously
Handled before the FEC network datas of 10G IP signals to the intelligent detecting function of redundant correcting, and it is real using fpga chip design
The now data receiver of the real-time input of the IP network traffic spike and 3G-SDI video stream datas after TICO said shanks
With the function treatment of separation；Video TICO decoder modules 30 are used to export from video data signal input module 20
The TICO format videos flow data of separation carries out TICO form decodings, and specifically, video TICO decoder modules 30 are first in decoding
The overall index information of flow data in buffering is first extracted, this index information is compiled according to SMPTE RDD35TICO international standards
The relative index information of code, secondly, it is necessary to discharge required main chart and packet header etc. from packet after index information extraction
Information, according to information such as the index of extraction and data packet heads, send the instruction for disassembling packet, all data for entering buffering according to
Secondary to enter enqueue and to wait restoring data bag to be dismantled, timestamp can be stamped according to the relevant information of extraction by disassembling the data of reduction
Afterwards, the 4 of decoding output YUV quantizations：4：4 video datas, separate the digital audio and video signals of output with input module 20 together with given
Enter the video/audio embedding functional module of 12G-SDI vision signals output module 40, first by TICO decoder modules before progress embedding
The 4 of the YUV quantizations of 30 outputs：4：The sampling of 4 video datas is converted into 4：2：0 video data signal, in the specific embodiment of the invention
In, realize that the decoding function of the TICO forms of 4K/8K ultra high-definition vision signals is handled using fpga chip design；12G-SDI numbers
Word vision signal output module 40 is made up of video/audio embedding submodule, 12G-SDI sample-synchronous processing submodule, is used for
4 that YUV by TICO decodings is quantified：4：The sampling of 4 video datas is converted into 4：2：0 video data signal and DAB letter
Number embedding processing is carried out, the data serial signal that the progress of embedding signal sample-synchronous is handled to obtain to 12G-SDI base band is carried out
Output, in the specific embodiment of the invention, realized using fpga chip design at 4K12G-SDI vision signal real time data conversions
Reason and output quantization processing；Control module 50 is by panel FPGA function controls and 1G Ethernets FPGA SNMP state-detections and far
Process control function, for establishing guidance panel control clock synchronization module 10, video data signal input module 20, video TICO
Each function of decoder module 30,12G-SDI vision signals output module 40, and complete SNMP (the simple network pipes of 1G Ethernets
Manage agreement) state-detection and remote control.
It is defeated that the input of 10G IP streams and the input of 3G-SDI TICO formatted datas stream of TICO forms are connected to video data signal
Enter the input of IP stream input detection/3G-SDI TICO formatted data flow modules of module 20, IP stream inputs detection/3G-SDI
The output of TICO formatted data flow modules is connected to the input of video flowing/audio stream separation submodule, and video data signal is defeated
The video stream data for entering the TICO forms of video flowing/audio stream separation submodule output of module 20 is connected to video TICO decodings
The input of module 30, YUV quantifies after the TICO forms decoding that video TICO decoder modules 30 export 4：4：4 video datas and
The digital audio and video signals that video data signal input module 20 exports are connected to regarding for 12G-SDI vision signals output module 40
Frequently/audio embedding submodule carries out embedding processing, carries out the 4 of YUV quantizations for first exporting TICO decoder modules 30 before embedding：4：
The sampling of 4 video datas is converted into 4：2：0 video data signal, the 12G-SDI base-band digital serial signals handled by embedding are same
Step processing submodule exports 12G-SDI signals after carrying out sampling and synchronization process, and control module 50 will by 64 processing buses
Video data signal input module 20, video TICO decoder modules 30,12G-SDI vision signals output module 40 link together
And cooperate, outside three-level/two-stage reference sync signal is connected to the same step of digital video clock of clock synchronization module 10
The input of module, the output of digital video clock synchronization submodule be connected to 12G-SDI sample-synchronous processing submodule when
Clock input, satellite GPS master clocks are connected to the input of the PTP network exact clock submodules of clock synchronization module 10, PTP
The output of network exact clock submodule is connected to the input end of clock of IP stream input detection/3G-SDI data flow input modules,
Exported by 12G-SDI base-band digital serial signal forms to external equipment.
Fig. 2 is IP streams input detection/3G-SDI data stream separation submodule schematic diagrames in the specific embodiment of the invention.10G
IP flows (can be extended to 25G and 100G SFP+) SFP+1 and SFP+2 and is connected to the defeated of IP stream input submodules by light network
Enter to hold 10G IP stream 1 and 10G of input IP streams input 2, be respectively connecting to network through bag data buffering 1 and bag data buffering 2 respectively
Address 1 and network address 2 extract network address, at the same respectively after 64 AXIS are handled with through network address 1 and network address 2
The network address of extraction is connected to video/audio buffering 1 together and video/audio buffering 2 obtains respective 64 AXI letters
Number, 64 AXI signals of the two-way are sent to video and audio number together with the network address through network address 1 and the extraction of network address 2
Unpacked according to unpacking to obtain video/audio flow data, the video/audio flow data is after video/audio centralized storage buffering
It is connected to video flowing/audio stream separation submodule；After 64 AXIS are handled with through network address 1 and the extraction of network address 2
Network address is also connected to 64 processing buses through network data buffering 1 and network data buffering 1 simultaneously, and passes through 64 processing
Bus is connected to network protocol command management, and then the network data information by protocol instructions extraction/distribution management delivers to net
Network agreement FEC forward data error correction management instruction processing carries out the contrast and detection of network data information, the data message of detection
Do not make a mistake and be fed directly to video/audio centralized storage buffering, when network information data generation is wrong, data buffering
Complete data message will be waited and deliver to video/audio centralized storage buffering.
Fig. 3 is a kind of step flow chart of the implementation method of TICO format 4s K/8K decoders of the present invention.As shown in figure 3, this
A kind of implementation method of TICO format 4s K/8K decoders is invented, is comprised the following steps：
Step 301, using video data signal input module under the control of clock caused by clock synchronization module, to defeated
The signal entered is detected, and the separation of video flowing and audio stream is completed according to testing result, to obtain the video flowing of TICO forms
Data and digital audio and video signals.Specifically, when according to SMPTE2022/2110 standard detections to be 10G IP flow data when pair
It carries out input buffered, by the data in buffering by being handled before FEC to the function of contrast error correction after, then will be complete
The packet for not losing error delivers to video flowing/audio stream and does separation function processing, to separate video flowing and audio stream data, when
Detect the video stream data for being directly separated out TICO forms when being the 3G-SDI code streams of TICO forms to it and DAB letter
Number.
Step 302, the TICO forms that will be exported using video TICO decoder modules from video data signal input module
Video stream data carry out TICO form decodings；
Specifically, in step 302, the overall index information of flow data in extraction buffering, this rope are first had in decoding
Fuse breath is according to the relative index information of SMPTE RDD35TICO international standard codes, secondly, after index information extraction, is needed
The information such as required main chart and packet header are discharged from packet, according to the information such as the index of extraction and data packet head, hair
Go out to disassemble the instruction of packet, all data for entering buffering sequentially enter queue and wait restoring data bag to be dismantled, disassemble also
After former data can stamp timestamp according to the relevant information of extraction, video/audio embedding functional module is admitted to.
Step 303,4 YUV by TICO decodings quantified：4：The sampling of 4 video datas is converted into 4：2：0 video data
Signal and digital audio and video signals carry out embedding processing, and under the control of clock caused by clock synchronization module, embedding is believed
Number carry out sample-synchronous and handle to obtain 12G-SDI digital baseband signals to be exported.
Preferably, the implementation method of the TICO decoders of the present invention, also comprises the following steps：When being controlled using control module
Clock synchronization module, video data signal input module, video TICO decoder modules, 12G-SDI vision signal output modules it is each
Function, and complete SNMP (Simple Network Management Protocol) state-detections and remote control of 1G Ethernets.Specifically, control module
Establish guidance panel control video data signal input module, video TICO decoder modules, 12G-SDI vision signal output modules
Each function, and complete SNMP (Simple Network Management Protocol) state-detections and remote control of 1G Ethernets.
It can be seen that a kind of TICO format 4s K/8K decoders of the present invention and the ultrahigh resolution video that its implementation is 4K/8K
The IP switch decoders and gateway product for improving feasible TICO forms are provided with digital media subscriber, it is high ensure that
On the premise of the high quality video signal output of video image reduction degree and naked eyes without compression, the present invention realizes the super of 4K/8K
The demand that high-definition video signal preserves in 10G or more band optical fiber network, interacts, transmits and distribute, broadcast.
The composite can be widely applied to various 4K/8K ultra high-definitions videos and Internet video field of media program source shooting,
Storage, the IP Transmission systems of network high definition video, long-range ultra high-definition control and distribution broadcast system, and broadcasting and TV field are super
High-definition live broadcasting, relay and Transmission system, studio/broadcast/Broadcast Control and network transmission system.
Compared with prior art, the invention has the advantages that：
1) video decoding products of middle and high end domestic at present are the codec format based on height, SD mostly, including：MPEG-
2, H.264, DNSHD, AVS or AVS+.But for ultra high-definition 4K or 8K vision signal, enter incoming link there is presently no shaping
The decoding products of system, the present invention are the TICO to develop based on the newest SMPTE RDD35 standards of SMPTE International Standards Organization
4K/8K decoding products.
2) simply base band is simply used as clock synchronizing function in the video decoding products of middle and high end domestic at present
The black field reference clock signal of chain-circuit system, there are few external network IP encoded products only to make using network exact clock merely
For the synchronizing function of product, the present invention considers the synchronisation requirement of existing baseband system, employs the outer synchronous refernce clocks of two-stage
Signal, the synchronised clock processing of the PTP network exact clocks needed for IP network it has been also compatible with incorporating.
3) design of TICO input modules considers data serial signal format 3G-SDI data packing form input interface
With 10G/25G IP optical fiber input interfaces.Such a design not only supports the existing chain of current high-end video and audio Digital Media System
The limitation form (link bandwidth for being no more than 3G) on road, has been also compatible with newly-designed 4K and 8K high-end video and audio system to optical fiber
This two kinds of interface requirements can not be met in the expansion demand of broadband network, current high definition or ultra high-definition product simultaneously.
Any those skilled in the art can repair under the spirit and scope without prejudice to the present invention to above-described embodiment
Decorations and change.Therefore, the scope of the present invention, should be as listed by claims.
Claims (10)
1. a kind of TICO format 4s K/8K decoders, including：
Clock synchronization module, for using outside three-level/two-stage reference sync signal as baseband signal clock base synchronization process
12G-SDI or ultra high-definition SDI data serial signals, or satellite GPS master clocks are converted into 10G IP video networks data and located in advance
Clock needed for reason；
Video data signal input module, under the control of clock caused by the clock synchronization module, to the 4K/ of input
8K ultra high-definition signals are detected, and the separating treatment of video/audio flow data is completed to obtain video stream data according to testing result
And digital audio and video signals；
Video TICO decoder modules, the video stream data for will be exported from the video data signal input module are carried out
TICO forms decode；
12G-SDI vision signal output modules, 4 quantified for the YUV that TICO is decoded will to be passed through：4：The sampling of 4 video datas turns
Turn to 4：2：0 vision signal and digital audio and video signals carry out embedding processing, and by embedding under the control of clock synchronization module
The code stream that signal progress sample-synchronous handles to obtain 12G-SDI resolution ratio is exported.
A kind of 2. TICO format 4s K/8K decoders as claimed in claim 1, it is characterised in that：The TICO format decoders are also
Including control module, for control the clock synchronization module, video data signal input module, video TICO decoder modules,
Each function of 12G-SDI vision signal output modules, and complete the SNMP state-detections and remote control of 1G Ethernets.
A kind of 3. TICO format 4s K/8K decoders as claimed in claim 2, it is characterised in that：The video data signal input
Module is used under the control of clock caused by the clock synchronization module, and the 4K/8K ultra high-definition signals of input are detected,
Video flowing audio stream separating treatment is completed to testing result and is believed with obtaining the TICO format videos flow data of separation and DAB
Number.
4. a kind of TICO format 4s K/8K decoders as claimed in claim 3, it is characterised in that the clock synchronization module includes：
Digital video clock is synchronous, for outside three-level/two-stage reference sync signal to be converted into baseband signal 12G-SDI or super
Clock needed for high definition SDI data serial signal transactings is synchronous；
PTP network exact clocks, for satellite GPS master clocks to be converted into the video counts according to the consensus standards of IEEE 1588
According to the clock needed for 10G IP video network data outputs in signal input module.
A kind of 5. TICO format decoders as claimed in claim 3, it is characterised in that the video data signal input module bag
Include：
IP stream input detection/3G-SDI data stream separation submodules, in clock caused by the clock synchronization module 10
Under control, the 4K/8K ultra high-definition signals of input are detected, when according to SMPTE2022/2110 standard detections to being 10G IP
Input buffered is carried out to it during the data of stream, by the data in buffering by before FEC to contrast error correction function at
After reason, then the packet for not losing error completely is delivered into video flowing/audio stream separation function and handled, to separate video fluxion
According to, carry out separation conversion process when it is the 3G-SDI code streams of TICO forms to detect, with directly obtain digital audio and video signals and
The video stream data of TICO forms packing；
Video flowing/audio stream separation submodule, for completing video flowing audio stream separating treatment to obtain the packing of TICO forms
Video stream data and digital audio and video signals.
A kind of 6. TICO format 4s K/8K decoders as claimed in claim 2, it is characterised in that：The control module is by building
Vertical guidance panel controls the clock synchronization module, video data signal input module, video TICO decoder modules, 12G-SDI
Each function of vision signal output module, and complete the SNMP state-detections and remote control of 1G Ethernets.
A kind of 7. TICO format 4s K/8K decoders as claimed in claim 2, it is characterised in that：The video TICO decodes mould
Block first has to the overall index information of flow data in extraction buffering in decoding, after index information extraction, is released from packet
The information such as required main chart and packet header are put, according to information such as the index of extraction and data packet heads, sends and disassembles packet
Instruction, all data for entering buffering sequentially enter queue and wait restoring data bag to be dismantled, disassemble the data of reduction according to carrying
After the relevant information taken stamps timestamp, it is sent into the 12G-SDI vision signals output module and carries out at video/audio embedding
Reason, at the same embedding before processing need to quantify decoded YUV 4：4：The sampling of 4 video datas is converted into 4：2：0 video data.
8. a kind of implementation method of TICO format 4s K/8K decoders, comprises the following steps：
Step 1, under the control of clock caused by the clock synchronization module, using video data signal input module to defeated
The 4K/8K ultra high-definition signals entered are detected, and complete video and audio separating treatment according to testing result to obtain the packing of TICO forms
Video stream data and digital audio and video signals；
Step 2, the TICO forms exported from the video data signal input module are beaten using video TICO decoder modules
The video stream data of bag carries out TICO form decodings；
Step 3, quantified the YUV by TICO decodings using 12G-SDI vision signals output module 4：4：4 video datas
Sampling is converted into 4：2：0 vision signal and digital audio and video signals carry out embedding processing, and will under the control of clock synchronization module
Embedding signal carries out sample-synchronous and handles to obtain 12G-SDI data signals to be exported.
9. a kind of implementation method of TICO format 4s K/8K decoders as claimed in claim 8, it is characterised in that step 2 is entered
One step includes：
Extract the overall index information of flow data in buffering first in decoding,
Secondly, after index information extraction, the information such as required main chart and packet header are discharged from packet；
According to information such as the index of extraction and data packet heads, send the instruction for disassembling packet, all data for entering buffering according to
It is secondary to enter enqueue and to wait restoring data bag to be dismantled；
Disassemble reduction data timestamp is stamped according to the relevant information of extraction after, be sent into 12G-SDI vision signal output modules
Video/audio embedding processing is carried out, embedding before processing also needs to quantify decoded YUV 4：4：The sampling of 4 video datas turns
Turn to 4：2：0 video data.
10. a kind of implementation method of TICO format 4s K/8K decoders as claimed in claim 8, it is characterised in that in step 1
In, under the control of clock caused by the clock synchronization module, the 4K/8K ultra high-definition signals of input are detected, work as inspection
Measure be IP stream data when input processing is carried out to it and complete FEC forward error corrections processing after isolate TICO format video streams
Data, the video stream data and numeral of TICO forms are directly separated out to it when it is the 3G-SDI code streams of TICO forms to detect
Audio signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710724985.6A CN107483867A (en) | 2017-08-22 | 2017-08-22 | A kind of TICO format 4s K/8K decoders and its implementation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710724985.6A CN107483867A (en) | 2017-08-22 | 2017-08-22 | A kind of TICO format 4s K/8K decoders and its implementation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107483867A true CN107483867A (en) | 2017-12-15 |
Family
ID=60601999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710724985.6A Pending CN107483867A (en) | 2017-08-22 | 2017-08-22 | A kind of TICO format 4s K/8K decoders and its implementation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107483867A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110087086A (en) * | 2019-05-07 | 2019-08-02 | 北京流金岁月文化传播股份有限公司 | A kind of device and method for supporting 4K SDI to export |
| CN110475144A (en) * | 2019-08-16 | 2019-11-19 | 福州大学 | The extracting method of 16 channel audios in a kind of 12G-SDI data flow based on FPGA |
| CN110708513A (en) * | 2019-10-18 | 2020-01-17 | 中国科学院长春光学精密机械与物理研究所 | 8K video multi-core heterogeneous processing device |
| CN111405290A (en) * | 2020-04-30 | 2020-07-10 | 华东师范大学 | 8K video compression code stream decoding processing and display device |
| CN112040089A (en) * | 2020-09-24 | 2020-12-04 | 深圳市康维讯视频科技有限公司 | Multi-channel signal zero-delay synchronization module for monitor based on FPGA |
| CN113473060A (en) * | 2021-07-02 | 2021-10-01 | 北京格非科技股份有限公司 | 4K ultra-high definition non-compression IP signal processor and processing method |
| CN114285513A (en) * | 2021-11-22 | 2022-04-05 | 杭州当虹科技股份有限公司 | Time delay device and method supporting lossless long-time delay of IP signals |
| CN114554027A (en) * | 2022-03-16 | 2022-05-27 | 湖南双菱电子科技有限公司 | Audio embedding processing and video-audio synchronous output processing method |
| CN117135231A (en) * | 2023-10-26 | 2023-11-28 | 上海特高信息技术有限公司 | Decompression method of FPGA-based low-delay financial big data stream |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611546A (en) * | 2011-01-25 | 2012-07-25 | 中兴通讯股份有限公司 | PTP (precision time protocol) clock unicast and multicast mixed clock system and clock synchronization method |
| CN102857830A (en) * | 2011-06-29 | 2013-01-02 | 哈曼国际工业有限公司 | Network media adapter |
| CN104885473A (en) * | 2013-01-04 | 2015-09-02 | 高通股份有限公司 | Live timing for dynamic adaptive streaming over http (dash) |
| EP3068138A1 (en) * | 2013-11-08 | 2016-09-14 | Panasonic Intellectual Property Corporation of America | Transmission method, reception method, transmission apparatus, and reception apparatus |
| CN106105196A (en) * | 2014-04-28 | 2016-11-09 | 松下电器（美国）知识产权公司 | Coding method, coding/decoding method, code device and decoding apparatus |
| CN106603889A (en) * | 2017-02-08 | 2017-04-26 | 广州波视信息科技股份有限公司 | Ultra high-definition VR solid-state delayer based on FPGA chip |
-
2017
- 2017-08-22 CN CN201710724985.6A patent/CN107483867A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611546A (en) * | 2011-01-25 | 2012-07-25 | 中兴通讯股份有限公司 | PTP (precision time protocol) clock unicast and multicast mixed clock system and clock synchronization method |
| CN102857830A (en) * | 2011-06-29 | 2013-01-02 | 哈曼国际工业有限公司 | Network media adapter |
| CN104885473A (en) * | 2013-01-04 | 2015-09-02 | 高通股份有限公司 | Live timing for dynamic adaptive streaming over http (dash) |
| EP3068138A1 (en) * | 2013-11-08 | 2016-09-14 | Panasonic Intellectual Property Corporation of America | Transmission method, reception method, transmission apparatus, and reception apparatus |
| CN106105196A (en) * | 2014-04-28 | 2016-11-09 | 松下电器（美国）知识产权公司 | Coding method, coding/decoding method, code device and decoding apparatus |
| CN106603889A (en) * | 2017-02-08 | 2017-04-26 | 广州波视信息科技股份有限公司 | Ultra high-definition VR solid-state delayer based on FPGA chip |
Non-Patent Citations (4)
| Title |
|---|
| INTOPIX: "《4K Video over SMPTE 2022-5/6 Workflows》", 《INTOPIX网站》 * |
| INTOPIX: "《Reliable Network Solutions for Live HD, 4K and 8K》", 《INTOPIX网站》 * |
| INTOPIX: "《The disruptive visually lossless light video compression, extremely tiny in FPGA》", 《INTOPIX网站》 * |
| 毕厚杰: "《新一代视频压缩编码标准-H.264/AVC》", 31 May 2005 * |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110087086A (en) * | 2019-05-07 | 2019-08-02 | 北京流金岁月文化传播股份有限公司 | A kind of device and method for supporting 4K SDI to export |
| CN110475144A (en) * | 2019-08-16 | 2019-11-19 | 福州大学 | The extracting method of 16 channel audios in a kind of 12G-SDI data flow based on FPGA |
| CN110708513A (en) * | 2019-10-18 | 2020-01-17 | 中国科学院长春光学精密机械与物理研究所 | 8K video multi-core heterogeneous processing device |
| CN111405290A (en) * | 2020-04-30 | 2020-07-10 | 华东师范大学 | 8K video compression code stream decoding processing and display device |
| CN112040089B (en) * | 2020-09-24 | 2023-04-28 | 深圳市康维讯视频科技有限公司 | Multi-channel signal zero-delay synchronization device for monitor based on FPGA |
| CN112040089A (en) * | 2020-09-24 | 2020-12-04 | 深圳市康维讯视频科技有限公司 | Multi-channel signal zero-delay synchronization module for monitor based on FPGA |
| CN113473060A (en) * | 2021-07-02 | 2021-10-01 | 北京格非科技股份有限公司 | 4K ultra-high definition non-compression IP signal processor and processing method |
| CN113473060B (en) * | 2021-07-02 | 2023-12-15 | 北京格非科技股份有限公司 | 4K ultra-high definition non-compression IP signal processor and processing method |
| CN114285513A (en) * | 2021-11-22 | 2022-04-05 | 杭州当虹科技股份有限公司 | Time delay device and method supporting lossless long-time delay of IP signals |
| CN114285513B (en) * | 2021-11-22 | 2023-10-27 | 杭州当虹科技股份有限公司 | Delay device and method for supporting long-time delay of lossless IP signal |
| CN114554027A (en) * | 2022-03-16 | 2022-05-27 | 湖南双菱电子科技有限公司 | Audio embedding processing and video-audio synchronous output processing method |
| CN117135231A (en) * | 2023-10-26 | 2023-11-28 | 上海特高信息技术有限公司 | Decompression method of FPGA-based low-delay financial big data stream |
| CN117135231B (en) * | 2023-10-26 | 2023-12-29 | 上海特高信息技术有限公司 | Decompression method of FPGA-based low-delay financial big data stream |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107483867A (en) | A kind of TICO format 4s K/8K decoders and its implementation | |
| CN1235406C (en) | System and data format for providing seamless stream switching in digital video decoder | |
| CN1787639B (en) | Method for transmitting and receiving vision data by code converter | |
| EP2739043A1 (en) | Transmitting apparatus and method and receiving apparatus and method for providing a 3d service through a connection with a reference image transmitted in real time and additional image and content transmitted separately | |
| CN107371033A (en) | A kind of TICO format 4s K/8K encoders and its implementation | |
| US20130174209A1 (en) | Method and apparatus for transmitting and receiving uhd broadcasting service in digital broadcasting system | |
| JP7567953B2 (en) | Receiving device and receiving method | |
| US10812841B2 (en) | Apparatus for encoding and transcoding which applies multi-format ultra-high definition high-efficiency codec | |
| CN101179736B (en) | Method for converting transmission stream program to China mobile multimedia broadcasting program | |
| CN101873482A (en) | Real-time streaming media cluster transcoding system | |
| JP7310849B2 (en) | Receiving device and receiving method | |
| CN106657113A (en) | Method and system for converting broadcasting network multiplexing protocol | |
| CN111901623B (en) | Auxiliary information superposition method based on full-link IP ultra-high-definition multicast system | |
| MX2011004645A (en) | Method and system for synchronized mapping of data packets in an atsc data stream. | |
| CN100479529C (en) | Conversion method of multiplexing protocols in broadcast network | |
| CN101151902A (en) | Device and method for initializing decoder in digital broadcasting receiver | |
| CN211019017U (en) | SDI-OVER-IP lossless transmission decoding device | |
| CN103177725A (en) | Method and device for transmitting aligned multichannel audio frequency | |
| CN103474076B (en) | Method and device for transmitting aligned multichannel audio frequency | |
| CN101179738A (en) | Conversion method from transmission stream to China mobile multimedia broadcasting multiplex protocol | |
| KR20150001913A (en) | Method and apparatus for compensating bitrate between streams in broadcast stream transmitting system associated with heterogeneous network | |
| CN101179737B (en) | Method of converting compound protocol in multimedia broadcasting network | |
| CN103596064A (en) | Environmentally friendly science and technology service video gateway and implementation method | |
| Xiong et al. | Architecture and rate control for network TV broadcasting on application-oriented QoS | |
| JP2008205626A (en) | Stream generation apparatus, and stream generation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171215 |
|
| RJ01 | Rejection of invention patent application after publication |