CN107256309A - A kind of SI, PI and EMC collaborative design method of high performance PCB - Google Patents
A kind of SI, PI and EMC collaborative design method of high performance PCB Download PDFInfo
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- CN107256309A CN107256309A CN201710433805.9A CN201710433805A CN107256309A CN 107256309 A CN107256309 A CN 107256309A CN 201710433805 A CN201710433805 A CN 201710433805A CN 107256309 A CN107256309 A CN 107256309A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The invention discloses SI, PI and EMC collaborative design method of a kind of high performance PCB, SI, PI design of PCB system are carried out first, inspection to PCB system EMC design requirements after PCB system meets SI, PI design requirement carries out EMI Feedback Designs, and method specifically includes step in detail below：Step S1, the main cause that analysis EMI is produced；Step S2, the planar resonant cavity configuration being made up of power supply ground level carries out isolation high frequency radiation；Step S3, by placing capacitor array or short-circuit hole array progress planar resonant suppression in power supply ground level；Step S4, SI, PI, EMI balance layout strategy are set up in the case where considering SI, PI.Present invention improves the comprehensive of whole PCB system, so as to ensure that the stability of whole system, preferably carried out between signal in actual motion high speed transmission state, enhance the reliability of server system.
Description
Technical field
The present invention relates to SI, PI and EMC collaborative design method of a kind of high performance PCB, belong to server printed circuit board (PCB)
Design field.
Background technology
EMI (Electro Magnetic Interference, electromagnetic interference) designs are primarily upon high speed circuit board level
Electromagnetic interference and Anti-interference Design, with the referring to signal interconnection and power supply external Electromagnetic Launching of plate level electromagnetic interference；Anti-interference finger signal
Interconnection and power supply electromagnetic interference to external world antijamming capability.EMI design need to defer to reciprocal theorem：Easy radiation field
Loop, also easily disturbed by ambient electromagnetic field.The reason for EMI problems are easily caused in high speed circuit is that signal circuit is designed not
When with power supply ground level antiresonance.
Mainly there is the electric current of two kinds of forms in high speed circuit：Differential-mode current and common mode current.Differential-mode current refers to size phase
Deng electric current in opposite direction；Common mode current refers to equal in magnitude, direction identical electric current.Differential-mode current is in opposite direction, its far field
Radiation direction is also on the contrary, most of far-field radiation is offset.Two difference mode signal lines are nearer apart, and far-field radiation is offset more.Common mode
The sense of current is identical, and its far-field radiation direction is also identical, is overlapped mutually rear far-field radiation increase.Two common-mode signal lines are at a distance of more
Closely, far-field radiation is stronger.
Circuit EMI design is often concerned with maximum far-field radiation, and reasonable modelled signal loop, which is tried one's best, to be reduced in circuit altogether
The influence of mould electric current, EMI problems can be avoided to greatest extent.Common signal circuit, which designs improper situation, to be had：High speed signal across
Safeguard measure, PCB surface layer signals is not taken to connect up to form loop when more segmentation plane, high speed signal via switch reference planes
Deng.These signal circuits design it is improper be also SI (Signal Integrity, signal integrity) problem main source.Cause
This, many plate level EMI design methods are identical with SI design methods.
Generally powered in multi-layer PCB design using power supply ground level, power supply ground level constitutes planar resonant cavity configuration,
If planar resonant pattern is excited, cause EMI problems by larger electromagnetic radiation is produced in PCB edge.Rational power supply ground level
Design can not only provide for system stably powers, and can effectively reduce system electromagnetic radiation.Multi-layer PCB stack-design
Shi Tongchang is considered high speed signal cloth in internal layer, and high frequency radiation is effectively isolated by power supply ground level.PI(Power
Integrity, Power Integrity) need to keep PDN Low ESRs to reduce power supply ground level noise in design, clean power supply
Plane can substantially reduce system electromagnetic radiation risk.PDN impedances anti-resonance frequency is included in power supply ground level anti-resonance frequency
In, suppress PDN antiresonance peak values by adding decoupling capacitor, equally can effectively suppress the antiresonance of power supply ground level, reduce
PCB edge radiation.
In EMI design, it is contemplated that place capacitor array in power supply ground level or short-circuit hole array carries out planar resonant suppression
System.At electric capacity or short circuit hole placement location optimization power supply ground level antiresonance peak value, and ensure that its interval is less than the effective frequency of system
The 1/10 of maximum resonance wavelength in section.Also planar resonant radiation can be reduced by suppressing PCB edge in design, such as 20-H is set
With counting rule, PCB edge cloth guard wire, plating of PCB edge plate etc..Power supply ground level source of resonant excitation is found, is produced from radiation
It is effective EMI design method that source, which carries out suppression,.Main power supply ground level source of resonant excitation has SSN, signal via switching
Reference planes, signal wire cross over plane fluting etc., it is therefore desirable to take the design for suppressing electromagnetic radiation source.
To overcome above-mentioned technical problem, the present invention proposes a kind of SI, PI and EMC of high performance PCB
(electromagnetic compatibility, electromagnetic compatibility) collaborative design method.
The content of the invention
For the deficiency of above-mentioned technology, the invention provides SI, PI and EMC collaborative design side of a kind of high performance PCB
Method, it can improve the comprehensive of whole PCB system, it is ensured that the stability of whole PCB system, enhancing server system can
By property.
The present invention solves its technical problem and adopted the technical scheme that：SI, PI and EMC collaboration of a kind of high performance PCB are set
Meter method, it is characterized in that, SI, PI design of PCB system are carried out first, to PCB after PCB system meets SI, PI design requirement
The inspection of system EMC design requirements carries out EMI Feedback Designs.
Further, described method includes step in detail below：
Step S1, the main cause that analysis EMI is produced；
Step S2, the planar resonant cavity configuration being made up of power supply ground level carries out isolation high frequency radiation；
Step S3, by placing capacitor array or short-circuit hole array progress planar resonant suppression in power supply ground level；
Step S4, SI, PI, EMI balance layout strategy are set up in the case where considering SI, PI.
Further, the analysis process of EMI generations main cause is：
(1) due to there are multiple drivers in the chips while causing Simultaneous Switching hot-tempered sound SSN when making switch motion,
Switching hot-tempered sound SSN generation can cause on power distribution network PDN so that drawn in power supply ground or inject Transient Currents
Larger voltage pulsation is simultaneously coupled to the signal path generation hot-tempered sound SSN of switch, and switching hot-tempered sound SSN will cause coupled to signal path
SI problems, being propagated on power distribution network PDN causes PI problems and EMI problems；
(2) in power distribution network PDN systems, the presence of AC noises causes power distribution network PDN propagation to draw
Play SI problems and EMI problems；
(3) in power supplying system of server, generally powered in multi-layer PCB design using power supply ground level, power supply ground level
Planar resonant cavity configuration is constituted, if planar resonant pattern is excited, is led in PCB edge by larger electromagnetic radiation is produced
Cause EMI problems.
Further, the calculation formula of the hot-tempered sound SSN of switch is：
In formula, VSSNNoise voltage is represented, N represents switching signal quantity, L while with sharing power supplytotalRepresent total to return
Road inductance,Represent Simultaneous Switching rate of change.
Further, in multi-layer PCB stack-design by high speed signal cloth in internal layer, had by power supply ground level
Effect isolation high frequency radiation.
Further, in planar resonant process of inhibition is carried out, capacitor array or short-circuit hole array are placed on power supply Horizon
At face antiresonance peak value, and ensure that its interval is less than 1/10 of maximum resonance wavelength in the effective frequency range of PCB system.
Further, in step s 4, SI, PI design of system can be carried out with reference to SI, PI design method, it is full in system
After sufficient SI, PI design requirement, EMI Feedback Designs are carried out by the inspection to system EMC design requirements.
Further, the step S4 includes step in detail below：
Step S41, sets up simulation model：Interconnection frequency domain parameter is extracted by Electromagnetic Simulation or actual measurement first, then
Obtaining the compatible circuit models of SIPCE by circuit synthesis is used for time-domain-simulation, finally using broadband macro model modeling technique stream
Journey；
Step S42, sets up SI-PI collaborative simulation models：Characteristic is carried out using multiport S parameter or Z parameter first to carry
Take, then modeled by broadband macro model and obtain the block mold that signal link is constituted with PDN, will finally encapsulated and PCB grades
Coupling is ignored, and SI-PI collaborative simulation models are set up after signal link and the PDN block mold constituted are designed；
Step S43, simplifies SI-PI collaborative simulation models：The progress of SI-PI collaborative simulations model is simplified after being simplified
SI-PI collaborative simulation models；
Step S44, sets up SI, PI and EMI comprehensive analysis block diagram：On the basis of PCB system SI, PI design requirement is ensured,
EMI balances design is carried out according to design requirement and sets up SI, PI and EMI comprehensive analysis block diagram, and according to SI, PI and EMI total score
Analysis block diagram carries out building high performance PCB.
The beneficial effects of the invention are as follows：
The present invention carries out SI, PI design of PCB system first, to PCB systems after PCB system meets SI, PI design requirement
The inspection of system EMC design requirements carries out EMI Feedback Designs, on the basis of system SI, PI design requirement is ensured, according to design need
Seek progress EMI balance designs, it is proposed that a kind of system-level EMI balances strategy.
The present invention in whole PCB design by the way that SI, PI and EMC are considered into after, greatly improved
Whole PCB system it is comprehensive, so as to ensure that the stability of whole system, preferably carried out between signal in reality
High speed transmission state is run, the reliability of server system is enhanced.
Brief description of the drawings
With reference to Figure of description, the present invention will be described.
Fig. 1 is method flow diagram of the invention；
Fig. 2 is differential mode and common mode current far-field radiation schematic diagram；
Fig. 3 is upper two kinds sonic propagation schematic diagrames of making an uproar of PDN；
Fig. 4 is that power supply ground level resonance causes PCB edge radiation intensification schematic diagram；
Fig. 5 is that capacitor array suppresses planar resonant schematic diagram；
Fig. 6 is SI, PI, EMI comprehensive analysis block diagram；
Fig. 7 is the compatible circuit model schematics of SIPCE；
Fig. 8 is the block mold schematic diagram that signal link is constituted with PDN；
Fig. 9 is SI-PI collaborative simulation model schematics；
Figure 10 is the SI-PI collaborative simulation model schematics after simplifying.
Embodiment
For the technical characterstic for illustrating this programme can be understood, below by embodiment, and its accompanying drawing is combined, to this
Invention is described in detail.Following disclosure provides many different embodiments or example is used for realizing the difference of the present invention
Structure.In order to simplify disclosure of the invention, hereinafter the part and setting of specific examples are described.In addition, the present invention can
With repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not
Indicate the relation between various embodiments are discussed and/or set.It should be noted that part illustrated in the accompanying drawings is not necessarily
It is drawn to scale.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting this
Invention.
SI, PI and EMC collaborative design method of a kind of high performance PCB, carry out SI, PI design of PCB systems first,
PCB system meets and carries out EMI Feedback Designs to the inspection of PCB system EMC design requirements after SI, PI design requirement.The present invention exists
After entirely in PCB design by the way that SI, PI and EMC are considered into, it can greatly improve whole PCB system
It is comprehensive, so as to ensure that the stability of whole system, preferably carried out between signal in the transmission of actual motion high speed
State, enhances the reliability of server system.
As shown in figure 1, SI, PI and EMC collaborative design method of a kind of high performance PCB of the present invention are included in detail below
Step：
Step S1, the main cause that analysis EMI is produced；
Step S2, the planar resonant cavity configuration being made up of power supply ground level carries out isolation high frequency radiation；
Step S3, by placing capacitor array or short-circuit hole array progress planar resonant suppression in power supply ground level；
Step S4, SI, PI, EMI balance layout strategy are set up in the case where considering SI, PI.
As shown in Fig. 2 mainly there is the electric current of two kinds of forms in high speed circuit：Differential-mode current and common mode current.Differential-mode current
Refer to electric current equal in magnitude, in opposite direction；Common mode current refers to equal in magnitude, direction identical electric current.Differential-mode current direction phase
Instead, its far-field radiation direction is also on the contrary, most of far-field radiation is offset.Two difference mode signal lines are nearer apart, and far-field radiation is supported
Disappear more.Common mode current direction is identical, and its far-field radiation direction is also identical, is overlapped mutually rear far-field radiation increase.Two common modes are believed
Number line is at a distance of nearer, and far-field radiation is stronger.Circuit EMI design is often concerned with maximum far-field radiation, and reasonable modelled signal is returned
Road, which is tried one's best, reduces the influence of common mode current in circuit, and EMI problems can be avoided to greatest extent.Common signal circuit design is not
When situation has：Safeguard measure, PCB tables are not taken when high speed signal is across segmentation plane, high speed signal via switching reference planes
Layer signal connects up to form loop etc..These signal circuits design it is improper be also SI problems main source, therefore many plates level
EMI design method is identical with SI design methods.
The hot-tempered sound of Simultaneous Switching (SSN) is due to the presence of multiple drivers in the chips while causing when making switch motion
, there is a formula more accurately to give expression to this influence.SSN refers to calculating formula：In above formula, VSSN
Noise voltage is represented, N represents switching signal quantity, L while with sharing power supplytotalTotal loop inductance is represented,Represent same
When switch change rate.For SSN reference formulas, VSSNWith N, Ltotal、It is directly proportional.SSN generation is with can causing in power supply
In draw or inject Transient Currents, cause on PDN larger voltage pulsation and be coupled to signal path to produce SSN noises.SSN
Produced at chip driver end, will cause SI problems coupled to signal path, being propagated on PDN causes PI problems even EMI
Problem.SI and PI designs are closely linked by SSN, be to the emulation of SSN noises into
Generally powered in multi-layer PCB design using power supply ground level, power supply ground level constitutes planar resonant cavity configuration,
If planar resonant pattern is excited, cause EMI problems by larger electromagnetic radiation is produced in PCB edge.Rational power supply ground level
Design can not only provide for system stably powers, and can effectively reduce system electromagnetic radiation.Multi-layer PCB stack-design
Shi Tongchang is considered high speed signal cloth in internal layer, and high frequency radiation is effectively isolated by power supply ground level.Need to keep in PI designs
PDN Low ESRs are to reduce power supply ground level noise, and clean power supply ground level can substantially reduce system electromagnetic radiation risk.
In PDN systems, AC noises be always one very headache the problem of, the presence of AC noises causes PDN propagation
The problem of SI and EMI being caused.And the VRM and SSN that AC source is mainly come.This allows for SI and PI and contacts very close rise
Come.Upper two kinds sonic propagation schematic diagrames of making an uproar of PDN are as shown in Figure 3.
PDN impedances anti-resonance frequency is included in power supply ground level anti-resonance frequency, is suppressed by adding decoupling capacitor
PDN antiresonance peak values, equally can effectively suppress the antiresonance of power supply ground level, reduce PCB edge radiation.Power supply ground level
Resonance causes PCB edge radiation intensification schematic diagram as shown in Figure 4.
It is contemplated that placing capacitor array or short-circuit hole array progress planar resonant suppression in power supply ground level in EMI design.
At electric capacity or short circuit hole placement location optimization power supply ground level antiresonance peak value, and ensure that its interval is less than the effective frequency range of system
The 1/10 of interior maximum resonance wavelength.Also planar resonant radiation, such as 20-H designs can be reduced in design by suppressing PCB edge
Rule, PCB edge cloth guard wire, PCB edge plate plating etc..Power supply ground level source of resonant excitation is found, from radiation generating source
It is effective EMI design method that head, which carries out suppression,.Main power supply ground level source of resonant excitation has SSN, signal via switching ginseng
Plane, signal wire are examined across plane fluting etc., therefore suppresses the design in electromagnetic radiation source.Capacitor array suppresses planar resonant
As shown in Figure 5.
EMI design is typically opening through whole system design process, is related to selected scheme, parts selection and circuit theory and sets
The meter stage.PCB design phase mainly considers that SI, PI are designed, and EMI designs then carry out balance design in SI, PI design basis.
The EMI design measures that can be taken in PCB design are also more, and most SI, PI design method both contributes to reduction system electricity
Magnetic radiation, but some special EMI design measures run counter to SI, PI design theory, and such as electric power network adds filter inductance and magnetic
Situations such as pearl.SI, PI design of system can be carried out with reference to SI, PI design method.The present invention meets SI, PI design need in system
After asking, EMI Feedback Designs are carried out by the inspection to system EMC design requirements, this is a kind of system-level EMI balances plan
Slightly.The present invention carries out EMI balances on the basis of system SI, PI design requirement is ensured, according to design requirement and designed, such as Fig. 6 institutes
Show, set up SI, PI and EMI comprehensive analysis block diagram, and high-performance is built according to the progress of SI, PI and EMI comprehensive analysis block diagram
PCB。。
Because driver is active device, so modeling gets up extremely difficult.And common encapsulation and PCB grades of interconnection category
Passive device, therefore it is extremely difficult to obtain its lumped-element model.Difficulty based on these two aspects, can use broadband macro model
It is modeled.Broadband macro model modeling need to extract interconnection frequency domain parameter by Electromagnetic Simulation or actual measurement first, finally by
Circuit synthesis, which obtains the compatible circuit model of SIPCE as shown in Figure 7, is used for time-domain-simulation, broadband macro model modeling technique stream
Journey.
Realize that SI-PI collaborative simulations must be in modeling comprising the coupling between PDN and signal link, it is therefore desirable to
Using collaborative modeling technology.The signal interconnection and power supply of chip-- PCB grades of encapsulation must be considered as one in collaborative modeling
Entirety is modeled.Feature extraction is carried out using multiport S parameter or Z parameter generally in collaborative modeling, then passes through broadband
Macro model modeling obtains the block mold that signal link is constituted with PDN, as shown in Figure 8.Fig. 8 SMIS chip levels model includes two
Point：Signal link driver model and chip-scale PDN models, Icc (t) are that behavior model compensates electric current, and N represents multiple drivings
Total current during device Simultaneous Switching.PDN is modeled by package level modeling with signal interconnection as a multiport network, is led to
Coupled characteristic between transfger impedance information representation signal and power supply between multiport network is crossed, PCB grades of collaborations can be similarly carried out and build
Mould.Encapsulation and model port number in PCB grades of collaborative modelings are a lot, cause model complexity to increase sharply, simulation efficiency is low.Therefore
In collaborative modeling must Controlling model port number, to prevent excessively complicated model from causing SI-PI Cosim-Platforms
Efficiency is too low.
Coupled between power supply and signal and be mainly reflected in chip driver end, the coupling of PCB and the passive interconnection of package level can lead to
Related measure is crossed to substantially reduce.Power supply after being designed in actual design using SI-PI collaborative simulations mainly for SI, PI is to letter
The impact analysis of number deterioration, now encapsulation couples very little with PCB grades of PDN with signal interconnection.Therefore it is imitative in order to simplify modeling
True process, can will encapsulate and ignore with PCB grade of coupling, the above-mentioned signal link of joint is cooperateed with after being designed with PDN macro models and imitated
True analysis, sets up SI-PI collaborative simulation models as shown in Figure 9.
The reason for causing SI to be unsatisfactory for direct linear superposition with PI noises is that the high-order mutual interference in system influences, main body
Present drive side non-linear modulation and encapsulation and PCB grades of high-order electromagnetic actions.Encapsulation is relative with PCB grades of high-order mutual interference noises
It is much smaller in drive side non-linear modulation noise, if the high-order that SSN noises are can obtain in emulation in drive side is coupled
Effect, the SI-PI collaborative simulations result now obtained has very high confidence level.Adopted simultaneously in SSN Analysis of Character In Time Domain
It is the excessive estimation to Simultaneous Switching electric current with the approximate transient current of triangular wave, can compensate for the encapsulation ignored a little and PCB grades high
Rank influence of noise.Therefore the progress of SI-PI collaborative simulations model is further simplified to SI-PI collaborative simulations letter as shown in Figure 10
Change model.
SI, PI design of system can be carried out with reference to SI, PI design method.After system meets SI, PI design requirement, lead to
Cross the inspection to system EMC design requirements and carry out EMI Feedback Designs, this is a kind of system-level EMI balances strategy.Ensureing
On the basis of system SI, PI design requirement, according to design requirement carry out EMI balance design, set up SI as shown in Figure 6, PI,
EMI comprehensive analysis block diagram carries out building high performance PCB.
Compared with prior art, the invention has the characteristics that：
1) main two aspects of EMI generations, are proposed：Signal circuit designs improper and power supply ground level antiresonance, root
According to the source of these two aspects factor, so that it may EMI mechanisms of production are expressly understood.Knowing two main causes that EMI is produced
Afterwards, it can be planned in advance respectively from SI and PI angles respectively, so as to avoid EMI generation；
2) a kind of planar resonant cavity configuration, is proposed, if planar resonant pattern is excited, PDN impedance anti-resonance frequencies
Included in power supply ground level anti-resonance frequency, suppress PDN antiresonance peak values by adding decoupling capacitor, equally can effectively press down
The antiresonance of power supply ground level processed, reduces PCB edge radiation；
3), propose power supply ground level and place the method that capacitor array or short-circuit hole array carry out planar resonant suppression, electricity
Perhaps short circuit hole placement location ensures that its interval is less than the effective frequency range of system preferably at power supply ground level antiresonance peak value
The 1/10 of interior maximum resonance wavelength；
4) a kind of system-level EMI balances strategy, is proposed：SI, PI of system can be carried out with reference to SI, PI design method
Design, after system meets SI, PI design requirement, EMI Feedback Designs are carried out by the inspection to system EMC design requirements.
On the basis of guarantee system SI, PI design requirement, EMI balances are carried out according to design requirement and designed.
Simply the preferred embodiment of the present invention described above, for those skilled in the art,
Without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also regarded as this hair
Bright protection domain.
Claims (8)
1. SI, PI and EMC collaborative design method of a kind of high performance PCB, it is characterized in that, SI, PI that PCB system is carried out first are set
Meter, the inspection to PCB system EMC design requirements after PCB system meets SI, PI design requirement carries out EMI Feedback Designs.
2. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 1, it is characterized in that, it is described
Method include step in detail below：
Step S1, the main cause that analysis EMI is produced；
Step S2, the planar resonant cavity configuration being made up of power supply ground level carries out isolation high frequency radiation；
Step S3, by placing capacitor array or short-circuit hole array progress planar resonant suppression in power supply ground level；
Step S4, SI, PI, EMI balance layout strategy are set up in the case where considering SI, PI.
3. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 2, it is characterized in that, EMI productions
The analysis process of raw main cause is：
(1) due to there are multiple drivers in the chips while causing Simultaneous Switching hot-tempered sound SSN when making switch motion, switch hot-tempered
Sound SSN generation can cause Transient Currents are drawn or injected in power supply ground, cause larger voltage on power distribution network PDN
Fluctuate and be coupled to signal path and produce the hot-tempered sound SSN of switch, SI problems will be caused coupled to signal path by switching hot-tempered sound SSN,
Being propagated on power distribution network PDN causes PI problems and EMI problems；
(2) in power distribution network PDN systems, the presence of AC noises causes power distribution network PDN propagation to cause SI
Problem and EMI problems；
(3) in power supplying system of server, generally powered in multi-layer PCB design using power supply ground level, power supply ground level is constituted
Planar resonant cavity configuration, if planar resonant pattern is excited, causes EMI in PCB edge by larger electromagnetic radiation is produced
Problem.
4. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 3, it is characterized in that, it is described
The calculation formula for switching hot-tempered sound SSN is：
<mrow>
<msub>
<mi>V</mi>
<mrow>
<mi>S</mi>
<mi>S</mi>
<mi>N</mi>
</mrow>
</msub>
<mo>=</mo>
<msub>
<mi>NL</mi>
<mrow>
<mi>t</mi>
<mi>o</mi>
<mi>t</mi>
<mi>a</mi>
<mi>l</mi>
</mrow>
</msub>
<mfrac>
<mrow>
<mi>d</mi>
<mi>i</mi>
</mrow>
<mrow>
<mi>d</mi>
<mi>t</mi>
</mrow>
</mfrac>
</mrow>
In formula, VSSNNoise voltage is represented, N represents switching signal quantity, L while with sharing power supplytotalRepresent total loop electricity
Sense,Represent Simultaneous Switching rate of change.
5. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 2, it is characterized in that, many
By high speed signal cloth in internal layer during layer PCB stack-designs, carry out being effectively isolated high frequency radiation by power supply ground level.
6. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 2, it is characterized in that, entering
In row planar resonant process of inhibition, capacitor array or short-circuit hole array are placed at power supply ground level antiresonance peak value, and are ensured
Its interval is less than 1/10 of maximum resonance wavelength in the effective frequency range of PCB system.
7. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 2, it is characterized in that, in step
In rapid S4, SI, PI design of system can be carried out with reference to SI, PI design method, after system meets SI, PI design requirement, is passed through
Inspection to system EMC design requirements carries out EMI Feedback Designs.
8. SI, PI and EMC collaborative design method of a kind of high performance PCB according to claim 2 to 7 any one, its
It is characterized in that the step S4 includes step in detail below：
Step S41, sets up simulation model：Interconnection frequency domain parameter is extracted by Electromagnetic Simulation or actual measurement first, then passed through
Circuit synthesis, which obtains the compatible circuit models of SIPCE, is used for time-domain-simulation, finally using broadband macro model modeling technique flow；
Step S42, sets up SI-PI collaborative simulation models：Feature extraction is carried out using multiport S parameter or Z parameter first, then
Modeled by broadband macro model and obtain the block mold that signal link and PDN are constituted, will finally encapsulated and neglected with PCB grades of coupling
Slightly, SI-PI collaborative simulation models are set up after signal link and the PDN block mold constituted are designed；
Step S43, simplifies SI-PI collaborative simulation models：SI-PI collaborative simulations model simplify to be simplified rear SI-PI
Collaborative simulation model；
Step S44, sets up SI, PI and EMI comprehensive analysis block diagram：On the basis of PCB system SI, PI design requirement is ensured, according to
Design requirement carries out EMI balances design and sets up SI, PI and EMI comprehensive analysis block diagram, and according to SI, PI and EMI comprehensive analysis frame
High performance PCB is built in figure progress.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI692276B (en) * | 2018-11-29 | 2020-04-21 | 宏碁股份有限公司 | Noise reduction method and electronic system using the same |
| CN112528589A (en) * | 2019-08-29 | 2021-03-19 | 天津大学青岛海洋技术研究院 | Worst case excitation applied to DDR interface system transmission performance detection |
| CN112528580A (en) * | 2020-11-19 | 2021-03-19 | 广州大学 | Electromagnetic radiation simulation prediction method for flyback converter circuit board |
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