CN107147282A - A kind of efficient pair of capacitance charge pump - Google Patents
A kind of efficient pair of capacitance charge pump Download PDFInfo
- Publication number
- CN107147282A CN107147282A CN201710396090.4A CN201710396090A CN107147282A CN 107147282 A CN107147282 A CN 107147282A CN 201710396090 A CN201710396090 A CN 201710396090A CN 107147282 A CN107147282 A CN 107147282A
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- oxide
- metal
- controls
- charge pump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention discloses a kind of efficient pair of capacitance charge pump, it is characterised in that：Including low-dropout linear voltage-regulating circuit, analog switch and its control signal, current mirror and electric capacity；The control signal of the analog switch includes S1, S2, S3, S4, S5, S6, S7 and S8；The analog switch includes the MP1 that S2 is controlled, the MP2 of S6 controls, the MP6 of S1 controls, the MP5 of S5 controls, the MP3 of S3 controls, the MP4 of S7 controls, the MN1 of S4 controls, the MN2 of S8 controls；The electric capacity includes C1 and C2.A kind of efficient pair of capacitance charge pump of the present invention has the advantages that output current ability is strong；Charge pump is improved the ability of output current and is reduced output voltage ripple by the way of double electric capacity alternations；It is very significantly improved using the power amplifier properties of the charge pump in the present invention.
Description
Technical field
The present invention relates to a kind of Switching Power Supply, especially a kind of efficient pair of capacitance charge pump.
Background technology
Charge pump circuit is a kind of electricity produced by electric charge accumulation effect on electric capacity higher than supply voltage or negative voltage
Road.The course of work of charge pump is storage energy first, is then released energy in a controlled manner, with the output electricity needed for obtaining
Pressure.Charge pump, come storage energy, and realizes voltage increase using capacitor by switch arrays and oscillator etc..Charge pump is very
Suitable for slimline portable electric die pressing product, such as mobile phone, notebook computer, Medical Instruments.The charge pump knot of most common of which
Structure is multiplication of voltage charge pump, is charged using single pump electric capacity.
Traditional multiplication of voltage charge pump voltage is by oscillator, multiple analog switches (or analog switch array), control circuit, outer
Boundary's pump electric capacity CF and output capacitance CR composition.As shown in figure 1, in charging stage, switch S1/S3 conductings, S2/S4 shut-offs.Electric capacity
CF is electrically charged, and the voltage at CF two ends is charged to input voltage VIN, and storage energy, and the energy of storage will be in next electric discharge
Stage is transferred.Storage capacitor CR, just 2VIN electricity has been charged in a upper discharge cycle by the energy come from CF transfers
Pressure, and provide electric current for load.In discharge regime, switch S1/S3 shut-offs, S2/S4 conductings.The level at electric capacity CF two ends is shifted up
VIN, and CF had charged to VIN in a upper charging stage, therefore, the total voltage at CR two ends turns into 2VIN now.Then, it is electric
Hold CF and discharge the energy transfer for storing the charging stage to CR, and electric current is provided for load.
The frequency of charging-discharging cycle depends on clock frequency；Generally reduced using higher clock frequency to electric capacity CF with
The requirement of CR capacitances.The topmost performance indications of charge pump have three：Power consumption efficiency, output voltage ripple amplitude and area.Can
It is relatively low with the multiplication of voltage charge pump power for finding out traditional, and the ripple amplitude of output voltage is larger.
The content of the invention
The goal of the invention of the present invention is：It is first in upper electricity for above-mentioned problem there is provided a kind of pair of capacitance charge pump
Phase prevents the overshoot of output voltage by the way of soft start, effectively, while by the way of double electric capacity alternations, improving
The ability of output current simultaneously reduces output voltage ripple.
The technical solution adopted by the present invention is as follows：
A kind of efficient pair of capacitance charge pump of the present invention, including low-dropout linear voltage-regulating circuit, analog switch and its control letter
Number, current mirror and electric capacity；The control signal of the analog switch includes S1, S2, S3, S4, S5, S6, S7 and S8；The simulation is opened
Closing includes the MP1 of S2 controls, the MP2 of S6 controls, the MP6 of S1 controls, the MP5 of S5 controls, the MP3 of S3 controls, S7 controls
The MN2 of the MN1 of MP4, S4 control, S8 control；The electric capacity includes C1 and C2；
The current mirror is in series with C1 and C2 respectively, and the C1 other ends and MP3 drain electrode, MN1 drain compared to node CN1,
The C2 other ends and MP4 drain electrode, MN2 drain compared to node CN2；The series circuit of the MP3 and MN1, and MP4 and MN2
Series circuit, in parallel connection；Described MP1, MP2, MP6, MP5 are in parallel, its parallel circuit one end connection power power-supply
PVDD, MP1 and the MP6 other end, and the MP2 and MP5 other end connect C1 and C2 respectively；The current mirror respectively with MP1
Node CP1 and node CP2 are intersected at MP2.
Further, the current mirror includes current mirror 1 and current mirror 2；The current mirror 1 include electric current I1, and and its
The metal-oxide-semiconductor A and metal-oxide-semiconductor B of connection；The source electrode and grid of the metal-oxide-semiconductor A and metal-oxide-semiconductor B are connected respectively, the electric current I1 connections MOS
Pipe A and metal-oxide-semiconductor B grid；The current mirror 2 includes and electric current I2, and connected metal-oxide-semiconductor C and metal-oxide-semiconductor D；It is described
Metal-oxide-semiconductor C and metal-oxide-semiconductor D source electrode and grid is connected respectively, the grid of the electric current I2 connection metal-oxide-semiconductor C and metal-oxide-semiconductor D；The electricity
Flow I1 equal with electric current I2.
Further, the low-dropout linear voltage-regulating circuit includes OP amplifiers, resistance R1, resistance R2 and metal-oxide-semiconductor K；It is described
The inverting input access reference voltage Vref of OP amplifiers；The normal phase input end of the OP amplifiers accesses R1 and R2 parallel connection
Circuit；The output end connection metal-oxide-semiconductor K of OP amplifiers grid；Metal-oxide-semiconductor K source electrode connects supply voltage VDD, MOS respectively
Pipe K drain electrode connection MP3 and MP4 source electrode；The R1 connection power power-supplies PVDD, R2 are grounded.
In summary, by adopting the above-described technical solution, the beneficial effects of the invention are as follows：With traditional use single capacitor
Charge pump compare, the present invention in double capacitance charge pumps have the advantages that output current ability is strong；At upper electric initial stage using soft
The mode of startup, effectively prevents the overshoot of output voltage；Charge pump improves output by the way of double electric capacity alternations
The ability of electric current simultaneously reduces output voltage ripple；Obtain very big using the power amplifier properties of the charge pump in the present invention
Improve.
Brief description of the drawings
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein：
Fig. 1 is traditional multiplication of voltage charge pump circuit figure.
Fig. 2 is a kind of circuit diagram of efficient pair of capacitance charge pump of the present invention.
Fig. 3 is low-dropout linear voltage-regulating circuit figure.
Fig. 4 is the timing waveform of all switches in a kind of efficient pair of capacitance charge pump of the present invention.
Embodiment
All features disclosed in this specification, or disclosed all methods or during the step of, except mutually exclusive
Feature and/or step beyond, can combine in any way.
Any feature disclosed in this specification (including any accessory claim, summary), unless specifically stated otherwise,
Replaced by other equivalent or with similar purpose alternative features.I.e., unless specifically stated otherwise, each feature is a series of
An example in equivalent or similar characteristics.
Such as Fig. 2, a kind of efficient pair of capacitance charge pump of the present invention, including low-dropout linear voltage-regulating circuit, analog switch and its
Control signal, current mirror and electric capacity；The control signal of the analog switch includes S1, S2, S3, S4, S5, S6, S7 and S8；It is described
Analog switch includes the MP1 that S2 is controlled, the MP2 of S6 controls, the MP6 of S1 controls, the MP5 of S5 controls, the MP3 of S3 controls, S7 controls
The MN2 of the MN1 of the MP4 of system, S4 control, S8 control；The electric capacity includes C1 and C2；
The current mirror is in series with C1 and C2 respectively, and the C1 other ends and MP3 drain electrode, MN1 drain compared to node CN1,
The C2 other ends and MP4 drain electrode, MN2 drain compared to node CN2；The series circuit of the MP3 and MN1, and MP4 and MN2
Series circuit, in parallel connection；Described MP1, MP2, MP6, MP5 are in parallel, its parallel circuit one end connection power power-supply
PVDD, MP1 and the MP6 other end, and the MP2 and MP5 other end connect C1 and C2 respectively；The current mirror respectively with MP1
Node CP1 and node CP2 are intersected at MP2.
The current mirror includes current mirror 1 and current mirror 2；The current mirror 1 includes electric current I1, and connected
Metal-oxide-semiconductor A and metal-oxide-semiconductor B；The source electrode and grid of the metal-oxide-semiconductor A and metal-oxide-semiconductor B are connected respectively, the electric current I1 connection metal-oxide-semiconductor A and
Metal-oxide-semiconductor B grid；The current mirror 2 includes and electric current I2, and connected metal-oxide-semiconductor C and metal-oxide-semiconductor D；The metal-oxide-semiconductor C
Connected respectively with metal-oxide-semiconductor D source electrode and grid, the grid of the electric current I2 connection metal-oxide-semiconductor C and metal-oxide-semiconductor D；The electric current I1 with
Electric current I2 is equal in magnitude.
Such as Fig. 3, the low-dropout linear voltage-regulating circuit includes OP amplifiers, resistance R1, resistance R2 and metal-oxide-semiconductor K；The OP
The inverting input access reference voltage Vref of amplifier；The normal phase input end access R1 and R2 of OP amplifiers parallel connection electricity
Road；The output end connection metal-oxide-semiconductor K of OP amplifiers grid；Metal-oxide-semiconductor K source electrode connects supply voltage VDD, metal-oxide-semiconductor respectively
K drain electrode connection MP3 and MP4 source electrode；The R1 connection power power-supplies PVDD, R2 are grounded.
A kind of operation principle of efficient pair of capacitance charge pump of the present invention：Charge pump normal work is divided into two stages：
First stage is the soft start-up process of charge pump, and now S1, S5, S3, S4, S7 and S8 are high level, S2 and
S6 is low level, and only switching tube MN1, MN2 and MP1, MP2 are turned on, and electric capacity C1 and C2 is charged by the I1 current mirrors constituted,
Electric capacity is charged by the way of constant current, is to prevent PVDD voltage overshoots in chip power up.As electric capacity C1 and
C2 chargings reach burning voltage VCWhen, charge pump completes the soft start in the first rank stage；
Second stage is the process that double electric capacity C1 and C2 alternations are PVDD (power power-supply) power supplies, due to electric capacity C1
It is full symmetric with C1 or so circuit, including biasing, so only analyzing left side circuit, the on off state of the right circuit and the left side
Circuit is opposite.From being analyzed above, when S1, S4 and S2, S3 are high level, the voltage on electric capacity C1 is VC, when under
During one state, S1, S4 and S2, S3 are changed into low level, and node CN1 voltages are changed into V from 0VCN1, because electric capacity both end voltage can not dash forward
Become, so node CN1 voltages are by VCIt is changed into VC+VCN1, now switching tube MP1 conductings, VPVDDVoltage can be made up of amplifier OP
Negative feedback loop obtain：
Similarly, when the right circuit works, switching tube MP2 conductings, VPVDDVoltage can obtain：
Such as Fig. 4, within a clock cycle, circuit alternately works on the right of the left side, makes VPVDDVoltage is in whole clock
Constant in cycle is negative-feedback design load.
The invention is not limited in foregoing embodiment.The present invention, which is expanded to, any in this manual to be disclosed
New feature or any new combination, and disclose any new method or process the step of or any new combination.
Claims (3)
1. a kind of efficient pair of capacitance charge pump, it is characterised in that：Including low-dropout linear voltage-regulating circuit, analog switch and its control
Signal, current mirror and electric capacity；The control signal of the analog switch includes S1, S2, S3, S4, S5, S6, S7 and S8；The simulation
Switch includes the MP1 of S2 controls, the MP2 of S6 controls, the MP6 of S1 controls, the MP5 of S5 controls, the MP3 of S3 controls, S7 controls
The MN2 of the MN1 of MP4, S4 control, S8 control；The electric capacity includes C1 and C2；
The current mirror is in series with C1 and C2 respectively, and the C1 other ends and MP3 drain electrode, MN1 drain compared to node CN1, and C2 is another
One end and MP4 drain electrode, MN2 drain compared to node CN2；The series circuit of the MP3 and MN1, and MP4 and MN2 string
Join circuit, in parallel connection；Described MP1, MP2, MP6, MP5 are in parallel, its parallel circuit one end connection power power-supply PVDD,
The MP1 and MP6 other end, and the MP2 and MP5 other end connect C1 and C2 respectively；The current mirror respectively with MP1 and MP2
Intersect at node CP1 and node CP2.
2. efficient pair of capacitance charge pump according to claim 1, it is characterised in that：The current mirror includes the He of current mirror 1
Current mirror 2；The current mirror 1 includes electric current I1, and connected metal-oxide-semiconductor A and metal-oxide-semiconductor B；The metal-oxide-semiconductor A and metal-oxide-semiconductor B
Source electrode and grid connect respectively, the grid of the electric current I1 connection metal-oxide-semiconductor A and metal-oxide-semiconductor B；The current mirror 2 includes and electric current
I2, and connected metal-oxide-semiconductor C and metal-oxide-semiconductor D；The source electrode and grid of the metal-oxide-semiconductor C and metal-oxide-semiconductor D are connected respectively, the electricity
Flow I2 connection metal-oxide-semiconductor C and metal-oxide-semiconductor D grid；The electric current I1 is equal with electric current I2.
3. efficient pair of capacitance charge pump according to claim 1, it is characterised in that：The low-dropout linear voltage-regulating circuit bag
Include OP amplifiers, resistance R1, resistance R2 and metal-oxide-semiconductor K；The inverting input access reference voltage of the OP amplifiers；The OP
The normal phase input end of amplifier accesses R1 and R2 parallel circuit；The output end connection metal-oxide-semiconductor K of OP amplifiers grid；
Metal-oxide-semiconductor K source electrode connection supply voltage VDD, metal-oxide-semiconductor K drain electrode connect MP3 and MP4 source electrode respectively；The R1 connections power
Power supply PVDD, R2 ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710396090.4A CN107147282B (en) | 2017-05-27 | 2017-05-27 | A kind of efficiently double capacitance charge pumps |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710396090.4A CN107147282B (en) | 2017-05-27 | 2017-05-27 | A kind of efficiently double capacitance charge pumps |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107147282A true CN107147282A (en) | 2017-09-08 |
| CN107147282B CN107147282B (en) | 2019-07-19 |
Family
ID=59780558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710396090.4A Active CN107147282B (en) | 2017-05-27 | 2017-05-27 | A kind of efficiently double capacitance charge pumps |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107147282B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110445364A (en) * | 2019-09-11 | 2019-11-12 | 上海南芯半导体科技有限公司 | Soft for 1:2 reversed charge pump opens electricity and driving circuit and its implementation |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5262934A (en) * | 1992-06-23 | 1993-11-16 | Analogic Corporation | Bipolar voltage doubler circuit |
| DE19939091A1 (en) * | 1999-08-18 | 2001-03-08 | Siemens Ag | Charge-pump circuit e.g. for phase-locked loop (PLL) circuit |
| US6417725B1 (en) * | 2000-08-28 | 2002-07-09 | Marvell International, Ltd. | High speed reference buffer |
| CN1421997A (en) * | 2001-11-29 | 2003-06-04 | 恩益禧电子股份有限公司 | Semiconductor boosted circuit of transistor without breakdown voltage being two times of power supply voltage |
| CN101335486A (en) * | 2007-06-28 | 2008-12-31 | 天利半导体（深圳）有限公司 | Low-cost high-efficient time division multiplex charge pump circuit |
| CN101552552A (en) * | 2008-04-02 | 2009-10-07 | 联咏科技股份有限公司 | Dynamic feedback stabilized charge pump device |
| CN101783589A (en) * | 2009-01-20 | 2010-07-21 | 恩益禧电子股份有限公司 | Dc/dc converter circuit |
| CN201947172U (en) * | 2011-01-07 | 2011-08-24 | 长盛科技股份有限公司 | Switching type voltage-stabilizing circuit |
| CN105406711A (en) * | 2015-11-27 | 2016-03-16 | 上海晶丰明源半导体有限公司 | Two-way voltage conversion control chip, two-way voltage converter and electronic watt-hour meter |
-
2017
- 2017-05-27 CN CN201710396090.4A patent/CN107147282B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5262934A (en) * | 1992-06-23 | 1993-11-16 | Analogic Corporation | Bipolar voltage doubler circuit |
| DE19939091A1 (en) * | 1999-08-18 | 2001-03-08 | Siemens Ag | Charge-pump circuit e.g. for phase-locked loop (PLL) circuit |
| US6417725B1 (en) * | 2000-08-28 | 2002-07-09 | Marvell International, Ltd. | High speed reference buffer |
| CN1421997A (en) * | 2001-11-29 | 2003-06-04 | 恩益禧电子股份有限公司 | Semiconductor boosted circuit of transistor without breakdown voltage being two times of power supply voltage |
| CN101335486A (en) * | 2007-06-28 | 2008-12-31 | 天利半导体（深圳）有限公司 | Low-cost high-efficient time division multiplex charge pump circuit |
| CN101552552A (en) * | 2008-04-02 | 2009-10-07 | 联咏科技股份有限公司 | Dynamic feedback stabilized charge pump device |
| CN101783589A (en) * | 2009-01-20 | 2010-07-21 | 恩益禧电子股份有限公司 | Dc/dc converter circuit |
| CN201947172U (en) * | 2011-01-07 | 2011-08-24 | 长盛科技股份有限公司 | Switching type voltage-stabilizing circuit |
| CN105406711A (en) * | 2015-11-27 | 2016-03-16 | 上海晶丰明源半导体有限公司 | Two-way voltage conversion control chip, two-way voltage converter and electronic watt-hour meter |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110445364A (en) * | 2019-09-11 | 2019-11-12 | 上海南芯半导体科技有限公司 | Soft for 1:2 reversed charge pump opens electricity and driving circuit and its implementation |
| CN110445364B (en) * | 2019-09-11 | 2020-08-11 | 上海南芯半导体科技有限公司 | For a 1: soft start and drive circuit of 2-direction charge pump and realization method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107147282B (en) | 2019-07-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Palumbo et al. | Charge pump circuits: An overview on design strategies and topologies | |
| Vaisband et al. | A closed-loop reconfigurable switched-capacitor DC-DC converter for sub-mW energy harvesting applications | |
| KR101194508B1 (en) | Charge pump circuit and methods of operation thereof | |
| CN105843312B (en) | High and low-power voltage regulator circuit | |
| JP2001037213A (en) | Switching regulator | |
| GB2455524A (en) | Charge pump circuit having flying capacitor and reservoir capacitor | |
| CN106208755B (en) | Controlled in Current Mode and Based adjuster with loading resistor emulation | |
| CN103066832A (en) | Charge pump capable of being started quickly | |
| US8093941B2 (en) | Systems and devices for dynamically scaled charge pumping | |
| CN202364120U (en) | Novel voltage stabilization type drive circuit based on charge pump | |
| US20150028938A1 (en) | Charge pumping device | |
| EP2306628A1 (en) | High-efficiency, switched-capacitor power conversion | |
| CN107147282A (en) | A kind of efficient pair of capacitance charge pump | |
| CN101095275A (en) | Monitoring the temperature dependence of the external capacitors of a charge pump and improved charge pumps based thereon | |
| Abdelmagid et al. | An adaptive fully integrated dual-output energy harvesting system with MPPT and storage capability | |
| CN107592011B (en) | Charge pump system and three-dimensional NAND memory | |
| CN204633599U (en) | Power charge pump and use the electric power management circuit of this power charge pump | |
| CN205544931U (en) | System for substrate bias circuit, voltage multiplier and contain said voltage multiplier | |
| Umaz et al. | Design of an inductorless power converter with maximizing power extraction for energy harvesting | |
| EP1691472B1 (en) | Self regulating charge pump | |
| CN114421760A (en) | Power generation circuit in time-interleaved charge pump | |
| CN209299141U (en) | A kind of adjustable voltage converter | |
| Allasasmeh et al. | Fast-startup high-efficiency tripler charge pump in standard 0.18-μm CMOS technology | |
| Helaly et al. | An integrated thermal and RF energy harvesting system with rectifying combination and storage controller for IoT devices | |
| AbdElFattah et al. | Ultra-low-voltage power management unit for thermal energy harvesting applications |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |