CN107065365B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN107065365B CN107065365B CN201710457508.8A CN201710457508A CN107065365B CN 107065365 B CN107065365 B CN 107065365B CN 201710457508 A CN201710457508 A CN 201710457508A CN 107065365 B CN107065365 B CN 107065365B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/22—Antistatic materials or arrangements
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- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Human Computer Interaction (AREA)
- Mathematical Physics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
Abstract
The embodiment of the invention provides a display panel and a display device, relates to the technical field of liquid crystal display, and can reduce the influence of a peripheral circuit on liquid crystal at the edge of a display area, so that display abnormity caused by an electric field of the peripheral circuit is improved. The display panel includes: a display area and a non-display area surrounding the display area; at least one common electrode and a plurality of touch signal lines are arranged in the display area, and each common electrode is electrically connected with at least one touch signal line; and a shielding line is arranged in the non-display area, and the shielding line and the touch signal line are arranged on the same layer. The scheme is mainly used for shielding the electric field between the peripheral circuit and the display area.
Description
Technical Field
The invention relates to the technical field of liquid crystal display, in particular to a display panel and a display device.
Background
As shown in fig. 1, fig. 1 is a schematic structural diagram of a display panel in the prior art, a current liquid crystal display panel includes a display area 1 and a non-display area 2 located at a periphery of the display area 1, a common electrode (not shown in fig. 1) and pixel electrodes (not shown in fig. 1) distributed in a matrix are disposed in the display area 1, an electric field is formed between the pixel electrodes and the common electrode, and liquid crystals are deflected to a corresponding angle under the action of the electric field to implement display.
However, the peripheral circuit 3 is further disposed in the non-display area 2, and the peripheral circuit 3 or a signal line connected to the peripheral circuit 3 may generate an electric field, and the electric field may affect a liquid crystal deflection angle in the display area 1, which may cause liquid crystal at an edge of the display area 1 to deflect to an abnormal angle, thereby causing display abnormality.
Disclosure of Invention
Embodiments of the present invention provide a display panel and a display device, which can reduce the influence of a peripheral circuit on liquid crystal at the edge of a display area, thereby improving display abnormality caused by an electric field of the peripheral circuit.
In one aspect, an embodiment of the present invention provides a display panel, where the display panel includes: a display area and a non-display area surrounding the display area;
at least one common electrode and a plurality of touch signal lines are arranged in the display area, and each common electrode is electrically connected with at least one touch signal line;
and a shielding line is arranged in the non-display area, and the shielding line and the touch signal line are arranged on the same layer.
Optionally, the display panel includes an array substrate;
the array substrate comprises: the touch control circuit comprises a substrate, a common electrode layer, a touch signal line layer and an insulating layer;
the touch signal line layer, the insulating layer and the common electrode layer are sequentially arranged on one side of the substrate base plate along the direction far away from the substrate base plate;
the common electrode layer comprises the common electrode.
Optionally, in a display phase, inputting a first signal which is the same as a common voltage signal of the common electrode to the shielding line;
in the touch control stage, the common electrode is reused as a touch control electrode, and a second signal which is the same as the pulse signal of the touch control electrode is input into the shielding wire.
Optionally, the display panel further includes:
peripheral circuitry located in the non-display area, the shield line being located between the peripheral circuitry and the display area.
Optionally, the display panel further includes:
the peripheral circuit is positioned in the non-display area, and the power line is connected with the peripheral circuit and is positioned in different layers with the shielding line;
the power line is positioned at the edge of one side of the peripheral circuit close to the display area;
and the orthographic projection of the shielding line on the layer where the power line is located is overlapped with the power line.
Optionally, the power line is a high-level signal line or a low-level signal line.
Optionally, the display panel further includes:
a peripheral circuit located in the non-display region and a first signal line and a second signal line connected to the peripheral circuit;
the first signal line and the second signal line are located on different layers;
the orthographic projection of the first signal line on the layer where the second signal line is located is overlapped with the second signal line.
Optionally, the first signal line and the touch signal line are disposed in the same layer.
Optionally, the first signal line includes a shift register initial signal line, a first common electrode signal line, a second common electrode signal line, and a common electrode test switch signal line that are disposed in the same layer;
the second signal line comprises a forward scanning control signal line, a reverse scanning control signal line, a high-level signal line and a low-level signal line which are arranged on the same layer;
and the orthographic projection of each signal line in the first signal lines on the layer where the second signal lines are located is respectively overlapped with each signal line in the second signal lines.
Optionally, the common electrode includes a plurality of common electrode blocks distributed in a matrix.
On the other hand, an embodiment of the present invention further provides a display device, including the display panel.
According to the display panel and the display device provided by the embodiment of the invention, the shielding wire arranged on the same layer as the touch signal wire is arranged in the non-display area, and the shielding wire can reduce the effect of an electric field generated by one side of the shielding wire on the other side of the shielding wire, so that the effect of an electric field generated by a peripheral circuit in the non-display area on the display area can be reduced, the influence of the peripheral circuit on liquid crystal in the display area is reduced, and the display abnormity caused by the electric field of the peripheral circuit is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a display panel according to the prior art;
FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is a partially enlarged view of the display panel shown in FIG. 2 in a display area;
FIG. 4 is a partially enlarged view of the display panel shown in FIG. 2 in a non-display area;
FIG. 5 is a schematic cross-sectional view along direction AA' in FIG. 3;
FIG. 6 is a schematic cross-sectional view along direction BB' in FIG. 4;
FIG. 7 is a schematic cross-sectional view taken along direction CC' of FIG. 3;
FIG. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is an enlarged partial view of the area B in FIG. 2;
FIG. 10 is a schematic cross-sectional view in the direction DD' in FIG. 9;
FIG. 11 is another enlarged partial view of the area B in FIG. 2;
FIG. 12 is a schematic view of the structure of the section along direction EE' in FIG. 11;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
As shown in fig. 2 to 6, fig. 2 is a schematic structural diagram of a display panel in an embodiment of the present invention, fig. 3 is a schematic partial enlarged view of the display panel in fig. 2 in a display area, fig. 4 is a schematic partial enlarged view of the display panel in fig. 2 in a non-display area, fig. 5 is a schematic sectional structural diagram of the display panel in fig. 3 in the direction of AA ', and fig. 6 is a schematic sectional structural diagram of the display panel in the direction of BB' in fig. 4, where an embodiment of the present invention provides a display panel, including: a display area 1 and a non-display area 2, the non-display area 2 surrounding the display area 1; at least one common electrode 4 and a plurality of touch signal lines 5 are arranged in the display area 1, and each common electrode 4 is electrically connected with at least one touch signal line 5; the non-display area 2 is provided with a shielding line 6, and as shown in fig. 5 and 6, the shielding line 6 and the touch signal line 5 are disposed on the same layer.
Specifically, the shielding line 6 may shield an electric field generated by a peripheral circuit in the non-display area 2, so as to reduce an influence of the peripheral circuit (not shown in fig. 2) on the liquid crystal in the display area 1, and the shielding line 6 and the touch signal line 5 are disposed in the same layer, so that the shielding line 6 and the touch signal line 5 may be formed through the same patterning process, thereby reducing a manufacturing process of the shielding line 6.
According to the display panel in the embodiment of the invention, the shielding lines arranged on the same layer as the touch signal lines are arranged in the non-display area, and the shielding lines can reduce the effect of an electric field generated by one side of the shielding lines on the other side of the shielding lines, so that the effect of an electric field generated by peripheral circuits in the non-display area on the display area can be reduced, the influence of the peripheral circuits on liquid crystals in the display area is reduced, and abnormal display caused by the electric field of the peripheral circuits is improved.
Alternatively, as shown in fig. 5 and 7, fig. 7 is a schematic cross-sectional view taken along direction CC' in fig. 3, and the display panel includes an array substrate 10; the array substrate 10 includes: a substrate base plate 7, a common electrode layer 40, a touch signal line layer 50 and an insulating layer 8; a touch signal line layer 50, an insulating layer 8 and a common electrode layer 40 are sequentially arranged on one side of the substrate base plate 7 along the direction far away from the substrate base plate 7; the common electrode layer 40 includes a common electrode 4 therein.
Specifically, as shown in fig. 2 to 7, the plurality of common electrodes 4 are distributed in a matrix, the display panel further includes a plurality of pixel electrodes 9 distributed in a matrix, the pixel electrodes 9 and the common electrodes 4 are located in different layers and are insulated from each other, the plurality of pixel electrodes 9 correspond to one common electrode 4, each pixel electrode 9 corresponds to one thin film transistor 11, each row of pixel electrodes 9 corresponds to one gate line 12, each column of pixel electrodes 9 corresponds to one data line 13, sources of the thin film transistors 11 are electrically connected to the corresponding data lines 13, drains 14 of the thin film transistors 11 are electrically connected to the corresponding pixel electrodes 9, and gates of the thin film transistors 11 are electrically connected to the corresponding gate lines 12. The display panel in the embodiment of the present invention is described below by taking the film layer structures shown in fig. 5, fig. 6, and fig. 7 as examples, and a gate metal layer (not shown in fig. 5 to 7), a source-drain metal layer, a touch signal line layer 50, a common electrode layer 40, and a pixel electrode layer are sequentially disposed on a side away from the bottom-sinking substrate 7, where the gate metal layer includes a gate and a gate line, the source-drain metal layer includes a data line 13, a source, and a drain 14, the touch signal line layer 50 includes a touch signal line 5 and a shielding line 6, the common electrode layer 40 includes a common electrode 4, and the pixel electrode layer includes a pixel electrode 9. It should be noted that the film layer structure is only an example, and the relationship between the film layers is not specifically limited in the embodiment of the present invention, for example, the pixel electrode layer may be disposed on a side of the common electrode layer 40 away from the substrate 7, and the pixel electrode layer may also be disposed on a side of the common electrode layer close to the substrate; the position of the touch signal line layer 50 can also be set as required. In the display stage, a common voltage signal is input to the common electrode 4, so that the common electrode 4 has a constant common voltage, and an electric field is formed between the common electrode 4 and the pixel electrode 9 to drive the liquid crystal to deflect to a corresponding angle, thereby realizing the display function; in the touch control stage, a pulse signal is input to the common electrode 4, and simultaneously, an induction signal output by the common electrode 4 is received, so that the common electrode 4 is reused as a touch control electrode, and when touch control operation is performed, the induction signal at the touch control position is changed, so that the touch control position can be judged, and the touch control function is realized.
Alternatively, in the display phase, the same first signal as the common voltage signal of the common electrode 4 is input to the shield line 6; in the touch stage, the common electrode 4 is reused as a touch electrode, and a second signal identical to the pulse signal of the touch electrode is input to the shielding line 6.
Specifically, in order to shield the shield line 6 and avoid the influence of the shield line 6 itself on the liquid crystal in the display region 1, the same signal as that of the common electrode 4 is input to the shield line 6 in both the display stage and the touch stage, so that the shield line 6 has a shielding effect on the electric field generated by the peripheral circuit, and in addition, the electric field generated by the shield line 6 itself is the same as that generated by the common electrode 4 and does not influence the liquid crystal in the display region 1.
Optionally, as shown in fig. 8, fig. 8 is a schematic structural diagram of another display panel in an embodiment of the present invention, where the display panel further includes: the peripheral circuit 3 is located in the non-display region 2, and the shield line 6 is located between the peripheral circuit 3 and the display region 1.
Specifically, the shielding line 6 is disposed between the peripheral circuit 3 and the display region 1, so that the influence of the peripheral circuit 3 on the liquid crystal in the display region 1 can be shielded to the greatest extent, and the peripheral circuit 3 can be disposed at a position closer to the display region 1, thereby facilitating the design of a narrow frame.
Alternatively, as shown in fig. 9 and fig. 10, fig. 9 is a schematic partial enlarged view of a region B in fig. 2, fig. 10 is a schematic cross-sectional structure view along direction DD' in fig. 9, and the display panel further includes: a peripheral circuit located in the non-display area 2 and a power supply line 30 connected to the peripheral circuit, the power supply line 30 and the shield line 6 being located at different layers; the power supply line 30 is located at the edge of the peripheral circuit near the display region 1; the orthographic projection of the shield line 6 on the layer where the power supply line 30 is located overlaps the power supply line 30.
Specifically, the power line 30 is connected to the peripheral circuit and located at an edge of the peripheral circuit close to the display region 1, so that the power line 30 belongs to a portion of the peripheral circuit closest to the display region 1, and therefore, the shielding line 6 and the power line 30 are overlapped, so that the influence of an electric field of the peripheral circuit including the power line 30 on the liquid crystal in the display region 1 can be shielded to the greatest extent, the occupied area of the shielding line 6 on the non-display region 2 is reduced as much as possible, and the design of a narrow frame is facilitated.
Alternatively, as shown in fig. 9, the power supply line 30 is a high-level signal line or a low-level signal line.
Specifically, the peripheral circuit generally includes a gate driving circuit, the gate driving circuit is formed by a plurality of thin film transistors, and the thin film transistors need to be controlled by a low-level or high-level signal, so that a high-level signal line or a low-level signal line is an indispensable signal line in the peripheral circuit and generally extends in the direction of the side of the display area 1, and the shielding line 6 generally extends in the direction of the side of the display area 1 in order to achieve better shielding effect, so that the high-level signal line or the low-level signal line is disposed at the edge of the peripheral circuit close to the side of the display area 1 and overlaps with the shielding line 6.
Alternatively, as shown in fig. 11 and 12, fig. 11 is another schematic partial enlarged view of a region B in fig. 2, fig. 12 is a schematic cross-sectional structure view along direction EE' in fig. 11, and the display panel further includes: a peripheral circuit located in the non-display region 2 and a first signal line 31 and a second signal line 32 connected to the peripheral circuit; the first signal line 31 and the second signal line 32 are located in different layers; the orthographic projection of the first signal line 31 on the layer where the second signal line 32 is located overlaps with the second signal line 32.
Specifically, various signal lines are provided in the peripheral circuit, and by overlapping the first signal line 31 and the second signal line 32, the occupied area of the peripheral circuit in the non-display region 2 can be further reduced, so that the distance between the peripheral circuit and the display region 1 can be made larger under the condition that the frame width is the same, thereby further reducing the influence of the peripheral circuit on the liquid crystal in the display region 1.
Optionally, as shown in fig. 5 and 12, the first signal line 31 is disposed on the same layer as the touch signal line 5.
Specifically, the layer where the touch signal line 5 is located is a metal layer, and in order to ensure that the delay of the touch signal is small, the resistance of the metal layer is small, so that the first signal line 31 and the touch signal line 5 are arranged on the same layer, and the first signal line 31 can be formed while the touch signal line 5 is formed, so that a process of separately manufacturing the first signal line 31 can be omitted, and the resistance of the first signal line 31 is ensured to be small, so as to reduce the delay of signal transmission on the first signal line 31.
Alternatively, as shown in fig. 11 and 12, the first signal line 31 includes a shift register initial signal line 311, a first common electrode signal line 312, a second common electrode signal line 313, and a common electrode test switch signal line 314 which are provided in the same layer; the second signal line 32 includes a forward scanning control signal line 321, a reverse scanning control signal line 322, a high-level signal line 323, and a low-level signal line 324 provided in the same layer; the orthographic projection of each of the first signal lines 31 on the layer where the second signal lines 32 are located overlaps with each of the second signal lines 32, respectively.
Specifically, the peripheral circuit includes a gate driving circuit, the gate driving circuit includes a plurality of cascaded shift registers, wherein, the first stage shift register is connected to an initial signal line 311 of the shift register, the initial signal line 311 of the shift register is used for providing an initial signal of the first stage shift register, and the plurality of cascaded shift registers start normal shift register operation under the driving of the initial signal; the first common electrode signal line 312 is connected to a part of the common electrodes 4 in the display area 1, the second common electrode signal line 313 is connected to another part of the common electrodes 4 in the display area 1, the first common electrode signal line 312 and the second common electrode signal line 313 are used for providing a common electrode voltage signal for the common electrodes 4 during a visibility test, the common electrode test switch signal line 314 is connected to a control terminal of a common electrode test switch (not shown in the figure), the common electrode test switch is connected in series between the first common electrode signal line 312 and the common electrodes 4, the common electrode test switch is also connected in series between the second common electrode signal line 313 and the common electrodes 4, and after the visibility test is completed, the common electrode test switch is controlled to be turned off through the common electrode test switch signal line 314, so that a plurality of common electrodes 4 are mutually independent; the forward scanning control signal line 321 is used for supplying a forward scanning control signal to scan the pixel electrodes 9 distributed in a matrix in the display area 1 in the forward direction, the reverse scanning control signal line 322 is used for supplying a reverse scanning control signal to scan the pixel electrodes 9 distributed in a matrix in the display area 1 in the reverse direction, and the high-level signal line 323 and the low-level signal line 324 are used for supplying a constant high-level signal and a constant low-level signal respectively to control the peripheral circuits. Since the frequencies of signals supplied to the shift register origin signal line 311, the first common electrode signal line 312, the second common electrode signal line 313, and the common electrode test switch signal line 314 are low, when these first signal line 31 and the second signal line 32 are arranged to overlap, even if the first signal line 31 and the second signal line 32 are coupled due to the overlapping arrangement, the influence of the first signal line 31 on the second signal line 32 is small.
Alternatively, as shown in fig. 2 and 8, the common electrode 4 includes a plurality of common electrode blocks distributed in a matrix.
As shown in fig. 13, fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention, and the embodiment of the present invention further provides a display device including the display panel 100.
The specific structure and principle of the display panel 100 are the same as those of the above embodiments, and are not described herein again. The display device may be any electronic device with a display function, such as a touch display screen, a mobile phone, a tablet computer, a notebook computer, an electronic paper book, or a television.
In the display device in the embodiment of the invention, the shielding line arranged on the same layer as the touch signal line is arranged in the non-display area, and the shielding line can reduce the effect of an electric field generated by one side of the shielding line on the other side of the shielding line, so that the effect of an electric field generated by a peripheral circuit in the non-display area on the display area can be reduced, the influence of the peripheral circuit on liquid crystal in the display area is reduced, and abnormal display caused by the electric field of the peripheral circuit is improved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A display panel, comprising: a display area and a non-display area surrounding the display area;
at least one common electrode and a plurality of touch signal lines are arranged in the display area, and each common electrode is electrically connected with at least one touch signal line;
a shielding line is arranged in the non-display area, and the shielding line and the touch signal line are arranged on the same layer;
the peripheral circuit is positioned in the non-display area, and the power line is connected with the peripheral circuit and is positioned in different layers with the shielding line;
the power line is positioned at the edge of one side of the peripheral circuit close to the display area;
and the orthographic projection of the shielding line on the layer where the power line is located is overlapped with the power line.
2. The display panel according to claim 1, wherein the display panel comprises an array substrate;
the array substrate comprises: the touch control circuit comprises a substrate, a common electrode layer, a touch signal line layer and an insulating layer;
the touch signal line layer, the insulating layer and the common electrode layer are sequentially arranged on one side of the substrate base plate along the direction far away from the substrate base plate;
the common electrode layer comprises the common electrode.
3. The display panel according to claim 2,
in a display stage, inputting a first signal which is the same as a common voltage signal of the common electrode to the shielding line;
in the touch control stage, the common electrode is reused as a touch control electrode, and a second signal which is the same as the pulse signal of the touch control electrode is input into the shielding wire.
4. The display panel according to any one of claims 1 to 3, wherein the shield line is located between the peripheral circuit and the display region.
5. The display panel according to any one of claims 1 to 3,
the power line is a high-level signal line or a low-level signal line.
6. The display panel according to any one of claims 1 to 3, characterized by further comprising:
a first signal line and a second signal line connected to the peripheral circuit;
the first signal line and the second signal line are located on different layers;
the orthographic projection of the first signal line on the layer where the second signal line is located is overlapped with the second signal line.
7. The display panel according to claim 6,
the first signal line and the touch signal line are arranged on the same layer.
8. The display panel according to claim 7,
the first signal line comprises a shift register initial signal line, a first common electrode signal line, a second common electrode signal line and a common electrode test switch signal line which are arranged in the same layer;
the second signal line comprises a forward scanning control signal line, a reverse scanning control signal line, a high-level signal line and a low-level signal line which are arranged on the same layer;
and the orthographic projection of each signal line in the first signal lines on the layer where the second signal lines are located is respectively overlapped with each signal line in the second signal lines.
9. The display panel according to any one of claims 1 to 3, wherein the common electrode comprises a plurality of common electrode blocks distributed in a matrix.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
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CN108415198B (en) | 2018-03-28 | 2021-08-20 | 京东方科技集团股份有限公司 | Array substrate, display device and preparation method thereof |
CN108762550B (en) | 2018-05-16 | 2021-01-15 | 京东方科技集团股份有限公司 | Touch display substrate, touch display method and touch display device |
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