CN106921462B - The method and apparatus being decoded are encoded to FM0 - Google Patents
The method and apparatus being decoded are encoded to FM0 Download PDFInfo
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
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Abstract
The present invention relates to the communications fields, disclose a kind of couple of FM0 and encode the method and apparatus being decoded, this method comprises: obtaining the position window width in FM0 coded data between two neighboring maximum；Will data buffer storage to be decoded corresponding with position window width into data buffer, will flag bit data buffer storage corresponding with position window width into mark buffer, and position window width, data to be decoded and flag bit data correspond；The data to be decoded cached are synchronized, to confirm, which two adjacent bit represents a symbol in data to be decoded；And data to be decoded and flag bit data are sequentially read to two dibits from data buffer and mark buffer respectively, and error correction and decoding is carried out to read data to be decoded according to read flag bit data.The present invention, which can be improved, encodes the reliability being decoded, decoding speed to FM0, and improves receiving sensitivity.
Description
Technical field
The present invention relates to the communications fields, and in particular, to a kind of couple of FM0 encodes the method and apparatus being decoded.
Background technique
The full name of FM0 coding is two-phase space code coding, its main feature is that being indicated not in a position window using level change
Same logic.If only the section start overturning of window, other positions are not overturn level in place, then it represents that logical one；If level both exists
The section start overturning of position window, and window intermediate flipped in place, then it represents that logical zero.According to FM0 coding rule it can be found that no matter
The symbol of transmission is " 0 " or " 1 ", and the section start of window in place requires to be flipped.
It is that each edge (including rising edge and decline are acquired by comparator to the conventional method that is decoded of FM0 coding
Edge), it is then decoded, as shown in Figure 1.This decoded implementation method is simple, but the disadvantage is that anti-interference is poor.Because working as
When radio frequency baseband signal is interfered by external signal, the baseband signal that decoder receives is other than useful signal, and there are also interference letters
Number.For example, microvariations near low level are interference signal in baseband signal shown in Fig. 2.If interference is believed in decoding
Number edge also acquire, can make entire decoded beat that mistake, the complete mistake of decoding after causing occur.It leads in this way
It has caused in practical application, decoder cisco unity malfunction under more severe electromagnetic environment.
Summary of the invention
The object of the present invention is to provide a kind of couple of FM0 to encode the method and apparatus being decoded, and can be improved and compiles to FM0
The reliability and anti-interference that code is decoded, and improve receiving sensitivity.
To achieve the goals above, the present invention provides a kind of couple of FM0 and encodes the method being decoded, this method comprises: obtaining
Take the position window width in FM0 coded data between two neighboring maximum；It will number to be decoded corresponding with institute's rheme window width
According to being cached in data buffer, will flag bit data buffer storage corresponding with institute's rheme window width into mark buffer, and
Institute's rheme window width, the data to be decoded and the flag bit data correspond；The data to be decoded cached are carried out
Synchronous, to confirm, which two adjacent bit represents a symbol in the data to be decoded；And respectively from the data buffer storage
The data to be decoded and the flag bit data are sequentially read to two dibits in device and the mark buffer, if being read
Flag bit data indicate that read data to be decoded do not need to carry out error correction, then directly to read data solution to be decoded
Code, if read flag bit data indicate that read data to be decoded need to carry out error correction, to read to be decoded
It is decoded again after correcting data error.
The present invention also provides a kind of couple of FM0 to encode the device being decoded, which includes: that a window width obtains module,
For obtaining the position window width in FM0 coded data between two neighboring maximum；Cache module, being used for will be with institute's rheme window width
Corresponding data buffer storage to be decoded is spent into data buffer, it will flag bit data buffer storage corresponding with institute's rheme window width
Into mark buffer, and institute's rheme window width, the data to be decoded and the flag bit data correspond；Synchronous mould
Block, for synchronizing to the data to be decoded cached, to confirm, which two adjacent bit is represented in the data to be decoded
One symbol；And decoder module, for sequentially two dibit from the data buffer and the mark buffer respectively
Ground reads the data to be decoded and the flag bit data, if read flag bit data indicate read number to be decoded
According to progress error correction is not needed, then directly read data to be decoded are decoded, if the instruction of read flag bit data is read
The data to be decoded taken need to carry out error correction, then to being decoded again after read correcting data error to be decoded.
Through the above technical solutions, since the method and apparatus according to the present invention being decoded to FM0 coding obtain first
The position window width in FM0 coded data between two neighboring maximum is taken, then to corresponding with institute's rheme window width wait solve
Code data cached with it is synchronous, last to treat decoding data according to flag bit data and be decoded therefore according to the present invention
Technology can be avoided the interference of interference signal, and then can be improved and encode the reliability and anti-interference being decoded to FM0, mention
High receiving sensitivity.
Other features and advantages of the present invention will the following detailed description will be given in the detailed implementation section.
Detailed description of the invention
The drawings are intended to provide a further understanding of the invention, and constitutes part of specification, with following tool
Body embodiment is used to explain the present invention together, but is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the position window schematic diagram for the conventional method being decoded to FM0 coding；
Fig. 2 is that occur the schematic diagram of interference signal at the low level of baseband signal；
Fig. 3 is the flow chart of the method being decoded to FM0 coding according to an embodiment of the present invention；
Fig. 4 is position window schematic diagram according to an embodiment of the present invention；And
Fig. 5 is the block diagram of the device being decoded to FM0 coding according to an embodiment of the present invention.
Specific embodiment
Below in conjunction with attached drawing, detailed description of the preferred embodiments.It should be understood that this place is retouched
The specific embodiment stated is merely to illustrate and explain the present invention, and is not intended to restrict the invention.
The present invention provides a kind of couple of FM0 and encodes the method being decoded, as shown in figure 3, this method may include step S1
To S4.
Step S1, the position window width in FM0 coded data between two neighboring maximum is obtained.
According to the experience of the correlation theory of interference and practical application, the baseband signal during wireless receiving is by outside
When electromagnetic signal is interfered, it is easier to be interfered at low level, as shown in Fig. 2, occurring near the low level of baseband signal
One disturbing pulse.
In order to reduce interference signal to decoded influence, the present invention is proposed maximum two neighboring in FM0 coded data
Between time interval as position window width, as shown in Figure 4.Each window is since the maximum of baseband signal and next
Terminate at maximum.The adjustment of this position window can be avoided interference signal shown in Fig. 2 to decoded erroneous judgement and influence.Due to
Interference signal is introduced from the low level of baseband signal, therefore the maximum of interference signal tends to be substantially lower than normal baseband signal
Maximum, therefore this interference signal can be easily rejected when determining position window width, and by the next of normal baseband signal
End of a maximum as position window, and then can be improved the anti-interference and sensitivity of decoding technique according to the present invention.
In addition, it is assumed that the bit rate of FM0 coding is 1/T, then it is adjacent in FM0 coded data the characteristics of coding according to FM0
Time interval between two maximum also ascend the throne window width be only possible to occur 3 kinds of situations, it may be assumed that T, 1.5T and 2T.Position window width
In the case where for 1.5T, there are two types of may.One is the position window being made of long failing edge and short rising edge namely two neighboring poles
Rising edge between big value is located at the position of the center-right side of this window, and another kind is made of short failing edge and long rising edge
Position window namely two neighboring maximum between rising edge be located at the position of the center-left side of this window.Position window in Fig. 4
N+1 is exactly the example for the position window being made of short failing edge and long rising edge.According to the difference of waveform characteristic, failing edge and rising edge
Time span difference, both of these case is to be easy to distinguish under normal circumstances, but due to the appearance of external disturbance, sometimes this
Kind difference be it is unconspicuous, it is even opposite.Therefore according to the method for the present invention also in the next steps according to FM0 coding
Characteristic carries out error correction to this ambiguity to reduce the bit error rate, this will be described in detail in subsequent decoding step.
Furthermore it is possible to be compared along comparator to the baseband signal received with for example bilateral, and then obtain adjacent two
Position window width between a maximum.
Further, data and flag bit data to be decoded corresponding to each window width can be encoded according to FM0
Feature obtains, namely:
(1) institute's rheme window width is T, then data to be decoded corresponding to this window width are 01, corresponding flag bit
Data are 00.For flag bit data, " 0 " in flag bit data represents the corresponding data to be decoded of the flag bit data
Bit do not need by error correction, the ratio that " 1 " in flag bit data represents the corresponding data to be decoded of the flag bit data is special procured
It will be by error correction.In addition, the characteristics of according to FM0 coding, when window width in place is T, the content of corresponding data to be decoded is only possible to
For " 01 ", so this dibit " 01 " is not all needed by error correction.
(2) institute's rheme window width is 1.5T, if to be located at this window center-left for the rising edge between two neighboring maximum
At the position of side, then data to be decoded corresponding to this window width are 011, corresponding flag bit data are 010, if adjacent
Rising edge between two maximum is located at the position of the center-right side of this window, then to be decoded corresponding to this window width
Data are 001, corresponding flag bit data are 010.At this point, since the intermediate bit of flag bit data is 1, accordingly to
The intermediate bit of decoding data is needed by error correction.
(3) institute's rheme window width is 2T, then data to be decoded corresponding to this window width are 0011, corresponding mark
Position data are 0000.According to FM0 coding the characteristics of, window width in place be 2T when, the content of data to be decoded be only possible to for
" 0011 ", so this four bits " 0011 " are all not required to by error correction.
The basic thought of data to be decoded given above is exactly: representing the failing edge of half window, with " 0 " with " 1 " generation
The rising edge of half window of table, then " 00 " represents the failing edge of a position window, and " 11 " represent the rising edge of a position window.In this way,
The radio frequency baseband signal namely FM0 coded data that receive just are converted into 2 digital signals, as long as later to these numbers
Word signal is decoded the decoding that can be completed to FM0 coded data.
Step S2, will data buffer storage to be decoded corresponding with institute's rheme window width into data buffer, will with it is described
The corresponding flag bit data buffer storage of position window width into mark buffer, and institute's rheme window width, the data to be decoded and
The flag bit data correspond.
Step S3, the data to be decoded cached are synchronized, with confirm in the data to be decoded which two it is adjacent
Bit represents a symbol.
When being decoded to the FM0 coded data received, because without synchronization signal, in decoding and error correction step
Before rapid, need advanced row data synchronous, to confirm any two adjacent characters (namely buffered adjacent data to be decoded) generation
One symbol of table, just can be carried out correct decoding in this way.
According to the rule that FM0 is encoded, bit stream " 00 " perhaps " 11 " be certainly represent a symbol and " 01 " or " 10 " both
May be the overturning between two code elements, it is also possible to the intermediate overturning of symbol " 0 ", so " 01 " cannot function as with " 10 " it is synchronous
The foundation of judgement.Therefore, judgement can be synchronized according to " 00 " or " 11 ", after confirmation data synchronize successfully two-by-two
Bit is a symbol.
In addition, the generation in order to avoid leading to the complete misalignment of subsequent decoding because of timing error, can pass through detection one
The sequence of measured length is synchronized to reduce the probability for timing error occur to the full extent, and specific method is: decoding
In the case where adjacent character as multiple groups two, it is believed that synchronize success.
In addition, in the case where there is preamble in FM0 coding, can also foundation preamble to having cached wait solve
Code data synchronize.For example, just thinking several after the preamble data for decoding continuous 6 " 0 " and continuous 6 " 1 "
According to synchronizing successfully, correct decoding can be realized when being decoded to the FM0 coded data after preamble in this way.
It will be apparent to a skilled person that above-mentioned preamble is only example, in fact, different application preambles
Also it can have nothing in common with each other.
Step S4, sequentially read to two dibits from the data buffer and the mark buffer respectively it is described to
Decoding data and the flag bit data, if read flag bit data indicate that read data to be decoded do not need to carry out
Error correction then directly decodes read data to be decoded, if read flag bit data indicate read number to be decoded
According to needing to carry out error correction, then to being decoded again after read correcting data error to be decoded.
Preferably, during carrying out error correction, if read flag bit data indicate read data to be decoded
In the first bit need error correction, then according to two bits before the read data to be decoded of this in the data buffer
In latter bit carry out error correction；If read flag bit data indicate that the second ratio in read data to be decoded is special procured
Want error correction, then according to the previous bit in two bits after the read data to be decoded of this in the data buffer into
Row error correction.
Citing description step S4 below.
When read data to be decoded are " 01 " or " 10 ", read flag bit data are " 00 ", explanation is not required to
Error correction is carried out to read data to be decoded, therefore read data " 01 " to be decoded or " 10 " are directly decoded as code
First " 0 "；When read band decoding data is " 00 " or " 11 ", read flag bit data are " 00 ", explanation is not required to
Error correction is carried out to read data to be decoded, therefore directly be decoded as read data " 00 " to be decoded or " 11 "
Symbol " 1 ".
When read flag bit data are " 10 ", illustrate that the first bit needs of read data to be decoded entangle
Mistake, the value after the error correction of the bit is by two bits before the read data to be decoded of this in the data buffer
Latter bit determines.When due to FM0 coding, overturn between the bit between two code elements, therefore when the data are slow
It, will be read to be decoded when the latter bit in two bits before the read data to be decoded of this in storage is " 0 "
First bit error correction of data is " 1 ", two bits before the read data to be decoded of this in the data buffer
In latter bit be " 1 " when, by the first bit error correction of read data to be decoded be " 0 ", thereby realize before to
Error correction.
When read flag bit data are " 01 ", illustrate that the second bit needs of read data to be decoded entangle
Mistake, the value after the error correction of the bit is by two bits after the read data to be decoded of this in the data buffer
Previous bit determines.When due to FM0 coding, overturn between the bit between two code elements, therefore when the data are slow
It, will be read to be decoded when the previous bit in two bits after the read data to be decoded of this in storage is " 0 "
Second bit error correction of data is " 1 ", two bits after the read data to be decoded in the data buffer
In previous bit when being " 1 ", be " 0 " by the second bit error correction of read data to be decoded, thereby realize backward
Error correction.
So far, it is achieved that the decoding to FM0 coding.
Preferably, before step S1, coding/decoding method according to the present invention can also include: to receive decoding beginning flag
Position.That is, only just starting to execute step S1-S4 when receiving decoding beginning flag position.
Preferably, after step s4, coding/decoding method according to the present invention can also include: to receive decoding end mark
Position.That is, then stopping decoding after receiving decoding end mark and being, otherwise continue waiting for carrying out subsequent decoding.
The present invention also provides a kind of couple of FM0 to encode the device being decoded, as shown in figure 5, the device includes position window width
Obtain module 21, cache module 22, synchronization module 23 and decoder module 24.These modules are described in detail below.
Position window width obtains module 21 and is used to obtain the position window width in FM0 coded data between two neighboring maximum.
Exemplary bit window according to the present invention is as shown in Figure 4.Each window is since the maximum of baseband signal and next very big
Terminate at value.The adjustment of this position window can be avoided interference signal shown in Fig. 2 to decoded erroneous judgement and influence, and then can
Improve the anti-interference and sensitivity of decoding technique according to the present invention.
In addition, it is assumed that the bit rate of FM0 coding is 1/T, then it is adjacent in FM0 coded data the characteristics of coding according to FM0
Time interval between two maximum also ascend the throne window width be only possible to occur 3 kinds of situations, it may be assumed that T, 1.5T and 2T.Position window width
In the case where for 1.5T, there are two types of may.One is the position window being made of long failing edge and short rising edge namely two neighboring poles
Rising edge between big value is located at the position of the center-right side of this window, and another kind is made of short failing edge and long rising edge
Position window namely two neighboring maximum between rising edge be located at the position of the center-left side of this window.Position window in Fig. 4
N+1 is exactly the example for the position window being made of short failing edge and long rising edge.According to the difference of waveform characteristic, failing edge and rising edge
Time span difference, both of these case is to be easy to distinguish under normal circumstances, but due to the appearance of external disturbance, sometimes this
Kind difference be it is unconspicuous, it is even opposite.Therefore the apparatus according to the invention also encodes in decoder module 24 according to FM0
Characteristic to this ambiguity carry out error correction to reduce the bit error rate, this will be described in detail subsequent.
In addition, position window width, which obtains module 21, can compare the baseband signal received along comparator with for example bilateral
Compared with, and then obtain the position window width between two neighboring maximum.
Further, data and flag bit data to be decoded corresponding to each window width can be encoded according to FM0
Feature obtains, namely:
(1) institute's rheme window width is T, then data to be decoded corresponding to this window width are 01, corresponding flag bit
Data are 00.For flag bit data, " 0 " in flag bit data represents the corresponding data to be decoded of the flag bit data
Bit do not need by error correction, the ratio that " 1 " in flag bit data represents the corresponding data to be decoded of the flag bit data is special procured
It will be by error correction.In addition, the characteristics of according to FM0 coding, when window width in place is T, the content of corresponding data to be decoded is only possible to
For " 01 ", so this dibit " 01 " is not all needed by error correction.
(2) institute's rheme window width is 1.5T, if to be located at this window center-left for the rising edge between two neighboring maximum
At the position of side, then data to be decoded corresponding to this window width are 011, corresponding flag bit data are 010, if adjacent
Rising edge between two maximum is located at the position of the center-right side of this window, then to be decoded corresponding to this window width
Data are 001, corresponding flag bit data are 010.At this point, since the intermediate bit of flag bit data is 1, accordingly to
The intermediate bit of decoding data is needed by error correction.
(3) institute's rheme window width is 2T, then data to be decoded corresponding to this window width are 0011, corresponding mark
Position data are 0000.According to FM0 coding the characteristics of, window width in place be 2T when, the content of data to be decoded be only possible to for
" 0011 ", so this four bits " 0011 " are all not required to by error correction.
The basic thought of data to be decoded given above is exactly: representing the failing edge of half window, with " 0 " with " 1 " generation
The rising edge of half window of table, then " 00 " represents the failing edge of a position window, and " 11 " represent the rising edge of a position window.In this way,
The radio frequency baseband signal namely FM0 coded data that receive just are converted into 2 digital signals, as long as later to these numbers
Word signal is decoded the decoding that can be completed to FM0 coded data.
Cache module 22 for will data buffer storage to be decoded corresponding with institute's rheme window width into data buffer, will
Flag bit data buffer storage corresponding with institute's rheme window width is and institute's rheme window width, described to be decoded into mark buffer
Data and the flag bit data correspond.
Synchronization module 23 for being synchronized to the data to be decoded cached, with confirm in the data to be decoded which two
A adjacent bit represents a symbol.When being decoded to the FM0 coded data received, because without synchronization signal, institute
With before the decoding of decoder module 24, synchronization module 23 needs advanced row data synchronous, with confirm any two adjacent characters (namely
Buffered adjacent data to be decoded) symbol is represented, such decoder module 24 just can be carried out correct decoding.
According to the rule that FM0 is encoded, bit stream " 00 " perhaps " 11 " be certainly represent a symbol and " 01 " or " 10 " both
May be the overturning between two code elements, it is also possible to the intermediate overturning of symbol " 0 ", so " 01 " cannot function as with " 10 " it is synchronous
The foundation of judgement.Therefore, synchronization module 23 can synchronize judgement according to " 00 " or " 11 ", synchronize success in confirmation data
Two dibits later are a symbol.
In addition, the generation in order to avoid leading to the complete misalignment of subsequent decoding because of timing error, synchronization module 23 can be with
It is synchronized by detecting the sequence of certain length to reduce the probability for timing error occur, specific method to the full extent
Be: in the case where the adjacent character as decoder module 24 decodes multiple groups two, synchronization module 23 is thought to synchronize success.
In addition, synchronization module 23 can also be according to preamble in the case where having preamble in FM0 coding
The data to be decoded of caching synchronize.For example, decoding the preceding same of continuous 6 " 0 " and continuous 6 " 1 " in decoder module 24
After walking code data, synchronization module 23 just thinks that data synchronize successfully, in this way after decoder module 24 is to preamble
FM0 coded data can realize correct decoding when being decoded.It will be apparent to a skilled person that same before above-mentioned
Walking code is only example, in fact, different application preambles can also have nothing in common with each other.
Decoder module 24 from the data buffer and the mark buffer for sequentially reading to two dibits respectively
The data to be decoded and the flag bit data are taken, if read flag bit data indicate read data to be decoded not
It needs to carry out error correction, then directly read data to be decoded is decoded, if the instruction of read flag bit data is read
Data to be decoded need to carry out error correction, then to being decoded again after read correcting data error to be decoded.
Preferably, during carrying out error correction, if read flag bit data indicate read data to be decoded
In the first bit need error correction, then before decoder module 24 is according to the read data to be decoded of this in the data buffer
Two bits in latter bit carry out error correction；If read flag bit data indicate in read data to be decoded
Second bit needs error correction, then decoder module 24 is according to two after the read data to be decoded of this in the data buffer
Previous bit in a bit carries out error correction.
The decoding and error correction of decoder module 24 illustrated below.
When the read data to be decoded of decoder module 24 are " 01 " or " 10 ", read flag bit data are " 00 "
When, illustrate not needing to carry out error correction to read data to be decoded, therefore decoder module 24 directly will be read to be decoded
Data " 01 " or " 10 " are decoded as symbol " 0 "；When the read band decoding data of decoder module 24 is " 00 " or " 11 ", is read
When the flag bit data taken are " 00 ", illustrate not needing to carry out error correction, therefore decoder module 24 to read data to be decoded
Read data " 00 " to be decoded or " 11 " are directly decoded as symbol " 1 ".
When the read flag bit data of decoder module 24 are " 10 ", illustrate the first ratio of read data to be decoded
It special procures and wants error correction, the value after the error correction of the bit is by two before the read data to be decoded of this in the data buffer
Latter bit in bit determines.When due to FM0 coding, overturn between the bit between two code elements, Gu Dangsuo
When the latter bit for stating in two bits before the read data to be decoded of this in data buffer is " 0 ", decoder module
24 by the first bit error correction of read data to be decoded be " 1 ", when this in the data buffer is read to be decoded
When the latter bit in two bits before data is " 1 ", decoder module 24 compares the first of read data to be decoded
Special error correction is " 0 ", thereby realizes forward error correction.
When the read flag bit data of decoder module 24 are " 01 ", illustrate the second ratio of read data to be decoded
It special procures and wants error correction, the value after the error correction of the bit is by two after the read data to be decoded of this in the data buffer
Previous bit in bit determines.When due to FM0 coding, overturn between the bit between two code elements, Gu Dangsuo
When the previous bit for stating in two bits after the read data to be decoded of this in data buffer is " 0 ", decoder module
24 by the second bit error correction of read data to be decoded be " 1 ", when this in the data buffer is read to be decoded
When the previous bit in two bits after data is " 1 ", decoder module 24 compares the second of read data to be decoded
Special error correction is " 0 ", to error correction after thereby realizing.
Preferably, as shown in figure 5, decoding apparatus according to the present invention can also include decoding beginning flag position receiving module
25, for receiving decoding beginning flag position.In this way, only receiving decoding starting mark in decoding beginning flag position receiving module 25
Position window width obtains module 21, cache module 22, synchronization module 23 and decoder module 24 and just starts to work when will position.
Preferably, as shown in figure 5, decoding apparatus according to the present invention can also include decoding end mark position receiving module
26, for receiving decoding end mark position.That is, decoding end mark position receiving module 26 receive decoding end mark be
Decoding apparatus according to the present invention stops decoding later, otherwise continues waiting for carrying out subsequent decoding.
It is described the prefered embodiments of the present invention in detail above in conjunction with attached drawing, still, the present invention is not limited to above-mentioned realities
The detail in mode is applied, within the scope of the technical concept of the present invention, a variety of letters can be carried out to technical solution of the present invention
Monotropic type, these simple variants all belong to the scope of protection of the present invention.
It is further to note that specific technical features described in the above specific embodiments, in not lance
In the case where shield, it can be combined in any appropriate way.In order to avoid unnecessary repetition, the present invention to it is various can
No further explanation will be given for the combination of energy.
In addition, various embodiments of the present invention can be combined randomly, as long as it is without prejudice to originally
The thought of invention, it should also be regarded as the disclosure of the present invention.
Claims (6)
1. a kind of couple of FM0 encodes the method being decoded, this method comprises:
Obtain the position window width in FM0 coded data between two neighboring maximum；
Will data buffer storage to be decoded corresponding with institute's rheme window width into data buffer, will be opposite with institute's rheme window width
The flag bit data buffer storage answered is into mark buffer, and institute's rheme window width, the data to be decoded and the mark digit
According to one-to-one correspondence；
The data to be decoded cached are synchronized, to confirm, which two adjacent bit represents one in the data to be decoded
Symbol；And
Sequentially read to two dibits from the data buffer and the mark buffer respectively the data to be decoded and
The flag bit data, if read flag bit data indicate that read data to be decoded do not need to carry out error correction, directly
It connects and read data to be decoded is decoded, if read flag bit data indicate that read data to be decoded need to carry out
Error correction, then to being decoded again after read correcting data error to be decoded；
Wherein, the bit rate of the FM0 coding is 1/T, then institute's rheme window width includes T, 1.5T and 2T；
Institute's rheme window width is T, then data to be decoded corresponding to this window width are 01, corresponding flag bit data are
00；
Institute's rheme window width is 1.5T, if the rising edge between two neighboring maximum is located at the position of the center-left side of this window
Place, then data to be decoded corresponding to this window width are 011, corresponding flag bit data are 010, if it is two neighboring greatly
Rising edge between value is located at the position of the center-right side of this window, then data to be decoded corresponding to this window width are
001, corresponding flag bit data are 010；
Institute's rheme window width is 2T, then data to be decoded corresponding to this window width are 0011, corresponding flag bit data
It is 0000.
2. according to the method described in claim 1, wherein, being synchronized according to preamble to the data to be decoded cached.
3. method according to claim 1 or 2, in which:
If read flag bit data indicate that the first bit in read data to be decoded needs error correction, according to described in
Latter bit in two bits before the read data to be decoded of this in data buffer carries out error correction；
If read flag bit data indicate that the second bit in read data to be decoded needs error correction, according to described in
Previous bit in two bits after the read data to be decoded of this in data buffer carries out error correction.
4. a kind of couple of FM0 encodes the device being decoded, which includes:
Position window width obtains module, for obtaining the position window width in FM0 coded data between two neighboring maximum；
Cache module, for will data buffer storage to be decoded corresponding with institute's rheme window width into data buffer, will be with institute
The corresponding flag bit data buffer storage of rheme window width is into mark buffer, and institute's rheme window width, the data to be decoded
It is corresponded with the flag bit data；
Synchronization module, for being synchronized to the data to be decoded cached, any two phases in the data to be decoded confirmed
Adjacent bit represents a symbol；And
Decoder module, it is described for sequentially being read to two dibits from the data buffer and the mark buffer respectively
Data to be decoded and the flag bit data, if read flag bit data indicate read data to be decoded do not need into
Row error correction then directly decodes read data to be decoded, if the instruction of read flag bit data is read to be decoded
Data need to carry out error correction, then to being decoded again after read correcting data error to be decoded；
Wherein, the bit rate of the FM0 coding is 1/T, then institute's rheme window width includes T, 1.5T and 2T；
Institute's rheme window width is T, then data to be decoded corresponding to this window width are 01, corresponding flag bit data are
00；
Institute's rheme window width is 1.5T, if the rising edge between two neighboring maximum is located at the position of the center-left side of this window
Place, then data to be decoded corresponding to this window width are 011, corresponding flag bit data are 010, if it is two neighboring greatly
Rising edge between value is located at the position of the center-right side of this window, then data to be decoded corresponding to this window width are
001, corresponding flag bit data are 010；
Institute's rheme window width is 2T, then data to be decoded corresponding to this window width are 0011, corresponding flag bit data
It is 0000.
5. device according to claim 4, wherein the synchronization module is according to preamble to the number to be decoded cached
According to synchronizing.
6. device according to claim 4 or 5, in which:
If read flag bit data indicate that the first bit in read data to be decoded needs error correction, the decoding
Module is entangled according to the latter bit in two bits before the read data to be decoded of this in the data buffer
It is wrong；
If read flag bit data indicate that the second bit in read data to be decoded needs error correction, the decoding
Module is entangled according to the previous bit in two bits after the read data to be decoded of this in the data buffer
It is wrong.
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| CN109922017B (en) * | 2017-12-13 | 2021-12-21 | 航天信息股份有限公司 | Decoding method and device for FM0 coded data and reader-writer |
| CN111245558B (en) * | 2018-11-29 | 2022-02-18 | 北京聚利科技有限公司 | Decoding method, device and equipment for FM0 code and readable storage medium |
| CN112787755B (en) * | 2020-12-30 | 2022-12-02 | 北京千方科技股份有限公司 | Decoding method and device based on backward error correction mechanism and electronic equipment |
| CN113434544B (en) * | 2021-06-02 | 2022-11-18 | 中科驭数（北京）科技有限公司 | Database data reading method, database data writing method and device |
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