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CN106896607A - 一种阵列基板及显示装置 - Google Patents

一种阵列基板及显示装置 Download PDF

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CN106896607A
CN106896607A CN201710285719.8A CN201710285719A CN106896607A CN 106896607 A CN106896607 A CN 106896607A CN 201710285719 A CN201710285719 A CN 201710285719A CN 106896607 A CN106896607 A CN 106896607A
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赵凯祥
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US15/539,807 priority patent/US20180358388A1/en
Priority to PCT/CN2017/084536 priority patent/WO2018196048A1/zh
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Abstract

本发明公开一种阵列基板，所述阵列基板包括设置于底层的玻璃基板，在玻璃基板上设置有栅线，阵列基本上还设置有多对源极/漏极，所述源极/漏极与所述栅线之间设置有至少一个绝缘层，其中，沿栅线的输出近端至输出远端的方向，源极/漏极与栅线的正对面积逐渐减小。还提供一种包括上述阵列基板的显示装置。本发明中的阵列基板以及显示装置显示均一性较好。

Description

一种阵列基板及显示装置
技术领域
本发明涉及显示技术领域，具体涉及一种阵列基板及显示装置。
背景技术
膜晶体管液晶显示器(Thin Film Transistor-Liquid Crystal Display，TFT-LCD)是一种常见的显示方式。在TFT-LCD进行图像显示时，每一帧图像的切换是通过栅线扫描的方式实现。栅线为金属线，有金属线存在一定的电阻，随着传输距离的增大，扫描线上的电压会降低，这种现象称之为压降(Feedthrough)。现有液晶显示面板中的栅线压降(Feedthrough)的表达式为：
其中，△Vp表示压降值，Cgs表示栅线与开关元件的源极/漏极之间的电容，Clc表示液晶电容，Cs表示存储电容，Vghl表示理想输入电压与实际输入电压的差值。沿栅线输出近端至输出远端的方向(即距离扫描信号驱动电路由近及远方向)，栅线实际输入电压逐渐降低，理想输入电压不变，因此Vghl逐渐增大。即压降值沿栅线输出近端至输出远端的方向逐渐增大。在液晶面板上△Vp的变化，会造成靠近栅线输入端的画面较亮，远离栅线输入端的画面较暗，影响面板显示均一性。
发明内容
为了解决现有技术中，由于压降的变化导致的面板显示不均匀的问题，本发明提供一种阵列基板及显示装置，相对于现有技术，本发明中的阵列基板及显示装置的显示均一性较好。
本发明提供一种阵列基板，所述阵列基板包括设置于底层的玻璃基板，在所述玻璃基板上设置有栅线，阵列基板上还设置有多对源极/漏极，所述源极/漏极与所述栅线之间设置至少一个绝缘层，其中，沿所述栅线的输出近端至输出远端的方向，所述源极/漏极与所述栅线的正对面积逐渐减小。
本发明中的所述源极/漏极与所述栅线的正对面积逐渐减小，从而使得△Vp在整个面板上较为均一，保证了面板的显示均一性。
作为对本发明的进一步改进，还包括有源层，所述有源层包括导电沟道，所述源极与所述漏极通过所述导电沟道进行连接，从垂直阵列基板的方向看，所述源极/漏极与所述栅线的正对面积为所述导电沟道与所述栅线之间的正对面积。
进一步的，所述玻璃基板上依次设置所述有源层、第一绝缘层、所述栅线、第二绝缘层和第二导电层，所述第二导电层包括所述源极/漏极。
进一步的，所述第一绝缘层和所述第二绝缘层上设置有过孔，所述源极/漏极通过不同的过孔与所述导电沟道连接。
进一步的，所述有源层还包括位于所述导电沟道两侧的源极区和漏极区，所述源极区与所述源极连接，所述漏极区与所述漏极连接。
进一步的，沿所述栅线的输出近端至输出远端的方向，所述栅线宽度逐渐减小。
进一步的，所述栅线的宽度阶梯性减小。
进一步的，所述栅线关于沿传输方向的中心线对称，所述栅线在所述中心线的两侧均为阶梯结构。
通过改变栅极线的宽度的方式，使得所述源极和漏极与所述栅线的正对面积逐渐减小，该方法简便实用。
进一步的，沿所述栅线的输出近端至输出远端的方向，所述导电沟道沿传输方向的宽度逐渐减小。
本发明的另一方面，还提供一种显示装置，其特征在于，包括以上所述的阵列基板。
本发明通过改变所述源极/漏极与所述栅线的正对面积，使得栅线上各处的压降相等，从而提升面板显示的均一性。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中：
图1是现有技术中的一种阵列基板布线示意图；
图2是本发明实施例中的阵列基板结构示意图。
图3是本发明一个实施例中的阵列基板布线示意图；
图4是本发明一个实施例中的的阵列基板布线示意图；
在附图中，相同的部件使用相同的附图标记。附图并未按照实际的比例。
具体实施方式
下面将结合附图对本发明作进一步说明。
压降公式中的Cgs表示的为栅线与开关元件的源极/漏极之间的电容。即将栅线与源极/漏极等效为一个电容，其电容Cgs＝介电常数*电极间面积/电极间距离。其中的介电常数为常数，电极之间的距离取决于栅线与源极/漏极之间的距离；本领域技术人员可知，电极间面积指的是在栅线与源极/漏极的正对面积。因此，沿栅线的输出端近端至远端的方向，栅线与源极/漏极的正对面积逐渐减小，可以使得压降△Vp沿栅线的输出端近端至远端的方向逐渐降低。这样，通过调整栅线与源极/漏极的正对面积可以使得栅线的输出近端至输出远端的△Vp趋于一致，使得面板各处输出的电压均匀，提升面板显示的均一性。
如图1所示为现有技术中的一种阵列基板布线示意图；本发明是从改变栅线与源极/漏极之间的电容的角度出发的，在现有技术中，一般源极和漏极采用导电沟道进行连接，导电沟道一般与栅线对应设置，因此，只要改变导电沟道与栅线之间的电容即可实现本发明的目的。在现有技术中，导电沟道一般位于有源层上，为了便于说明本发明所要解决的技术问题以及所采用的的技术手段，在图1中仅仅示意出栅线以及有源层，图1为沿垂直于阵列基板的方向观察得到的阵列基板布线示意图，栅线10位于底层，有源层11位于栅线10上侧。本领域技术人员可知，沿栅线的输出方向上，在栅线10上设置有多个导电沟道12，如图1所示有源层与栅线的正对位置即为导电沟道12。如图1所示，在现有技术中，由于栅线的宽度以及导电沟道12的尺寸是均匀不变的，沿所述栅线的输出近端至输出远端的方向，栅线10与导电沟道12的正对面积是不变的，即栅线10与源极/漏极的正对面积是不变的。
本发明主要是对于从改变栅线与源极/漏极层之间的电容的角度出发的，为了便于说明本发明所要解决的技术问题以及所采用的的技术手段，本发明中仅仅对必要的部分进行说明，阵列基板所需要的其他部分作为现有技术在本发明无需赘述。
在本发明的一个实施例中，一种阵列基板，图2为阵列基板的结构示意图，阵列基板包括设置于底层的玻璃基板21，在所述玻璃基板21上设置有栅线10，阵列基本上还设置有多对源极S/漏极D，所述源极S/漏极D与栅线10之间设置有至少一个绝缘层；沿所述栅线的输出近端至输出远端的方向，所述源极/漏极与所述栅线的正对面积逐渐减小。
如图2所示，本实施例中的阵列基板由玻璃基板21向上，依次包括有源层22、第一绝缘层23、所述栅线10、第二绝缘层24和第二导电层25，所述第二导电层25包括所述源极S/漏极D。其中，有源层22设置与玻璃基板上，有源层22包括多个导电沟道221；在有源层22上侧设置有第一绝缘层23，第一绝缘层23包括由SiOx构成的绝缘层231和由SiNx构成的绝缘层232；在第一绝缘层23上设置有栅线10，栅线10对应于导电沟道221进行设置；在所述栅线10上设置第二绝缘层24，第二绝缘层24包括由SiNx构成的绝缘层241和由SiOx构成的绝缘层242；贯穿第一绝缘层23和部分第二绝缘层24设置有第一过孔26和第二过孔27，所述源极S穿过第一过孔26连接有源层上的源极区，从而实现源极S与导电沟道221的连接；所述漏极D穿过第二过孔26连接有源层22上的漏极区，从而实现漏极D与导电沟道221的连接。
在本发明的一个实施例中，在玻璃基板21上对应导电沟道221设置有遮光层28，用于防止背光照射导电沟道221，影响开关器件性能。在所述遮光层28与所述有源层22之间设置有第三绝缘层29，第三绝缘层29包括由SiNx构成的绝缘层291和由SiOx构成的绝缘层292。
在本发明的一个实施例中，有源层22采用低温多晶硅材料制成，包括设置于导电沟道221两端的离子重掺杂区N+以及离子重掺杂区之间的导电沟道221，离子重掺杂区N+包括连接开关元件的漏极的漏极区和连接开关元件的源极的源极区。
在本发明的一个实施例中，在导电沟道221与离子重掺杂区之间设置有离子轻掺杂区。具体的，如图2所示，在沟道与离子重掺杂区N+之间设置有离子轻掺杂区N-，用于减小对器件开态电流的影响。
在一些实施例中，阵列基板的第二导电层上还设置有例如平坦层、公共电极层等，在此不再赘述。
如图3所示，为发明从对于导电沟道的改变出发的一个实施例，其中的栅线10的宽度不变，为W0，沿栅线的输出近端至输出远端的方向上，导电沟道沿传输方向的宽度逐渐减小，正如图中所示的L1>L2>L3。
本发明中的传输方向指的即为栅线上信号的传输方向，本发明中信号在栅线上由栅线的输出近端向栅线的输出远端传输。
在一个实施例中，沿栅线的输出近端至输出远端的方向，栅线10宽度逐渐减小，例如可栅线可以设置为梯形，梯形的较长的底边栅线的输出近端，梯形的较短的底边为栅线的输出远端。
如图4所示，为发明从对于栅线的改变出发的一个实施例，沿栅线的输出近端至输出远端的方向，栅线10的宽度阶梯性减小，将栅线的输出近端设置为最宽的阶梯，将栅线的输出近端设置为最窄的阶梯。
如图4所示，栅线10沿传输方向的中心线对称，所述栅线在中心线的两侧均为阶梯结构。如图4所示，沿栅线的输出近端至输出远端的方向，阶梯状结构的底边宽度分别为W1、W2和W3，其中W1>W2>W3。
图3和图4所示的两个实施例，沿着栅线的输出近端至输出远端的方向，导电沟道与所述栅线之间的正对面积逐渐减小，即所述源极/漏极与所述栅线的正对面积逐渐减小。从而使得面板上的压降均一，保证了面板显示均一性。
虽然已经参考优选实施例对本发明进行了描述，但在不脱离本发明的范围的情况下，可以对其进行各种改进并且可以用等效物替换其中的部件。尤其是，只要不存在结构冲突，各个实施例中所提到的各项技术特征均可以任意方式组合起来。本发明并不局限于文中公开的特定实施例，而是包括落入权利要求的范围内的所有技术方案。

Claims (10)

1.一种阵列基板，所述阵列基板包括设置于底层的玻璃基板，在所述玻璃基板上设置有栅线，阵列基板上还设置有多对源极/漏极，所述源极/漏极与所述栅线之间设置至少一个绝缘层，
其中，沿所述栅线的输出近端至输出远端的方向，所述源极/漏极与所述栅线的正对面积逐渐减小。
2.根据权利要求1所述的阵列基板，其特征在于，还包括有源层，所述有源层包括导电沟道，所述源极与所述漏极通过所述导电沟道进行连接，从垂直阵列基板的方向看，所述源极/漏极与所述栅线的正对面积为所述导电沟道与所述栅线之间的正对面积。
3.根据权利要求2所述的阵列基板，其特征在于，所述玻璃基板上依次设置所述有源层、第一绝缘层、所述栅线、第二绝缘层和第二导电层，所述第二导电层包括所述源极/漏极。
4.根据权利要求3所述的阵列基板，其特征在于，所述第一绝缘层和所述第二绝缘层设置有多个过孔，所述源极/漏极分别通过不同的过孔与所述导电沟道连接。
5.根据权利要求4所述的阵列基板，其特征在于，所述有源层还包括位于所述导电沟道两侧的源极区和漏极区，所述源极区与所述源极连接，所述漏极区与所述漏极连接。
6.根据权利要求1至5任一所述的阵列基板，其特征在于，沿所述栅线的输出近端至输出远端的方向，所述栅线宽度逐渐减小。
7.根据权利要求6所述的阵列基板，其特征在于，所述栅线的宽度阶梯性减小。
8.根据权利要求7所述的阵列基板，其特征在于，所述栅线关于传输方向的中心线对称，所述栅线在所述中心线的两侧均为阶梯结构。
9.根据权利要求1至8任一所述阵列基板，其特征在于，沿所述栅线的输出近端至输出远端的方向，所述导电沟道沿传输方向的宽度逐渐减小。
10.一种显示装置，其特征在于，包括权利要求1到9任一所述的阵列基板。
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