CN106487404A - A kind of circuit for eliminating output DC maladjustment and method - Google Patents
A kind of circuit for eliminating output DC maladjustment and method Download PDFInfo
- Publication number
- CN106487404A CN106487404A CN201610994870.4A CN201610994870A CN106487404A CN 106487404 A CN106487404 A CN 106487404A CN 201610994870 A CN201610994870 A CN 201610994870A CN 106487404 A CN106487404 A CN 106487404A
- Authority
- CN
- China
- Prior art keywords
- resistance
- circuit
- audion
- differential signal
- pmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 12
- 238000001514 detection method Methods 0.000 claims abstract description 40
- 238000012937 correction Methods 0.000 claims abstract description 29
- 230000010355 oscillation Effects 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 4
- 230000009286 beneficial effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 102220029346 rs34541442 Human genes 0.000 description 1
- 102220012898 rs397516346 Human genes 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
- H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
- H04B2001/305—Circuits for homodyne or synchrodyne receivers using DC offset compensation techniques
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
Abstract
The present invention relates to a kind of circuit for eliminating output DC maladjustment and method.Circuit includes preamplifying circuit, amplitude detection circuit, detecting circuit, adjustment current generating circuit and the direct current correction circuit being sequentially connected；Preamplifying circuit is connected with direct current correction circuit.The present invention passes through the reasonable resistance arranging related resistors, can eliminate the offset voltage of the differential signal of different imbalance degrees；Due to using first detect original signal amplitude, according to original signal amplitude to calculate adjusted value, adjust original signal using the adjusted value calculating, thus the present invention in original signal amplitude of variation also can real-time adjustment, application flexibly extensive.
Description
Technical field
The present invention relates to IC design and in particular to a kind of for eliminating the output circuit of DC maladjustment and method.
Background technology
In integrated circuit design, two signals of input difference for the amplifier circuit of Differential Input, are typically required
Common-mode point be biased in a current potential VCM, as shown in figure 1, amplifier circuit so can be made to be biased in normal operating conditions.
But front stage circuits can not produce the differential signal of identical common-mode point sometimes, and can there is output DC maladjustment,
The output waveform of such as difference trans-impedance amplifier, as shown in Fig. 2 the mode of the multiplex AC coupled of frequency applications solves above-mentioned asking
, that is, there are two differential signals of DC maladjustment in topic, after coupled capacitor, add the biasing circuit of rear class, forms common-mode point
It is biased in the differential signal of a current potential.
But in low frequency applications, preferable separated by direct communication effect to be reached, need very big coupled capacitor, this is in piece
Above integrated is impossible, according to the outer electric capacity of piece, does not then enable single-chip integration, increased cost simultaneously.
Content of the invention
The technical problem to be solved is that offer is a kind of to be applied under lower frequency eliminate output DC maladjustment
Circuit and method, by the reasonable resistance arranging resistance, can eliminate the offset voltage of the differential signal of different imbalance degrees.
The technical scheme that the present invention solves above-mentioned technical problem is as follows：
A kind of circuit for eliminating output DC maladjustment, including the preamplifying circuit being sequentially connected, amplitude detection electricity
Road, detecting circuit, adjustment current generating circuit and direct current correction circuit；Described preamplifying circuit and direct current correction circuit phase
Connect；
Described preamplifying circuit, for the differential signal of output band imbalance, and is transferred to amplitude detection circuit and directly
Stream revises circuit；
Described amplitude detection circuit, for detecting the maximum amplitude of oscillation of the differential signal with imbalance, it is poor that formation comprises
The single-ended signal of sub-signal range value, and it is transferred to detecting circuit；
Described detecting circuit, for the output of amplitude detection circuit is carried out detection, the differential signal width that it is comprised
Angle value is converted into DC voltage, and is transferred to adjustment current generating circuit；
Described adjustment current generating circuit, the DC voltage for exporting detecting circuit is changed into and differential signal amplitude
The current signal that value is directly proportional, and it is transferred to direct current correction circuit；
Difference with imbalance is believed by described direct current correction circuit according to the current signal being directly proportional to differential signal range value
Number it is modified to the output difference signal of no imbalance.
The invention has the beneficial effects as follows：The present invention, by reasonable arrange parameter value, can eliminate the difference of different imbalance degrees
The offset voltage of sub-signal；Because using the amplitude first detecting original signal, the amplitude according to original signal to calculate adjusted value, to utilize
The adjusted value calculating adjusting original signal, so the present invention in original signal amplitude of variation also can real-time adjustment, application is flexibly
Extensively.
On the basis of technique scheme, the present invention can also do following improvement.
Further, described amplitude detection circuit includes first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance
R4 and the first amplifier OP1；
First resistor R1 mono- terminates VBIAS, the other end respectively with one end of second resistance R2 and the first amplifier OP1
Normal phase input end connects；The other end of second resistance R2 is connected with input signal VIP；One end of 3rd resistor R3 is defeated with another
Enter signal VIN to connect, the other end is connected with the inverting input of the first amplifier OP1, connect with one end of the 4th resistance R4 simultaneously
Connect, the other end of the 4th resistance R4 is connected with the outfan of the first amplifier OP1.
Beneficial effect using above-mentioned further scheme is can to detect the maximum amplitude of oscillation of differential signal, and be formed
Comprise the single-ended signal of differential signal range value, by arranging R1, R2, R3 and R4 ratio, can be increased with ratio or reduce and be wrapped
The differential signal range value containing.
Further, described detecting circuit includes the second amplifier OP2, the first audion Q1, the first PMOS PM1 and
One electric capacity C1；
The normal phase input end of the second amplifier OP2 is connected with the outfan of the first amplifier OP1, inverting input respectively with
The source electrode of the first PMOS PM1, constant-current source one end, one end of the 5th resistance R5 of adjustment current generating circuit connect, outfan
It is connected with the base stage of the first audion Q1；The drain electrode of the first PMOS PM1 is connected to ground, and grid is respectively with the first audion Q1's
One end of emitter stage and the first electric capacity C1 connects；The other end of the first electric capacity C1 is connected to ground；The current collection of the first audion Q1
Pole is connected with power supply.
Beneficial effect using above-mentioned further scheme is, by amplitude detection circuit export with differential signal range value
Single-ended signal high level detection out, this high level will reflect differential signal range value.
Further, described adjustment current generating circuit includes the 5th resistance R5, the 3rd amplifier OP3 and the second PMOS
PM2；
The other end of the 5th resistance R5 respectively with the inverting input of the 3rd amplifier OP3 and the second PMOS PM2
Source electrode connects；The normal phase input end of the 3rd amplifier OP3 meets VBIAS, the grid of output termination the second PMOS PM2；2nd PMOS
The drain electrode of pipe PM2 respectively with the colelctor electrode of the second audion Q2 of dc point adjustment circuit, the grid of the 3rd PMOS PM3 and
One end of constant-current source connects.
Beneficial effect using above-mentioned further scheme is, by arranging R5 resistance, detecting circuit detection output is anti-
The level conversion reflecting differential signal range value is the current signal proportional to range value.
Further, described direct current correction circuit includes the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance
R9, the tenth resistance R10, the 11st resistance R11, the 12nd resistance R12, the 13rd resistance R13, the 3rd PMOS PM3, the 4th
PMOS PM4, the second audion Q2, the 3rd audion Q3, the 4th audion Q4, the 5th audion Q5, the 6th audion Q6,
Seven audion Q7, the 8th audion Q8 and the 9th audion Q9；
The emitter stage of the second audion Q2 is connected with one end of the 6th resistance R6, base stage respectively with the 3rd audion Q3 send out
Emitter-base bandgap grading, the base stage of one end of constant-current source, the base stage of the 7th audion Q7 and the 8th audion Q8 connect, and the 6th resistance R6's is another
One end is grounded；The grounded drain of the 3rd PMOS PM3, source electrode respectively with one end of constant-current source and the base stage of the 3rd audion Q3
Connect；The colelctor electrode of the 3rd audion Q3 connects power supply；The emitter stage of the 4th audion Q4 is connected with one end of the 6th resistance R7, collection
Electrode is connected with one end of constant-current source and the grid of the 4th PMOS PM4 respectively, base stage respectively with the 5th audion Q5 send out
Emitter-base bandgap grading, the base stage of one end of constant-current source, the base stage of the 6th audion Q6 and the 9th audion Q9 connect；7th resistance R7's is another
One end be grounded, the grounded drain of the 4th PMOS PM4, source electrode respectively with one end of constant-current source and the base stage of the 5th audion Q5
Connect；The colelctor electrode of the 5th audion Q5 connects power supply；The emitter stage of the 6th audion Q6 is connected with one end of the 8th resistance R8, collection
Electrode one end and input signal V with the 12nd resistance R12 respectivelyIPConnect；The emitter stage of the 7th audion Q7 and the 9th electricity
One end of resistance R9 connects, the colelctor electrode other end and the outfan V with the 12nd resistance R12 respectivelyONConnect；8th audion Q8
Emitter stage be connected with one end of the tenth resistance R10, colelctor electrode respectively with one end of the 13rd resistance R12 and another input
Signal VINConnect；The emitter stage of the 9th audion Q9 is connected with one end of the 11st resistance R11, and colelctor electrode is electric with the 13rd respectively
The other end of resistance R13 and outfan VOPConnect；8th resistance R8 other end ground connection, the 9th resistance R9 other end ground connection, the tenth
The resistance R10 other end is grounded, the 11st resistance R11 other end ground connection.
Beneficial effect using above-mentioned further scheme is that the resistance by setting R6, R7, R8, R9, R10, R11 is permissible
The current signal that change adjustment current generating circuit produces further, by arranging the resistance of R12 and R13, can change and be used for
Revise the magnitude of voltage of difference imbalance.
Present invention also offers a kind of method for eliminating output DC maladjustment, including step,
(1) differential signal with imbalance for the preamplifying circuit output, and it is transferred to amplitude detection circuit and direct current correction
Circuit；
(2) the maximum amplitude of oscillation of the differential signal with imbalance is detected by amplitude detection circuit, is formed and comprises differential signal
The single-ended signal of range value, and it is transferred to detecting circuit；
(3) output of amplitude detection circuit is carried out detection by detecting circuit, and the differential signal range value that it is comprised turns
Turn to DC voltage, and be transferred to adjustment current generating circuit；
(4) DC voltage of adjustment current generating circuit just detecting circuit output is changed into become with differential signal range value
The current signal of direct ratio, and it is transferred to direct current correction circuit；
(5) direct current correction circuit will carry the differential signal lacked of proper care according to the current signal that is directly proportional to differential signal range value
It is modified to the output difference signal of no imbalance.
Beneficial effect using above-mentioned further scheme is that the present invention passes through the reasonable resistance arranging R1～R13, can disappear
Offset voltage except the differential signal of different imbalance degrees；Due to using the amplitude first detecting original signal, according to the width of original signal
Degree, to calculate adjusted value, adjusts original signal using the adjusted value calculating, so the present invention is in original signal amplitude of variation
Can real-time adjustment, application flexibly extensive.
Brief description
Fig. 1 is the preferable input signal of difference amplifier of the present invention；
Fig. 2 is the difference output waveform of difference trans-impedance amplifier of the present invention；
Fig. 3 eliminates the circuit block diagram of output DC maladjustment for the present invention；
Fig. 4 eliminates the circuit theory diagrams of output DC maladjustment for the present invention；
Fig. 5 eliminates output DC maladjustment method flow diagram for the present invention；
Fig. 6 eliminates the oscillogram of output each step of DC maladjustment output for the present invention.
Specific embodiment
Below in conjunction with accompanying drawing, the principle of the present invention and feature are described, example is served only for explaining the present invention, and
Non- for limiting the scope of the present invention.
The present invention is intended to provide one kind is applied under lower frequency, eliminates the method exporting DC maladjustment, and provide circuit
Realize.
As shown in figure 3, a kind of for eliminate output DC maladjustment circuit, including the preamplifying circuit being sequentially connected,
Amplitude detection circuit, detecting circuit, adjustment current generating circuit and direct current correction circuit；Preamplifying circuit and direct current correction
Circuit is connected；
Preamplifying circuit, the differential signal lacked of proper care for output band, and it is transferred to amplitude detection circuit and direct current is repaiied
Positive circuit；
Amplitude detection circuit, for detecting the maximum amplitude of oscillation of the differential signal with imbalance, forms and comprises difference letter
The single-ended signal of number range value, and it is transferred to detecting circuit；
Detecting circuit, for the output of amplitude detection circuit is carried out detection, the differential signal range value that it is comprised
It is converted into DC voltage, and be transferred to adjustment current generating circuit；
Adjustment current generating circuit, the DC voltage for exporting detecting circuit is changed into become with differential signal range value
The current signal of direct ratio, and it is transferred to direct current correction circuit；
Differential signal with imbalance is repaiied by direct current correction circuit according to the current signal being directly proportional to differential signal range value
It is being just the output difference signal of no imbalance.
As shown in figure 4, in the present invention, amplitude detection circuit include first resistor R1, second resistance R2,3rd resistor R3,
4th resistance R4 and the first amplifier OP1；
First resistor R1 mono- terminates VBIAS, the other end respectively with one end of second resistance R2 and the first amplifier OP1
Normal phase input end connects；The other end of second resistance R2 and input signal VIPConnect；One end of 3rd resistor R3 is defeated with another
Enter signal VINConnect, the other end is connected with the inverting input of the first amplifier OP1, connect with one end of the 4th resistance R4 simultaneously
Connect, the other end of the 4th resistance R4 is connected with the outfan of the first amplifier OP1.
The maximum amplitude of oscillation of differential signal can be detected by amplitude detection circuit, and formed and comprise differential signal range value
Single-ended signal, by arranging R1, R2, R3 and R4 ratio, can be increased with ratio or reduce comprised differential signal range value.
In the present invention, detecting circuit includes the second amplifier OP2, the first audion Q1, the first PMOS PM1 and first
Electric capacity C1；
The normal phase input end of the second amplifier OP2 is connected with the outfan of the first amplifier OP1, inverting input respectively with
The source electrode of the first PMOS PM1, constant-current source one end, one end of the 5th resistance R5 of adjustment current generating circuit connect, outfan
It is connected with the base stage of the first audion Q1；The drain electrode of the first PMOS PM1 is connected to ground, and grid is respectively with the first audion Q1's
One end of emitter stage and the first electric capacity C1 connects；The other end of the first electric capacity C1 is connected to ground；The current collection of the first audion Q1
Pole is connected with power supply.
The high level detection of the single-ended signal with differential signal range value that amplitude detection circuit is exported by detecting circuit
Out, this high level will reflect the range value of differential signal.
In the present invention, adjustment current generating circuit includes the 5th resistance R5, the 3rd amplifier OP3 and the second PMOS
PM2；
The other end of the 5th resistance R5 respectively with the inverting input of the 3rd amplifier OP3 and the second PMOS PM2
Source electrode connects；The normal phase input end of the 3rd amplifier OP3 meets VBIAS, the grid of output termination the second PMOS PM2；2nd PMOS
The drain electrode of pipe PM2 respectively with the colelctor electrode of the second audion Q2 of dc point adjustment circuit, the grid of the 3rd PMOS PM3 and
One end of constant-current source connects.
By arranging R5 resistance in adjustment current generating circuit, by the reflection differential signal amplitude of detecting circuit detection output
The level conversion of value is the current signal proportional to range value.
In the present invention, direct current correction circuit include the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9,
Tenth resistance R10, the 11st resistance R11, the 12nd resistance R12, the 13rd resistance R13, the 3rd PMOS PM3, the 4th PMOS
Pipe PM4, the second audion Q2, the 3rd audion Q3, the 4th audion Q4, the 5th audion Q5, the 6th audion Q6, the seven or three
Pole pipe Q7, the 8th audion Q8 and the 9th audion Q9；
The emitter stage of the second audion Q2 is connected with one end of the 6th resistance R6, base stage respectively with the 3rd audion Q3 send out
Emitter-base bandgap grading, the base stage of one end of constant-current source, the base stage of the 7th audion Q7 and the 8th audion Q8 connect, and the 6th resistance R6's is another
One end is grounded；The grounded drain of the 3rd PMOS PM3, source electrode respectively with one end of constant-current source and the base stage of the 3rd audion Q3
Connect；The colelctor electrode of the 3rd audion Q3 connects power supply；The emitter stage of the 4th audion Q4 is connected with one end of the 6th resistance R7, collection
Electrode is connected with one end of constant-current source and the grid of the 4th PMOS PM4 respectively, base stage respectively with the 5th audion Q5 send out
Emitter-base bandgap grading, the base stage of one end of constant-current source, the base stage of the 6th audion Q6 and the 9th audion Q9 connect；7th resistance R7's is another
One end be grounded, the grounded drain of the 4th PMOS PM4, source electrode respectively with one end of constant-current source and the base stage of the 5th audion Q5
Connect；The colelctor electrode of the 5th audion Q5 connects power supply；The emitter stage of the 6th audion Q6 is connected with one end of the 8th resistance R8, collection
Electrode one end and input signal V with the 12nd resistance R12 respectivelyIPConnect；The emitter stage of the 7th audion Q7 and the 9th electricity
One end of resistance R9 connects, the colelctor electrode other end and the outfan V with the 12nd resistance R12 respectivelyONConnect；8th audion Q8
Emitter stage be connected with one end of the tenth resistance R10, colelctor electrode respectively with one end of the 13rd resistance R12 and another input
Signal VINConnect；The emitter stage of the 9th audion Q9 is connected with one end of the 11st resistance R11, and colelctor electrode is electric with the 13rd respectively
The other end of resistance R13 and outfan VOPConnect；8th resistance R8 other end ground connection, the 9th resistance R9 other end ground connection, the tenth
The resistance R10 other end is grounded, the 11st resistance R11 other end ground connection.
The resistance passing through to arrange R6, R7, R8, R9, R10, R11 in direct current correction circuit can change adjustment electric current further
Produce the current signal that circuit produces, by arranging the resistance of R12 and R13, the voltage for revising difference imbalance can be changed
Value.
The work process of this circuit theory diagrams is：
When the differential signal with imbalance is separately input to the V of amplitude detection circuitIPEnd and VINEnd, arranges R1=R2=R3
During=R4=R, it exports VO1=VBIAS+VIP-VIN,
VO1Export detecting circuit, when the positive terminal voltage of OP2 is more than negative terminal voltage, due to audion Q1 charging ability very
By force, can rapidly the negative terminal of OP2 be adjusted to equal with anode, when the positive terminal voltage of OP2 is less than negative terminal voltage, A point will keep
Value originally, VO2Also original value will be kept it is assumed that VIP-VINThe maximum amplitude of oscillation be 2V, i.e. VO2=VBIAS+2V；
VO2Export adjustment current generating circuit, because the anode of OP3 and negative terminal value are equal, then through the electric current of PM2
I1 is determined by R5 and its two ends pressure drop, arranges R5=2R, as：
I1=(VBIAS+2V-VBIAS)/2R=V/R,
I1Export the Q2 of direct current correction circuit 34, base voltage is converted to by PM3 and Q3 and is biased to Q7, Q8, lead to
The electric current I2 flowing through R12 is than the electric current I flowing through R133Big I1, i.e. I2-I3=I1=V/R, arranges R12=R13=R, then VINWill
Compare VIPThe how current potential of drop-down V, thus by VINAnd VIPIt is adjusted to the output difference signal V of no imbalanceONAnd VOP,
The maximum amplitude of oscillation of former imbalance differential signal by arranging the ratio of R1, R2, R3, R4 resistance, can be zoomed in or out,
Adjustment electric current I can be changed by the resistance arranging R51, by arrange R6, R7 and R8, the resistance ratio of R9, R10, R11, can
To change adjustment electric current I2, by arrange R12, R13 resistance value, thus it is possible to vary adjustment voltage size.By above resistance
Reasonable setting, the offset voltage of the differential signal of different imbalance degrees can be eliminated.
As shown in figure 5, present invention also offers a kind of for eliminate output DC maladjustment method, including step,
(1) differential signal with imbalance for the preamplifying circuit output, and it is transferred to amplitude detection circuit and direct current correction
Circuit；
(2) the maximum amplitude of oscillation of the differential signal with imbalance is detected by amplitude detection circuit, is formed and comprises differential signal
The single-ended signal of range value, and it is transferred to detecting circuit；
(3) output of amplitude detection circuit is carried out detection by detecting circuit, and the differential signal range value that it is comprised turns
Turn to DC voltage, and be transferred to adjustment current generating circuit；
(4) DC voltage that detecting circuit exports is changed into just to become with differential signal range value by adjustment current generating circuit
The current signal of ratio, and it is transferred to direct current correction circuit；
(5) direct current correction circuit will carry the differential signal lacked of proper care according to the current signal that is directly proportional to differential signal range value
It is modified to the output difference signal of no imbalance.
As shown in fig. 6, eliminate the oscillogram of output each step of DC maladjustment output for the present invention, preamplifying circuit
It is output as the differential signal with imbalance, such as Fig. 6 (a), the maximum amplitude of oscillation of the differential signal with imbalance is detected by amplitude detection circuit
Out, the single-ended signal comprising differential signal range value, such as Fig. 6 (b) are formed, amplitude detection circuit output is wrapped by detecting circuit
The differential signal range value containing is converted into DC voltage, such as Fig. 6 (c), and adjustment current generating circuit will reflect differential signal amplitude
The DC voltage of value is changed into the current signal being directly proportional to differential signal range value, such as Fig. 6 (d), direct current correction circuit foundation
Differential signal with imbalance is modified to the output difference signal of no imbalance by the current signal being directly proportional to differential signal range value,
As Fig. 6 (e).
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement made etc., should be included within the scope of the present invention.
Claims (6)
1. a kind of circuit for eliminating output DC maladjustment is it is characterised in that include preamplifying circuit, the width being sequentially connected
Degree testing circuit, detecting circuit, adjustment current generating circuit and direct current correction circuit；Described preamplifying circuit and direct current are repaiied
Positive circuit is connected；
Described preamplifying circuit, the differential signal lacked of proper care for output band, and it is transferred to amplitude detection circuit and direct current is repaiied
Positive circuit；
Described amplitude detection circuit, for detecting the maximum amplitude of oscillation of the differential signal with imbalance, forms and comprises difference letter
The single-ended signal of number range value, and it is transferred to detecting circuit；
Described detecting circuit, for detection is carried out to the output of amplitude detection circuit, the differential signal range value that it is comprised
It is converted into DC voltage, and be transferred to adjustment current generating circuit；
Described adjustment current generating circuit, the DC voltage for exporting detecting circuit is changed into become with differential signal range value
The current signal of direct ratio, and it is transferred to direct current correction circuit；
Differential signal with imbalance is repaiied by described direct current correction circuit according to the current signal being directly proportional to differential signal range value
It is being just the output difference signal of no imbalance.
2. the circuit for eliminating output DC maladjustment according to claim 1 is it is characterised in that described amplitude detection is electric
Road includes first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance R4 and the first amplifier OP1；
First resistor R1 mono- terminates VBIAS, the other end is defeated with one end of second resistance R2 and the positive of the first amplifier OP1 respectively
Enter end to connect；The other end of second resistance R2 and input signal VIPConnect；One end of 3rd resistor R3 and another input signal
VINConnect, the other end is connected with the inverting input of the first amplifier OP1, is connected with one end of the 4th resistance R4, the 4th simultaneously
The other end of resistance R4 is connected with the outfan of the first amplifier OP1.
3. according to claim 2 for eliminate output DC maladjustment circuit it is characterised in that
Described detecting circuit includes the second amplifier OP2, the first audion Q1, the first PMOS PM1 and the first electric capacity C1；
The normal phase input end of the second amplifier OP2 is connected with the outfan of the first amplifier OP1, and inverting input is respectively with first
The source electrode of PMOS PM1, constant-current source one end, one end of the 5th resistance R5 of adjustment current generating circuit connect, outfan and the
The base stage of one audion Q1 connects；The drain electrode of the first PMOS PM1 is connected to ground, the grid transmitting with the first audion Q1 respectively
One end of pole and the first electric capacity C1 connects；The other end of the first electric capacity C1 is connected to ground；The colelctor electrode of the first audion Q1 with
Power supply connects.
4. the circuit for eliminating output DC maladjustment according to claim 3 is it is characterised in that described adjustment electric current produces
Raw circuit includes the 5th resistance R5, the 3rd amplifier OP3 and the second PMOS PM2；
The other end of the 5th resistance R5 respectively with the inverting input of the 3rd amplifier OP3 and the source electrode of the second PMOS PM2
Connect；The normal phase input end of the 3rd amplifier OP3 meets VBIAS, the grid of output termination the second PMOS PM2；Second PMOS
The drain electrode of PM2 respectively with the colelctor electrode of the second audion Q2 of dc point adjustment circuit, the grid of the 3rd PMOS PM3 and perseverance
The one end in stream source connects.
5. the circuit for eliminating output DC maladjustment according to claim 4 is it is characterised in that described direct current correction is electric
Road include the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, the 11st resistance R11,
12nd resistance R12, the 13rd resistance R13, the 3rd PMOS PM3, the 4th PMOS PM4, the second audion Q2, the three or three pole
Pipe Q3, the 4th audion Q4, the 5th audion Q5, the 6th audion Q6, the 7th audion Q7, the 8th audion Q8 and the 9th
Audion Q9；
The emitter stage of the second audion Q2 is connected with one end of the 6th resistance R6, the base stage transmitting with the 3rd audion Q3 respectively
Pole, the base stage of one end of constant-current source, the base stage of the 7th audion Q7 and the 8th audion Q8 connect, and the 6th resistance R6's is another
End ground connection；The grounded drain of the 3rd PMOS PM3, source electrode is connected with one end of constant-current source and the base stage of the 3rd audion Q3 respectively
Connect；The colelctor electrode of the 3rd audion Q3 connects power supply；The emitter stage of the 4th audion Q4 is connected with one end of the 6th resistance R7, current collection
Pole is connected with one end of constant-current source and the grid of the 4th PMOS PM4 respectively, the base stage transmitting with the 5th audion Q5 respectively
Pole, the base stage of one end of constant-current source, the base stage of the 6th audion Q6 and the 9th audion Q9 connect；7th resistance R7's is another
End ground connection, the grounded drain of the 4th PMOS PM4, source electrode is connected with one end of constant-current source and the base stage of the 5th audion Q5 respectively
Connect；The colelctor electrode of the 5th audion Q5 connects power supply；The emitter stage of the 6th audion Q6 is connected with one end of the 8th resistance R8, current collection
Pole one end and input signal V with the 12nd resistance R12 respectivelyIPConnect；The emitter stage of the 7th audion Q7 and the 9th resistance
One end of R9 connects, the colelctor electrode other end and the outfan V with the 12nd resistance R12 respectivelyONConnect；8th audion Q8's
Emitter stage is connected with one end of the tenth resistance R10, colelctor electrode one end and another input letter with the 13rd resistance R12 respectively
Number VINConnect；The emitter stage of the 9th audion Q9 is connected with one end of the 11st resistance R11, colelctor electrode respectively with the 13rd resistance
The other end of R13 and outfan VOPConnect；8th resistance R8 other end ground connection, the 9th resistance R9 other end ground connection, the tenth electricity
Resistance R10 other end ground connection, the 11st resistance R11 other end ground connection.
6. a kind of for eliminate output DC maladjustment method it is characterised in that include step,
(1) differential signal with imbalance for the preamplifying circuit output, and it is transferred to amplitude detection circuit and direct current correction circuit；
(2) the maximum amplitude of oscillation of the differential signal with imbalance is detected by amplitude detection circuit, is formed and comprises differential signal amplitude
The single-ended signal of value, and it is transferred to detecting circuit；
(3) output of amplitude detection circuit is carried out detection by detecting circuit, and the differential signal range value that it is comprised is converted into
DC voltage, and it is transferred to adjustment current generating circuit；
(4) DC voltage that detecting circuit exports is changed into and to be directly proportional to differential signal range value by adjustment current generating circuit
Current signal, and it is transferred to direct current correction circuit；
(5) direct current correction circuit will carry the differential signal correction lacked of proper care according to the current signal that is directly proportional to differential signal range value
Output difference signal for no imbalance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610994870.4A CN106487404B (en) | 2016-11-11 | 2016-11-11 | It is a kind of for eliminate output DC maladjustment circuit and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610994870.4A CN106487404B (en) | 2016-11-11 | 2016-11-11 | It is a kind of for eliminate output DC maladjustment circuit and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106487404A true CN106487404A (en) | 2017-03-08 |
| CN106487404B CN106487404B (en) | 2019-04-19 |
Family
ID=58272220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610994870.4A Active CN106487404B (en) | 2016-11-11 | 2016-11-11 | It is a kind of for eliminate output DC maladjustment circuit and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106487404B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114285385A (en) * | 2022-02-21 | 2022-04-05 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101997499A (en) * | 2010-12-15 | 2011-03-30 | 烽火通信科技股份有限公司 | AGC (Automatic Gain Control) circuit for transimpedance amplifier |
| CN102571227A (en) * | 2011-11-10 | 2012-07-11 | 嘉兴联星微电子有限公司 | Amplitude detection circuit with direct current offset elimination function |
| CN102882818A (en) * | 2012-09-06 | 2013-01-16 | 大唐移动通信设备有限公司 | Amending method and amending system directing at unbalanced zero intermediate frequency feedback |
| CN103840775A (en) * | 2014-02-27 | 2014-06-04 | 嘉兴禾润电子科技有限公司 | Limiting amplifier allowing direct-current offset eliminating function to be achieved on sheet |
-
2016
- 2016-11-11 CN CN201610994870.4A patent/CN106487404B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101997499A (en) * | 2010-12-15 | 2011-03-30 | 烽火通信科技股份有限公司 | AGC (Automatic Gain Control) circuit for transimpedance amplifier |
| CN102571227A (en) * | 2011-11-10 | 2012-07-11 | 嘉兴联星微电子有限公司 | Amplitude detection circuit with direct current offset elimination function |
| CN102882818A (en) * | 2012-09-06 | 2013-01-16 | 大唐移动通信设备有限公司 | Amending method and amending system directing at unbalanced zero intermediate frequency feedback |
| CN103840775A (en) * | 2014-02-27 | 2014-06-04 | 嘉兴禾润电子科技有限公司 | Limiting amplifier allowing direct-current offset eliminating function to be achieved on sheet |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114285385A (en) * | 2022-02-21 | 2022-04-05 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
| CN114285385B (en) * | 2022-02-21 | 2022-06-03 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106487404B (en) | 2019-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104868880B (en) | Clock generating circuit | |
| CN103809642B (en) | Current output circuit and two-wire system transducer | |
| CN107066416A (en) | The drive circuit and driving method of serial communication system | |
| CN103563252B (en) | Automatic gain control circuit | |
| CN105182061B (en) | A kind of AC current collecting circuit that ceramic machinery equipment uses | |
| CN101867365A (en) | Circuit for converting direct-current positive and negative bipolar signal into unipolar signal through isolation | |
| CN107147289A (en) | Control method, control circuit and multi-phase converter | |
| CN106487404A (en) | A kind of circuit for eliminating output DC maladjustment and method | |
| CN206259925U (en) | A kind of circuit for eliminating output DC maladjustment | |
| CN203858291U (en) | Measuring circuit for high frequency current | |
| CN113507270A (en) | Variable gain amplifier | |
| CN103269206B (en) | A kind of output limiter circuit of amplifier | |
| CN108519509A (en) | Novel intelligent electric energy meter and its collecting method | |
| CN207440254U (en) | Battery electric quantity checking device and lamps and lanterns | |
| CN108418563A (en) | A kind of feedback control circuit of power amplifier | |
| CN105445620A (en) | High voltage output device and method for feed line automation test | |
| CN106647922B (en) | A kind of voltage-tracing and clamp circuit | |
| CN109596874A (en) | A kind of impedance inverter circuit of driving capability enhancing | |
| CN101090267A (en) | High linearity wide input range changable gain single quadrant CMOS multiplier | |
| CN203278751U (en) | Amplifier output amplitude limiting circuit | |
| CN106911984A (en) | Phonoreception circuit based on amplifier | |
| CN202513836U (en) | Novel circuit for converting alternating current into direct current | |
| CN102608378A (en) | Converter of electronic capacitive divider | |
| CN208063151U (en) | A kind of BUFFER common-mode voltages stabilizing circuit | |
| CN207689561U (en) | It is a kind of based on amplifier can bias-adjusted WeChat ID Acquisition Circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |