CN106330327B - Method and device for managing enabling state of optical module - Google Patents
Method and device for managing enabling state of optical module Download PDFInfo
- Publication number
- CN106330327B CN106330327B CN201510338774.XA CN201510338774A CN106330327B CN 106330327 B CN106330327 B CN 106330327B CN 201510338774 A CN201510338774 A CN 201510338774A CN 106330327 B CN106330327 B CN 106330327B
- Authority
- CN
- China
- Prior art keywords
- optical module
- register
- qsfp
- sending
- enabling information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/40—Transceivers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Optical Communication System (AREA)
Abstract
The invention provides a method and a device for managing the enabling state of an optical module. The method comprises the following steps: when a management request is received, obtaining enabling information recorded by a register, wherein the register is used for simulating an optical module sending closing function of a quad-channel small pluggable QSFP + optical module; managing the enabling information recorded in the register according to the received management request; and if the enabling information changes, transmitting the enabling information to the QSFP + optical module.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a method and an apparatus for managing an enable state of an optical module.
Background
The optical module sends and closes enabling, and the TXDISABLE function is that optical module signal transmission switch is directly controlled, and when TXDISABLE equals 1, optical module sends and closes enabling effective, and the optical module laser is closed, and the optical port does not send optical signal outward, and when TXDISABLE equals 0, optical module sends and closes enabling ineffectiveness, and the optical module laser is opened, and the optical port normally sends optical signal outward. Generally, in an optical module product, a TXDISABLE pin is designed in an external circuit interface, and in a communication circuit design, a system acquires a light emitting state of an optical module by monitoring and controlling a level value of the TXDISABLE pin, and can operate the level state of the TXDISABLE pin to realize a function of controlling an optical port switch of the optical module.
With the rapid development of communication transmission technology, the 40G/100G optical interface standard and the pluggable optical module standard are completed, and 40G and 100G optical modules gradually enter the market. Due to the advantages of high speed, small package, low power consumption and the like, the 40G QSFP + optical module is rapidly developed and is increasingly applied to a high-speed communication system. However, due to the reduction of the package, a TXDISABLE pin is not designed in a QSFP (quad small Form-factor Pluggable) and optical module package structure, but the TXDISABLE state of the QSFP is built in a TXDISABLE register in an optical module, and the TXDISABLE state of the QSFP + optical module needs to be obtained and controlled by accessing and operating the register through an external IIC bus, which causes that a system cannot directly call a general interface to monitor and operate the TXDISABLE pin of the QSFP + optical module like other optical modules to realize an optical port switch function of controlling the QSFP + optical module, and achieve a function of controlling the communication of the QSFP + optical module by the system.
Disclosure of Invention
The invention provides a method and a device for managing the enabling state of an optical module, and aims to solve the technical problem of how to manage the enabling state of a TXDEABLE pin of a QSFP + optical module.
In order to solve the technical problems, the invention provides the following technical scheme:
a method of managing an enable state of a light module, comprising:
when a management request is received, obtaining enabling information recorded by a register, wherein the register is used for simulating an optical module sending closing function of a quad-channel small pluggable QSFP + optical module;
managing the enabling information recorded in the register according to the received management request;
and if the enabling information changes, transmitting the enabling information to the QSFP + optical module.
Before obtaining the enable information in the register, the method further includes:
setting an initial value of enable information in the register to be 1.
Wherein, whether the enabling information changes is obtained by the following method, including:
detecting a level state corresponding to the enabling information in the register;
and when the change of the level state of the register is detected, determining that the enabling information of the optical module for sending the closing function is changed.
Wherein sending the enabling information to the QSFP + optical module includes:
generating a write operation signal, wherein the write operation signal is used for changing the enabling state of the closing function of the optical module in the QSFP + optical module;
and sending the write operation signal to the QSFP + optical module through an integrated circuit bus IIC.
Before sending the enabling information to the QSFP + optical module, the method comprises the following steps:
detecting whether the IIC bus is occupied or not; and/or the presence of a gas in the gas,
detecting whether the enabling information is being transmitted to the QSFP + optical module.
An apparatus for managing an enable state of an optical module, the apparatus being connected to a QSFP + optical module, wherein the apparatus comprises:
the device comprises a first register, a second register and a third register, wherein the first register is used for simulating the optical module sending closing function of a QSFP + optical module and recording the enabling information of the optical module sending closing function;
a processor for managing the enable information in the register according to the received management request when the management request is received; and if the enabling information changes, transmitting the enabling information to the QSFP + optical module.
The processor is further configured to set an initial value of enable information in the first register to 1.
Wherein, whether the enabling information changes is obtained by the following method, including:
detecting a level state corresponding to the enabling information in the first register;
and when the change of the level state of the first register is detected, determining that the enabling information of the optical module for sending the closing function is changed.
The processor is specifically configured to generate a write operation signal and send the write operation signal to the QSFP + optical module through an IIC bus, where the write operation signal is used to change an enable state of an optical module shutdown function in the QSFP + optical module.
Wherein the apparatus further comprises:
the first sub-protection register is used for recording information whether the IIC bus is occupied or not, wherein a value 0 represents that the IIC bus is unoccupied, and a value 1 represents that the IIC bus is occupied;
a second sub-protection register, configured to record whether the processor is sending the write operation signal to a register corresponding to an optical module sending closing pin in the QSFP + optical module, where a value 0 indicates that the processor is not sending the write operation signal, and a value 1 indicates that the processor is sending the write operation signal;
the total protection register is used for carrying out OR operation on numerical values in the first sub protection register and the second sub protection register to obtain a calculation result;
the processor is used for sending the write operation signal if the calculation result is 0; and if the calculation result is 1, stopping sending the write operation signal, wherein the write operation signal is used for changing the enabling state of the turn-off function of the optical module in the QSFP + optical module.
And the initial values of the numerical values of the first sub-protection register and the second sub-protection register are both 0.
The embodiment provided by the invention can simulate the TXDEABLE pin of the QSFP + optical module, so that the QSFP + optical module can also be the same as other general optical modules, and the optical port switch function of the QSFP + optical module can be realized by calling a general system interface. The invention adopts the realization of a full hardware circuit, the realization method is simple and easy to operate and stable in work, and the QSFP + optical module can normally use the TXDEABLE function as other optical modules without additional processing on the system, thereby improving the working efficiency of the whole system and simultaneously facilitating the unified management and maintenance on the system.
Drawings
Fig. 1 is a block diagram of an apparatus for managing an enable state of a light module according to the present invention;
FIG. 2 is a flowchart of a method for managing the enabled status of a light module according to the present invention;
FIG. 3 is a schematic diagram of the initialization process of the QSFP + optical module provided by the present invention;
FIG. 4 is a schematic diagram of the system provided by the present invention acquiring the status of QSFP + optical module TXDEABLE;
FIG. 5 is a diagram illustrating the system operation QSFP + optical module TXDEABLE state provided by the present invention;
FIG. 6 is a schematic diagram of a logic automatic operation IIC bus write QSFP + optical module internal TXDISABLE register provided by the present invention;
fig. 7 is a schematic diagram of a system operation IIC bus read-write QSFP + optical module internal register according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
Fig. 1 is a block diagram of an apparatus for managing an enable state of a light module according to the present invention. Wherein the apparatus is connected to a QSFP + light module, wherein the apparatus comprises:
the device comprises a first register 101, a second register 101 and a third register, wherein the first register 101 is used for simulating an optical module sending closing function of a QSFP + optical module and recording enabling information of the optical module sending closing function;
a processor 102 for managing, when receiving a management request, the enable information in the register according to the received management request; and if the enabling information changes, transmitting the enabling information to the QSFP + optical module.
The device embodiment provided by the invention simulates the TXDABABLE pin of the QSFP + optical module by using the first register, so that the QSFP + optical module can also be the same as other general optical modules, and the optical port switch function of the QSFP + optical module can be realized by calling a general system interface.
The following further illustrates the apparatus provided by the present invention:
the basic idea of the invention is that: the TXDABLE pin function of the QSFP + optical module is simulated by utilizing the first register in the logic device, and the system can directly know the state of the TXDABLE in the QSFP + optical module by reading the value of the first register. Meanwhile, the value of the first register is changed, and then the corresponding TXDABABLE state representation value is written into a TXDABLE register in the QSFP + optical module through the IIC bus, so that the switching function of the TXDABLE state of the system operation optical module is realized.
Specifically, a register is set in the logic device, and the attribute of the register is readable and writable and is used for simulating the level state of the TXDEABLE pin of the QSFP + optical module. Here named as the first register, and according to the conventional TXDISABLE pin function of the optical module, it may be defined that when the value of the first register is 0, it indicates that TXDISABLE is not enabled, QSFP + optical module optical port is turned on to emit light normally, and when the value of the first register is 1, it indicates that TXDISABLE is enabled, and QSFP + optical module optical port is turned off to emit no light. The system can learn the TXDISABLE status of QSFP + optical module by reading the value of this first register. When the system needs to operate the TXDISALBE state of the optical module, the value of the first register in the logic device only needs to be operated.
The processor is further configured to set an initial value of enable information in the register to be 1.
Specifically, in the QSFP + optical module initialization process, according to an optical module general processing principle, the system writes the value of the first register to 1, and writes the value of a TXDISABLE register (address 0d86) inside the QSFP + to 0x0f, that is, the optical module is in a TXDISABLE valid state by default, and after initialization is completed, switching of the TXDISABLE state is realized according to system requirements.
Whether the enabling information is changed or not is obtained by the following method, including: detecting a level state corresponding to the enabling information in the register; when a change in the level state of the first register is detected, it is determined that the enable information has changed.
Specifically, the enable state of the optical module transmission off function includes two states, which are respectively represented by 0 and 1, so that it is determined that the enable information changes as long as the level state of the record enable information changes.
The processor is specifically configured to generate a write operation signal, and send the write operation signal to the QSFP + optical module through an Inter-Integrated Circuit (IIC), where the write operation signal is used to change an enable state of a shutdown function of the optical module in the QSFP + optical module.
Specifically, when the QSFP + optical module works normally, the logic device continuously scans and detects the level state of the first register at a high-speed frequency, and when the level state of the first register is detected to be changed, the logic device generates a write pulse to automatically excite the IIC bus and operate the TXDISABLE register in the write optical module to be in the TXDISABLE state required by the system. When the level state of the first register jumps from 0 to 1 rising edge, the logic device automatically triggers the writing of 0x0f into the TXDABLE register inside the optical module through the automatic IIC writing module, and when the level state of the first register jumps from 1 to 0 falling edge, the logic device automatically triggers the writing of 0x00 into the TXDABLE register inside the optical module through the automatic IIC writing module.
Furthermore, in order to prevent conflict and disorder between the optical module IIC bus used by the device and the system IIC bus used by the system, a corresponding total protection register, a first sub protection register and a second sub protection register are added, and normal application of the TXDEABLE pin function of the QSFP + optical module is effectively ensured by adding the registers for realizing the protection function. The concrete description is as follows:
the device further comprises:
the first sub-protection register is used for recording information whether the IIC bus is occupied or not, wherein a value 0 represents that the IIC bus is unoccupied, and a value 1 represents that the IIC bus is occupied;
a second sub-protection register, configured to record whether the processor is sending the write operation signal to a register corresponding to an optical module sending closing pin in the QSFP + optical module, where a value 0 indicates that the processor is not sending the write operation signal, and a value 1 indicates that the processor is sending the write operation signal;
the total protection register is used for carrying out OR operation on numerical values in the first sub protection register and the second sub protection register to obtain a calculation result;
the processor is used for sending the write operation signal if the calculation result is 0; and if the calculation result is 1, stopping sending the write operation signal.
Specifically, three protection registers, namely a total protection register, a first sub-protection register and a second sub-protection register, are added in the logic device. The value B of the total protection register is obtained by performing or operation on the value B1 of the first protection register and the value B2 of the second sub-protection register, that is, B1orB2, wherein both B1 and B2 can be read and written, and B can be read only. When any one of the first sub protection register and the second sub protection register is in a protection function, the total protection register is valid.
And the initial values of the numerical values of the first sub-protection register and the second sub-protection register are both 0.
Specifically, when the optical module is initialized, the system writes the values of the first sub-protection register and the second sub-protection register to be 0, that is, the values of the three protection registers default to 0, that is, no protection is performed.
The function of the three registers is explained below:
the first sub-protection register is used for indicating whether the logic device is automatically exciting IIC write operation or not, and preventing the system from suddenly and abnormally operating and writing the value of the first register when the logic device is in the process of automatically operating the TXDABLE register in the optical module by the IIC, so that the corresponding relation between the level state value of the first register and the actual TXDABLE state of the optical module is wrong. When the value of the total protection register is 1, the I IC bus of the optical module is used, and the system is not allowed to write the value of the first register during operation, so that the operation of writing the first register by the system is invalid due to the action of the first sub-protection register even if the system is in misoperation; when the value of the total protection register is 0, the optical module IIC bus is idle and can be used, and at the moment, the system can operate the value of the first register at any time to realize the switching of the TXDEABLE state of the QSFP + optical module. Therefore, when the optical module IIC bus is used, the value of the first sub-protection register is set to 1, which indicates that the optical module IIC bus is occupied, and then the operation of writing the TXDISABLE register inside the optical module is performed. And after the logic device finishes the operation, setting the first protection register to be 0, and releasing the IIC bus by the logic device.
The second sub-protection register is used for indicating whether the system occupies the IIC bus or not, and the situation that the system and the logic device occupy the IIC bus at the same time to cause IIC bus collision is prevented. When the system accesses the optical module internal register through IIC bus operation, the value of the total protection register is read firstly, when the value of the total protection register B is 1, the optical module IIC bus is indicated to be in use, and the system is not allowed to access the optical module internal register through IIC bus operation; if the system initiates an IIC bus operation access optical module internal register command at the moment, reporting an IIC BUSY error to inform the system; when the value of the total protection register is 0, it indicates that the optical module IIC bus is idle and usable, and the system can normally access the optical module internal register through the IIC bus operation. Therefore, when the system uses the IIC bus to operate the internal register of the optical module, the value of the second sub-protection register is set to 1, which indicates that the system is occupying the IIC bus of the optical module, then the system executes the IIC bus to operate the internal register of the optical module, after the IIC bus operation of the system is completed, the value of the second sub-protection register is set to 0 again, and the system releases the IIC bus.
Fig. 2 is a flowchart of a method for managing an enable state of a light module according to the present invention. The method shown in fig. 2 comprises:
and step 203, if the enabling information changes, sending the enabling information to the QSFP + optical module.
The method provided by the embodiment of the invention can simulate the TXDABABLE pin of the QSFP + optical module, so that the QSFP + optical module can also be the same as other general optical modules, and the optical port switching function of the QSFP + optical module can be realized by calling a general system interface.
Before the obtaining register is used for recording the enabling information of the closed pin sent by the optical module of the QSFP + optical module, the method further includes:
setting an initial value of enable information in the register to be 1.
Wherein, whether the enabling information changes is obtained by the following method, including:
detecting a level state corresponding to the enabling information in the register;
and when the change of the level state of the register is detected, determining that the enabling information of the optical module for sending the closing function is changed.
Wherein sending the enabling information to the QSFP + optical module includes:
generating a write operation signal, wherein the write operation signal is used for changing the enabling state of the closing function of the optical module in the QSFP + optical module;
and sending the write operation signal to a register corresponding to a closing pin of an optical module in the QSFP + optical module through an IIC bus.
Before the enabling information is sent to the pins of the QSFP + optical module which are closed, the method comprises the following steps:
detecting whether the IIC bus is occupied or not; and/or the presence of a gas in the gas,
and detecting whether the enable information is transmitted to a pin for transmitting closing to the optical module of the QSFP + optical module.
The device embodiment provided by the invention simulates the TXDABABLE pin of the QSFP + optical module by using the first register, so that the QSFP + optical module can also be the same as other general optical modules, and the optical port switch function of the QSFP + optical module can be realized by calling a general system interface.
The following examples of the method provided by the present invention are further illustrated:
fig. 3 is a flow chart of QSFP + optical module initialization provided by the present invention. The detailed process comprises the following steps:
(1) after the QSFP + optical module is normally powered on, the QSFP + optical module is RESET, namely the level of a RESET pin of the QSFP + optical module is pulled high. Typically, a light module is configured to a reset state by default when powered up.
(2) The QSFP + optical module MODSEL pin and the LPMODE pin are pulled low. The purpose of MODSEL pull-down is to let the QSFP + optical module respond to the IIC bus, and the purpose of LPMODE pull-down is to let the QSFP + optical module be in a normal operating mode.
(3) Delay time 2 s. According to the SFF 8436 protocol, the QSFP + optical module needs 2s of time at most when completing the resetting process, and the optical module fully completes the resetting by delaying 2 s.
(4) The system writes a TXDISABLE register (address is 0d86) in a QSFP + optical module as 0x0f through an IIC bus, and writes a value of a first register in a logic device as 1, so that the optical module is in a TXDISABLE enabled state, namely an optical module optical port closed state, by default.
(5) And writing the values of the first sub-protection register and the second sub-protection register into 0, and initially defaulting to an unprotected state.
It can be seen from the above that, through the above initialization procedure, correct execution of subsequent management can be ensured.
The system can read the TXDABLE state of the QSFP + optical module at any time, and the system reads the TXDABLE state of the optical module. As shown in fig. 4, when the system needs to acquire the QSFP + optical module TXDISABLE state, it only needs to read the value of the first register defined in the logic device, and when the value of the first register is 1, it indicates that the TXDISABLE of the current QSFP + optical module is valid, and is in the transmission-off state, and the optical port is in the optical port-off state; when the value of the first register is 0, the TXDEABLE of the current QSFP + optical module is invalid and is in a sending enabling state and an optical port opening state.
In the invention, the system can operate the TXDABABLE state of the QSFP + optical module, the TXDABABLE state of the QSFP + optical module is divided into two processes which are respectively the value of a first register operated by the system, after the logic device scans and detects that the value of the first register changes, the IIC bus is automatically excited, and the latest TXDABABLE state value required by the system is written into the TXDABLE register of the optical module, and the flow diagrams of the two processes are respectively shown in fig. 5 and fig. 6.
(1) And (3) whether the system needs to operate the TXDEABLE state of the QSFP + optical module, namely whether the system needs to write the value of the first register, if so, entering the step (2), and otherwise, staying at the step (1).
(2) The logic automatically reads the value of the total protection register, if the value of the total protection register is 1, the step (3) is entered, otherwise, if the value of the total protection register is 0, the step (4) is entered
(3) When the current QSFP + optical module bus is in use, the system is not allowed to write the value of the first register, the system operation is invalid, the value of the first register is kept unchanged, and the system returns to the step (1) after the system operation is finished.
(4) When the current QSFP + optical module bus is idle, the system is allowed to write the value of the first register, the system operation is effective, and the value of the first register is written as the value required by the system. If the value of the first register changes, namely the TXDISABLE state of the optical module changes, the TXDISABLE state is detected by the logic automatic scanning, and the step (5) is carried out, otherwise, if the TXDISABLE state does not change, the logic is not required to automatically excite the IIC bus to write the TXDISABLE register in the optical module, and the step (1) is returned.
(5) The logic automatically sets the protection register B1 to 1, judges the value change condition of the first register, if the value of the first register is changed from 0 to 1, the logic sets the temporary variable to be written into the TXDABLE register in the optical module to 0x0f, otherwise, the logic sets the temporary variable to 0x 0.
(6) And the logic automatic excitation light module IIC bus writes the value of the temporary variable into a TXDISABLE register in the optical module through the automatic IIC writing module.
(7) After the logic IIC bus is executed, the logic sets the value of the first sub-protection register back to 0, the process is finished, and the next system operation process is waited.
In the present invention, the system may also normally operate QSFP + optical module internal register, and a flow diagram of the system operating QSFP + optical module internal register is shown in fig. 7.
(1) And (3) whether the system needs to operate the internal register of the optical module is judged, if so, the step (2) is carried out, otherwise, the step (1) is stopped until the system has corresponding operation requirements.
(2) And (4) reading the value of the protection register B by the system, judging whether the value is 1, if so, entering the step (3), and otherwise, entering the step (4).
(3) And (3) reporting an IIC _ BUSY error to inform the system when the QSFP + optical module IIC bus is currently used and cannot be used for a while, and returning to the step (1).
(4) When the QSFP + optical module IIC bus is idle, the system can be used, the value of the second sub-protection register is set to be 1 by the system, and the system occupies the IIC bus.
(5) The system uses the IIC bus to execute the QSFP + optical module internal register command of operation.
(6) After the system finishes executing, the system sets the value in the second sub-protection register back to 0, the process operation is finished, and the next operation process is waited.
In summary, a first register is defined in the logic device to simulate the TXDISABLE pin function of the QSFP + optical module, and the system can directly know the state of the TXDISABLE inside the QSFP + optical module by reading the value of the first register. Meanwhile, when the first register value of the system operation changes, the logic device automatically activates an optical module IIC bus, and writes a corresponding TXDABLE state representation value into a TXDABLE register in the QSFP + optical module, so that the switching function of the TXDABLE state of the system operation optical module is realized. In order to prevent conflict and disorder between the optical module IIC bus used by a logic device and the system IIC bus used by the system, a corresponding total protection register, a first sub-protection register and a second sub-protection register are added, a small amount of protection processes are added, and normal application of the TXDISABLE pin function of the QSFP + optical module is guaranteed.
It will be understood by those of ordinary skill in the art that all or part of the steps of the above embodiments may be implemented using a computer program flow, which may be stored in a computer readable storage medium and executed on a corresponding hardware platform (e.g., system, apparatus, device, etc.), and when executed, includes one or a combination of the steps of the method embodiments.
Alternatively, all or part of the steps of the above embodiments may be implemented by using an integrated circuit, and the steps may be respectively manufactured as an integrated circuit module, or a plurality of the blocks or steps may be manufactured as a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
The devices/functional modules/functional units in the above embodiments may be implemented by general-purpose computing devices, and they may be centralized on a single computing device or distributed on a network formed by a plurality of computing devices.
Each device/function module/function unit in the above embodiments may be implemented in the form of a software function module and may be stored in a computer-readable storage medium when being sold or used as a separate product. The computer readable storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (7)
1. A method of managing an enable state of a light module, comprising:
when a management request is received, obtaining enabling information recorded by a register, wherein the register is used for simulating an optical module sending closing function of a quad-channel small pluggable QSFP + optical module;
managing the enabling information recorded in the register according to the received management request;
if the enabling information changes, transmitting the enabling information to the QSFP + optical module, wherein the transmitting the enabling information to the QSFP + optical module comprises: generating a write operation signal, and sending the write operation signal to the QSFP + optical module through an integrated circuit bus IIC, wherein the write operation signal is used for changing the enabling state of the closing function of the optical module in the QSFP + optical module;
before sending the enabling information to the QSFP + optical module, the method comprises the following steps:
detecting whether the IIC bus is occupied or not; and/or the presence of a gas in the gas,
detecting whether the enabling information is being transmitted to the QSFP + optical module.
2. The method of claim 1, wherein prior to obtaining the enable information in the register, the method further comprises:
setting an initial value of enable information in the register to be 1.
3. The method of claim 1, wherein whether the enabling information is changed is obtained by:
detecting a level state corresponding to the enabling information in the register;
and when the change of the level state of the register is detected, determining that the enabling information of the optical module for sending the closing function is changed.
4. An apparatus for managing an enable state of an optical module, the apparatus being connected to a QSFP + optical module, wherein the apparatus comprises:
the device comprises a first register, a second register and a third register, wherein the first register is used for simulating the optical module sending closing function of a QSFP + optical module and recording the enabling information of the optical module sending closing function;
a processor for managing the enable information in the register according to the received management request when the management request is received; if the enabling information changes, sending the enabling information to the QSFP + optical module, wherein the sending of the enabling information to the QSFP + optical module comprises generating a write operation signal, and sending the write operation signal to the QSFP + optical module through an IIC bus, wherein the write operation signal is used for changing the enabling state of the closing function of the optical module in the QSFP + optical module;
wherein the apparatus further comprises:
the first sub-protection register is used for recording information whether the IIC bus is occupied or not, wherein a value 0 represents that the IIC bus is unoccupied, and a value 1 represents that the IIC bus is occupied;
a second sub-protection register, configured to record whether the processor is sending the write operation signal to a register corresponding to an optical module sending closing pin in the QSFP + optical module, where a value 0 indicates that the processor is not sending the write operation signal, and a value 1 indicates that the processor is sending the write operation signal;
the total protection register is used for carrying out OR operation on numerical values in the first sub protection register and the second sub protection register to obtain a calculation result;
the processor is used for sending the write operation signal if the calculation result is 0; and if the calculation result is 1, stopping sending the write operation signal, wherein the write operation signal is used for changing the enabling state of the turn-off function of the optical module in the QSFP + optical module.
5. The apparatus of claim 4, wherein:
the processor is further configured to set an initial value of enable information in the first register to 1.
6. The apparatus of claim 4, wherein whether the enabling information is changed is obtained by:
detecting a level state corresponding to the enabling information in the first register;
and when the change of the level state of the first register is detected, determining that the enabling information of the optical module for sending the closing function is changed.
7. The apparatus of claim 4, wherein the initial values of the first sub-protection register and the second sub-protection register are both 0.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510338774.XA CN106330327B (en) | 2015-06-17 | 2015-06-17 | Method and device for managing enabling state of optical module |
PCT/CN2016/071977 WO2016201983A1 (en) | 2015-06-17 | 2016-01-25 | Method and device for managing enablement state of optical module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510338774.XA CN106330327B (en) | 2015-06-17 | 2015-06-17 | Method and device for managing enabling state of optical module |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106330327A CN106330327A (en) | 2017-01-11 |
CN106330327B true CN106330327B (en) | 2020-06-30 |
Family
ID=57544929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510338774.XA Active CN106330327B (en) | 2015-06-17 | 2015-06-17 | Method and device for managing enabling state of optical module |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN106330327B (en) |
WO (1) | WO2016201983A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107294594B (en) * | 2017-07-03 | 2023-11-14 | 博为科技有限公司 | Passive optical network device, switching method and system |
CN113364523B (en) * | 2020-03-06 | 2022-06-28 | 青岛海信宽带多媒体技术有限公司 | Data sending method and optical module |
CN111953412B (en) * | 2020-08-07 | 2022-03-08 | 苏州浪潮智能科技有限公司 | Method and device for realizing optical information synchronization of optical module switch |
CN113472449B (en) * | 2021-08-11 | 2022-08-19 | 青岛海信宽带多媒体技术有限公司 | Optical module and signal polarity definition method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101494498A (en) * | 2009-03-06 | 2009-07-29 | 中兴通讯股份有限公司 | Apparatus and method for collecting SFP optical module signal |
CN102118660A (en) * | 2011-01-12 | 2011-07-06 | 中兴通讯股份有限公司 | Method and device for accessing optical module |
CN102342042A (en) * | 2009-03-09 | 2012-02-01 | 古河电气工业株式会社 | Optical communication module, and optical communication system in which optical communication module is used |
CN102723988A (en) * | 2012-06-12 | 2012-10-10 | 迈普通信技术股份有限公司 | Control method and communication device of optical module |
CN104639375A (en) * | 2015-03-03 | 2015-05-20 | 大唐移动通信设备有限公司 | Interface management method and network equipment |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5009104B2 (en) * | 2007-09-10 | 2012-08-22 | 日本オプネクスト株式会社 | Optical transmission / reception module, control method thereof, and program |
-
2015
- 2015-06-17 CN CN201510338774.XA patent/CN106330327B/en active Active
-
2016
- 2016-01-25 WO PCT/CN2016/071977 patent/WO2016201983A1/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101494498A (en) * | 2009-03-06 | 2009-07-29 | 中兴通讯股份有限公司 | Apparatus and method for collecting SFP optical module signal |
CN102342042A (en) * | 2009-03-09 | 2012-02-01 | 古河电气工业株式会社 | Optical communication module, and optical communication system in which optical communication module is used |
CN102118660A (en) * | 2011-01-12 | 2011-07-06 | 中兴通讯股份有限公司 | Method and device for accessing optical module |
CN102723988A (en) * | 2012-06-12 | 2012-10-10 | 迈普通信技术股份有限公司 | Control method and communication device of optical module |
CN104639375A (en) * | 2015-03-03 | 2015-05-20 | 大唐移动通信设备有限公司 | Interface management method and network equipment |
Also Published As
Publication number | Publication date |
---|---|
WO2016201983A1 (en) | 2016-12-22 |
CN106330327A (en) | 2017-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102567109B (en) | Interrupt distribution scheme | |
CN106330327B (en) | Method and device for managing enabling state of optical module | |
US9146797B2 (en) | Method for ensuring remediation of hung multiplexer bus channels | |
CN104321716B (en) | Use device idle duration information optimizes energy efficiency | |
EP3242199A1 (en) | Flash memory controller and control method for flash memory controller | |
CN109324991B (en) | Hot plug device, method, medium and system of PCIE (peripheral component interface express) equipment | |
WO2016202040A1 (en) | Pcie-based sub-card hot plugging method and apparatus | |
US10102155B2 (en) | Method and device of information protection for micro control unit chip | |
CN108141471B (en) | Method, device and equipment for compressing data | |
CN105164635A (en) | On-the-fly performance adjustment for solid state storage devices | |
US20120159203A1 (en) | Utilizing networked 3d voltage regulation modules (vrm) to optimize power and performance of a device | |
CN107273245B (en) | Operation device and operation method | |
RU2643499C2 (en) | Memory control | |
CN113190427B (en) | Method and device for monitoring blocking, electronic equipment and storage medium | |
CN109597653A (en) | Method, BIOS and the BMC of BIOS and BMC command interaction | |
CN106462548A (en) | Firmware sensor layer | |
US10216664B2 (en) | Remote resource access method and switching device | |
WO2015117384A1 (en) | Method and device for reporting received loss of signal alarm (rxlos) | |
CN109933549A (en) | A kind of interrupt control unit suitable for RISC-V processor | |
CN111475432B (en) | Slave computer starting control device, single bus system and control method thereof | |
US10962593B2 (en) | System on chip and operating method thereof | |
US11455261B2 (en) | First boot with one memory channel | |
CN108182157B (en) | Method, BMC, device and storage medium for realizing heterogeneous hybrid memory | |
WO2016106933A1 (en) | Sub-area-based method and device for protecting information of mcu chip | |
CN114461142B (en) | Method, system, device and medium for reading and writing Flash data |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |