CN106201725A - The power realization method and system of multi core chip - Google Patents
The power realization method and system of multi core chip Download PDFInfo
- Publication number
- CN106201725A CN106201725A CN201610580766.0A CN201610580766A CN106201725A CN 106201725 A CN106201725 A CN 106201725A CN 201610580766 A CN201610580766 A CN 201610580766A CN 106201725 A CN106201725 A CN 106201725A
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- Prior art keywords
- thread
- kernel
- power
- execution time
- multi core
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Abstract
The invention provides the power realization method and system of a kind of multi core chip, described method comprises the steps: to obtain the quantity of the thread of each kernel distribution；Obtain the execution time of each thread；Quantity and execution time according to this thread are that each kernel distributes power.The technical scheme that the present invention provides has the advantage realizing power internal distribution.
Description
Technical field
The present invention relates to electronic applications, particularly relate to the power realization method and system of a kind of multi core chip.
Background technology
Chip, English is Chip；Chipset is Chipset.Chip generally refers to the carrier of integrated circuit, is also integrated electricity
Road result after designing, manufacture, encapsulate, testing, it is common that the independent entirety that can use immediately." chip " and
" integrated circuit " the two word often mixes and uses, and such as in everybody usual discussion topic, IC design and chip set
What meter was said is a meaning, and chip industry, integrated circuit industry, IC industry are the most also meanings.It practice, the two word
It is related, also has any different.Integrated circuit entity because the integrated circuit of narrow sense, to be often to emphasize presented in chip
Circuit itself is such as simple to only five phaseshift oscillators that element is joined together to form, when it also presents on drawing
When, we can also be its integrated circuit, and when we to take this little integrated circuit apply when, it must be with
One piece of independent material object, or be embedded in bigger integrated circuit, rely on chip to play his effect；Integrated circuit is more
The weight design of circuit and placement-and-routing, chip more accentuator circuit integrated, produce and encapsulate.And the integrated circuit of broad sense, when relating to
And during to industry (being different from other industry), it is also possible to comprise the various implications that chip is relevant.
Existing electronic chip all has multiple kernel, but existing electronic chip distributes not for the power of multiple kernels
There is corresponding scheme.
Summary of the invention
The power implementation method of a kind of multi core chip is provided, which solves the merit that cannot realize multi core chip of prior art
The shortcoming that rate realizes.
On the one hand, it is provided that the power implementation method of a kind of multi core chip, described method comprises the steps:
Obtain the quantity of the thread of each kernel distribution；
Obtain the execution time of each thread；
Quantity and execution time according to this thread are that each kernel distributes power.
Optionally, described method also includes:
Power such as this kernel reaches higher limit, then stop distributing thread to this kernel.
Optionally, described method also includes:
Dynamically update the Thread Count scale of each kernel.
Second aspect, it is provided that the power of a kind of multi core chip realizes system, described system includes:
Processing units, for obtaining the quantity of the thread of each kernel distribution；
Time quantum, for obtaining the execution time of each thread；
Allocation unit, is used for the quantity according to this thread and the execution time is that each kernel distributes power.
Optionally, described system also includes:
Stop element, reaches higher limit for the power such as this kernel, then stop distributing thread to this kernel.
Optionally, described system also includes:
Updating block, for dynamically updating the Thread Count scale of each kernel.
The technical scheme that the specific embodiment of the invention provides obtains the quantity of the thread of each kernel distribution, obtains each
The execution time of thread, quantity and execution time according to this thread are that each kernel distributes power, so it has realization
The advantage that the power of multi core chip realizes.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to
Other accompanying drawing is obtained according to these accompanying drawings.
The flow chart of the power implementation method of a kind of multi core chip that Fig. 1 provides for the present invention；
The power of a kind of multi core chip that Fig. 2 provides for the present invention realizes the structure chart of system.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Describe, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments wholely.Based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under not making creative work premise
Embodiment, broadly falls into the scope of protection of the invention.
The power implementation method of a kind of multi core chip provided for the present invention the first better embodiment refering to Fig. 1, Fig. 1
Flow chart, the method is completed by electronic chip, and the method is as it is shown in figure 1, comprise the steps:
Step S101, obtain the quantity of thread of each kernel distribution；
Step S102, obtain execution time of each thread；
Step S103, it is that each kernel distributes power according to the quantity of this thread and execution time.
The technical scheme that the specific embodiment of the invention provides obtains the quantity of the thread of each kernel distribution, obtains each
The execution time of thread, quantity and execution time according to this thread are that each kernel distributes power, so it has realization
The advantage that the power of multi core chip realizes.
Optionally, said method can also include after step s 103:
Power such as this kernel reaches higher limit, then stop distributing thread to this kernel.
Optionally, said method can also include after step s 103:
Dynamically update the Thread Count scale of each kernel.
The power of a kind of multi core chip provided for the present invention the second better embodiment refering to Fig. 2, Fig. 2 realizes system,
This system includes:
Processing units 201, for obtaining the quantity of the thread of each kernel distribution；
Time quantum 202, for obtaining the execution time of each thread；
Allocation unit 203, is used for the quantity according to this thread and the execution time is that each kernel distributes power.
The technical scheme that the specific embodiment of the invention provides obtains the quantity of the thread of each kernel distribution, obtains each
The execution time of thread, quantity and execution time according to this thread are that each kernel distributes power, so it has realization
The advantage that the power of multi core chip realizes.
Optionally, said system can also include:
Stop element 204, reaches higher limit for the power such as this kernel, then stop distributing thread to this kernel.
Optionally, said system can also include:
Updating block 205, for dynamically updating the Thread Count scale of each kernel.
It should be noted that for aforesaid each method embodiment or embodiment, in order to be briefly described, therefore by its all table
Stating as a series of combination of actions, but those skilled in the art should know, the present invention is not by described sequence of movement
Restriction, because of according to the present invention, some step can use other orders or carry out simultaneously.Secondly, people in the art
Member also should know, embodiment described in the specification or embodiment belong to preferred embodiment, involved action and list
Necessary to the unit not necessarily present invention.
In the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, and does not has the portion described in detail in certain embodiment
Point, may refer to the associated description of other embodiments.
Step in embodiment of the present invention method can carry out order according to actual needs and adjust, merges and delete.
Unit in embodiment of the present invention device can merge according to actual needs, divides and delete.This area
The feature of the different embodiments described in this specification and different embodiment can be combined or combine by technical staff.
Through the above description of the embodiments, those skilled in the art it can be understood that to the present invention permissible
Realize with hardware, or firmware realizes, or combinations thereof mode realizes.When implemented in software, can be by above-mentioned functions
It is stored in computer-readable medium or is transmitted as the one or more instructions on computer-readable medium or code.Meter
Calculation machine computer-readable recording medium includes computer-readable storage medium and communication media, and wherein communication media includes being easy to from a place to another
The individual local any medium transmitting computer program.Storage medium can be any usable medium that computer can access.With
As a example by this but be not limited to: computer-readable medium can include random access memory (Random Access Memory,
RAM), read only memory (Read-Only Memory, ROM), EEPROM (Electrically
Erasable Programmable Read-Only Memory, EEPROM), read-only optical disc (Compact Disc Read-
Only Memory, CD-ROM) or other optical disc storage, magnetic disk storage medium or other magnetic storage apparatus or can be used in
Carry or store and there is instruction or the desired program code of data structure form can be by any other of computer access
Medium.In addition.Any connection can be suitable become computer-readable medium.Such as, if software is to use coaxial cable, light
Fine optical cable, twisted-pair feeder, Digital Subscriber Line (Digital Subscriber Line, DSL) or such as infrared ray, radio and
The wireless technology of microwave etc from website, server or other remote source, then coaxial cable, optical fiber cable, double
The wireless technology of twisted wire, DSL or such as infrared ray, wireless and microwave etc be included in affiliated medium fixing in.Such as this
Bright used, dish (Disk) and dish (disc) include compress laser disc (CD), laser dish, laser disc, Digital Versatile Disc (DVD),
Floppy disk and Blu-ray Disc, the duplication data of the usual magnetic of its mid-game, dish then carrys out the duplication data of optics with laser.Group above
Close within should also be as being included in the protection domain of computer-readable medium.
In a word, the foregoing is only the preferred embodiment of technical solution of the present invention, be not intended to limit the present invention's
Protection domain.All within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. made, should be included in
Within protection scope of the present invention.
Claims (6)
1. the power implementation method of a multi core chip, it is characterised in that described method comprises the steps:
Obtain the quantity of the thread of each kernel distribution；
Obtain the execution time of each thread；
Quantity and execution time according to this thread are that each kernel distributes power.
Method the most according to claim 1, it is characterised in that described method also includes:
Power such as this kernel reaches higher limit, then stop distributing thread to this kernel.
Method the most according to claim 1, it is characterised in that described method also includes:
Dynamically update the Thread Count scale of each kernel.
4. the power of a multi core chip realizes system, it is characterised in that described system includes:
Processing units, for obtaining the quantity of the thread of each kernel distribution；
Time quantum, for obtaining the execution time of each thread；
Allocation unit, is used for the quantity according to this thread and the execution time is that each kernel distributes power.
System the most according to claim 4, it is characterised in that described system also includes:
Stop element, reaches higher limit for the power such as this kernel, then stop distributing thread to this kernel.
System the most according to claim 4, it is characterised in that described system also includes:
Updating block, for dynamically updating the Thread Count scale of each kernel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610580766.0A CN106201725A (en) | 2016-07-21 | 2016-07-21 | The power realization method and system of multi core chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610580766.0A CN106201725A (en) | 2016-07-21 | 2016-07-21 | The power realization method and system of multi core chip |
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| Publication Number | Publication Date |
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| CN106201725A true CN106201725A (en) | 2016-12-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610580766.0A Pending CN106201725A (en) | 2016-07-21 | 2016-07-21 | The power realization method and system of multi core chip |
Country Status (1)
| Country | Link |
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| CN (1) | CN106201725A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018014300A1 (en) * | 2016-07-21 | 2018-01-25 | 张升泽 | Power implementation method and system for multi-core chip |
| WO2018018451A1 (en) * | 2016-07-27 | 2018-02-01 | 李媛媛 | Power distribution method and system in electronic chip |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102567117A (en) * | 2010-09-30 | 2012-07-11 | 国际商业机器公司 | Method and system for scheduling threads in a processor |
| CN104583900A (en) * | 2012-10-04 | 2015-04-29 | 英特尔公司 | Dynamically switching a workload between heterogeneous cores of a processor |
-
2016
- 2016-07-21 CN CN201610580766.0A patent/CN106201725A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102567117A (en) * | 2010-09-30 | 2012-07-11 | 国际商业机器公司 | Method and system for scheduling threads in a processor |
| CN104583900A (en) * | 2012-10-04 | 2015-04-29 | 英特尔公司 | Dynamically switching a workload between heterogeneous cores of a processor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018014300A1 (en) * | 2016-07-21 | 2018-01-25 | 张升泽 | Power implementation method and system for multi-core chip |
| WO2018018451A1 (en) * | 2016-07-27 | 2018-02-01 | 李媛媛 | Power distribution method and system in electronic chip |
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Application publication date: 20161207 |
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