CN105932029A - Array substrate, production method thereof, touch display panel and display device - Google Patents
Array substrate, production method thereof, touch display panel and display device Download PDFInfo
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- CN105932029A CN105932029A CN201610405244.7A CN201610405244A CN105932029A CN 105932029 A CN105932029 A CN 105932029A CN 201610405244 A CN201610405244 A CN 201610405244A CN 105932029 A CN105932029 A CN 105932029A
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- base palte
- array base
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- 239000000758 substrate Substances 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 82
- 239000002184 metal Substances 0.000 claims abstract description 82
- 238000000034 method Methods 0.000 claims description 35
- 238000003491 array Methods 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 5
- 238000012546 transfer Methods 0.000 claims description 3
- 230000000007 visual effect Effects 0.000 abstract description 11
- 238000002161 passivation Methods 0.000 description 15
- 238000000059 patterning Methods 0.000 description 14
- 239000010409 thin film Substances 0.000 description 6
- 239000012212 insulator Substances 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000013499 data model Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an array substrate, a production method thereof, a touch display panel and a display device. The array substrate comprises a substrate base plate, a plurality of grids lines and a plurality of data lines which are crosswise placed on the substrate base plate and insulating with each other, and a source driving circuit positioned at a frame area of the array substrate, wherein each pin of the source driving circuit is directly and electrically connected with the corresponding data line. The array substrate also comprises a grid driving circuit positioned at the same frame area with the source driving circuit, and metal wires corresponding to the grids in a one-to-one manner and electrically connected with the same, wherein each pin of the grid driving circuit is directly and electrically connected with the corresponding metal wire. As the grid driving circuit and the source driving circuit are both positioned at the same frame area of the array substrate, the grid driving circuit loads scanning signals to the grids via the metal wires, the source driving circuit directly loads gray scale signals to the data lines, thus the screen occupation rate can be greatly improved, the other three sides have ultra-narrow frames even do not have frames, and the user can enjoy unprecedented visual experience and amazing visual effect.
Description
Technical field
The present invention relates to Display Technique field, espespecially a kind of array base palte, its manufacture method, touch-control display surface
Plate and display device.
Background technology
At present, in order to make beholder have a more preferable visual enjoyment, narrow frame display product be current popular become
Gesture, along with the fast development of mobile product, the frame of display product is more and more narrow, and " Rimless " has become
Next development trend for smart mobile phone industry.
In prior art, gate driver circuit is typically formed at the array base palte of display floater by array processes
On, i.e. array base palte row cutting (Gate Driver on Array, GOA) technique, this integrated technique is not only
Provide cost savings, and the design for aesthetic that display floater both sides are symmetrical can be accomplished, meanwhile, also eliminate grid
Binding (Bonding) region of pole integrated circuit (IC, Integrated Circuit) and fan-out (Fan-out)
Wiring space, such that it is able to realize the design of narrow frame.Such as, array base palte is provided with intersection and
Put and a plurality of grid line of mutually insulated and a plurality of data lines, load the grid of gated sweep signal for each grid line successively
Pole drive circuit is positioned at two, the left and right frame region of array base palte, by each data wire and source electrode drive circuit
The data wire pin being electrically connected with is positioned at the lower frame region of array base palte.But be integrated on array base palte
Gate driver circuit still can occupy certain width, restriction display floater ultra-narrow frame even Rimless
Development.
Therefore, reduce the border width of display floater the most further, be that those skilled in the art are urgently to be resolved hurrily
Technical problem.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of array base palte, its manufacture method, touch-control display panel
And display device, screen accounting can be greatly improved, it is achieved the narrowest frame even Rimless on three limits.
Therefore, embodiments provide a kind of array base palte, including: underlay substrate, it is arranged on described
Intersection on underlay substrate and put and a plurality of grid line of mutually insulated and a plurality of data lines, and be positioned at described battle array
The source electrode drive circuit of one frame region of row substrate；Each pin of described source electrode drive circuit and each described number
Directly it is electrically connected with according to line；Also include:
With the gate driver circuit that described source electrode drive circuit is positioned at same frame region, and with each described grid
Line one_to_one corresponding and the metal routing of electric connection；
Each pin of described gate driver circuit is directly electrically connected with each described metal routing.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described
Metal routing is positioned at described grid line and the lower section of described data wire；
Each described grid line is electrically connected with corresponding described metal routing by via.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described
Metal routing is parallel to each other with described data wire.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, along institute
Stating the bearing of trend of data wire, each described via is the most staggered.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also wrap
Include: multiple pixel cells arranged in arrays；Adjacent two described grid lines and adjacent two data line limit one
Individual pixel cell；
Described metal routing is arranged on the gap location between the two adjacent described pixel cells of row.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, also wrap
Include: multiple touch-control self-capacitance electrodes arranged in arrays, and with each described touch-control self-capacitance electrode one by one
Touch-control lead-in wire that is corresponding and that be electrically connected with, each described touch-control self-capacitance electrode passes through corresponding touch-control lead-in wire and touches
Control chip is connected；Described touch chip and described source electrode drive circuit are positioned at same frame region；
Described touch-control self-capacitance electrode is used as public electrode in the display stage, is used as touch-control from electricity in the touch-control stage
Hold electrode；
Described touch-control lead-in wire is for transmitting common electrode signal in the display stage to described public electrode, at touch-control
Stage is to described touch-control self-capacitance electrodes transfer touch scanning signals, and is additionally operable to touch position to occur
The touching signals that touch-control self-capacitance electrode produces is transferred to touch chip.
In a kind of possible implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, described
Touch-control lead-in wire is arranged on the gap location between the two adjacent described pixel cells of row.
The embodiment of the present invention additionally provides the making side of the above-mentioned array base palte that a kind of embodiment of the present invention provides
Method, including:
Underlay substrate is formed and intersects and put and a plurality of grid line of mutually insulated and the figure of a plurality of data lines,
And formed and each described grid line one_to_one corresponding and the figure of the metal routing of electric connection；
A frame region at described array base palte forms source electrode drive circuit and gate driver circuit；Described source
Each pin of pole drive circuit is directly electrically connected with each described data wire；Respectively drawing of described gate driver circuit
Foot is directly electrically connected with each described metal routing.
The embodiment of the present invention additionally provides a kind of touch-control display panel, including the embodiment of the present invention provide above-mentioned
Array base palte.
The embodiment of the present invention additionally provides a kind of display device, the above-mentioned array provided including the embodiment of the present invention
Substrate or above-mentioned touch-control display panel.
The beneficial effect of the embodiment of the present invention includes:
A kind of array base palte, its manufacture method, touch-control display panel and the display dress that the embodiment of the present invention provides
Put, including underlay substrate, the intersection that is arranged on underlay substrate and put and a plurality of grid line of mutually insulated and
A plurality of data lines, and it is positioned at the source electrode drive circuit of a frame region of array base palte；Source electrode drive circuit
Each pin be directly electrically connected with each data wire；Also include: be positioned at same rim area with source electrode drive circuit
The gate driver circuit in territory, and with each grid line one_to_one corresponding and the metal routing of electric connection；Raster data model
Each pin of circuit is directly electrically connected with each metal routing.Due to gate driver circuit and source electrode drive circuit
Being respectively positioned in the same frame region of array base palte, gate driver circuit passes through metal routing successively to each grid line
Loading gated sweep signal, source electrode drive circuit directly loads grayscale signal to each data wire, so can be big
Width improves screen accounting, it is achieved the narrowest frame even Rimless on other three limits, allows user enjoy unprecedented
Visual experience and the visual effect that is more pleasantly surprised.
Accompanying drawing explanation
The schematic diagram of the array base palte that Fig. 1 provides for the embodiment of the present invention；
The structural representation of the array base palte with metal routing that Fig. 2 provides for the embodiment of the present invention；
Fig. 3 shows for the structure of the array base palte with metal routing and touch-control cabling that the embodiment of the present invention provides
It is intended to；
The cross section of the array base palte with metal routing and touch-control cabling that Fig. 4 provides for the embodiment of the present invention
Figure；
The manufacture method flow chart of the array base palte that Fig. 5 provides for the embodiment of the present invention；
The manufacture method of the array base palte that Fig. 6 a to Fig. 6 k respectively embodiment of the present invention provides is held in each step
Sectional view after row.
Detailed description of the invention
Below in conjunction with the accompanying drawings, the array base palte, its manufacture method, the touch-control that provide the embodiment of the present invention show
The detailed description of the invention of panel and display device is described in detail.
Wherein, in accompanying drawing, the thickness of each film layer and shape do not reflect the actual proportions of array base palte, and purpose is simply
Schematically illustrate present invention.
Embodiments provide a kind of array base palte, as it is shown in figure 1, include: underlay substrate, arrange
Intersection on underlay substrate and put and a plurality of grid line 1 of mutually insulated and a plurality of data lines (are not shown in Fig. 1
Go out), and it is positioned at the source electrode drive circuit 01 of a frame region of array base palte；Source electrode drive circuit each
Pin is directly electrically connected with each data wire；Also include:
With the gate driver circuit 02 that source electrode drive circuit 01 is positioned at same frame region, and with each grid line
The metal routing 2 of 1 one_to_one corresponding and electric connection；
Each pin of gate driver circuit 02 is directly electrically connected with each metal routing 2.
It should be noted that Fig. 1 showing, source electrode drive circuit 01 and gate driver circuit 02 are respectively positioned on
The lower frame region of array base palte, is respectively positioned on array for source electrode drive circuit 01 and gate driver circuit 02
Which frame region of substrate, can be according to practical situation depending on, do not limit at this.Source electrode drive circuit
Multiplexing selector MUX_Unit can be provided with between 01 and gate driver circuit 02, it is possible to achieve
While multiple signals transmit, for the setting of MUX_Unit, can be according to practical situation depending on, at this
Do not limit.
In the above-mentioned array base palte that the embodiment of the present invention provides, due to gate driver circuit and source drive electricity
Road is respectively positioned in the same frame region of array base palte, and gate driver circuit is depended on to each grid line by metal routing
Secondary loading gated sweep signal, it is achieved the driving line by line to grid line, source electrode drive circuit directly adds to data wire
Carry grayscale signal, screen accounting so can be greatly improved, it is achieved the narrowest frame even Rimless on other three limits,
User is allowed to enjoy unprecedented visual experience and the visual effect being more pleasantly surprised.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, in order to prevent metal from walking
Line takies aperture opening ratio, and metal routing may be located at the lower section of grid line and data wire, so can be to opening
Rate impacts；Meanwhile, in order to reduce the resistance of cabling to greatest extent, as depicted in figs. 1 and 2, respectively
Grid line 1 is only electrically connected with corresponding metal routing 2 by via 3.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, due to raster data model electricity
Road loads gated sweep signal to each grid line, in order to prevent gated sweep signal sum successively by metal routing
Interfere according between the grayscale signal loaded on line, as in figure 2 it is shown, specifically, can be by metal routing
2 are set to be parallel to each other with data wire 4, and certainly, metal routing 2 and data wire 4 can also be arranged in a crossed manner,
But in order to avoid light leak, it is transparent conductive material that the material of metal routing must meet material, such as tin indium oxide,
Indium zinc oxide etc..For the bearing of trend of metal routing, can be according to practical situation depending on, do not limit at this
Fixed.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, in order to simplify making work
Skill, as in figure 2 it is shown, along the bearing of trend of data wire 4, each metal routing 2 can be the most respectively with corresponding
Grid line 1 be electrically connected with by via 3, i.e. Article 1 metal routing 2 and Article 1 grid line 1 passes through via
3 are electrically connected with, and Article 2 metal routing 2 is electrically connected with, with this type of by via 3 with Article 2 grid line 1
Pushing away, now, each via 3 is the most staggered.Arrangement mode for via can also be alternate manner,
Depending on can be according to practical situation, do not limit at this.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, as in figure 2 it is shown, battle array
Row substrate also includes: multiple pixel cells (showing 6*5 pixel cell in Fig. 2) arranged in arrays；
Adjacent two grid lines 1 and adjacent two data line 4 limit a pixel cell；Metal routing 2 is arranged on phase
The adjacent gap location between two row pixel cells, so can ensure that metal routing will not take the opening of pixel
Rate.Now the material of metal routing can be transparent conductive material, it is also possible to for opaque conductive material,
This does not limits.
It should be noted that as a example by Fig. 2, when the quantity of grid line is equal to the quantity of data wire, due to gold
The quantity belonging to cabling is identical with the quantity of grid line, then the quantity of metal routing is equal to the quantity of data wire, now
As long as the gap location between two the most adjacent row pixel cells is respectively provided with a metal routing；It addition,
When the quantity of grid line is more than the quantity of data wire, owing to the quantity of metal routing and the quantity of grid line are identical,
Then the quantity of metal routing is more than the quantity of data wire, now there will be between two adjacent row pixel cells
Gap location is provided with the situation of a plurality of metal routing；When the quantity of grid line is less than the quantity of data wire, due to
The quantity of metal routing is identical with the quantity of grid line, then the quantity of metal routing is less than the quantity of data wire, this
Time there will be the gap location between two adjacent row pixel cells and be not provided with the situation of metal routing.
Further, in the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, in order to
Make array base palte on the basis of can realizing the narrowest frame even Rimless on three limits, it is also possible to realize from electricity
Holding touch-control, as shown in Figure 3 and Figure 4, array base palte also includes: multiple touch-control self-capacitances arranged in arrays
Electrode 6, and go between 5 with the touch-control of each touch-control self-capacitance electrode 6 one_to_one corresponding and electric connection, respectively
Touch-control self-capacitance electrode 6 is connected with touch chip by corresponding touch-control lead-in wire 5；This touch chip and source electrode
Drive circuit may be located at same frame region；Touch-control self-capacitance electrode 6 is used as public electrode in the display stage,
It is used as touch-control self-capacitance electrode in the touch-control stage；Touch-control lead-in wire 5 is for transmitting to public electrode in the display stage
Common electrode signal, in the touch-control stage to touch-control self-capacitance electrodes transfer touch scanning signals, and be additionally operable to by
The touching signals occurring the touch-control self-capacitance electrode of touch position to produce is transferred to touch chip.
In the specific implementation, in the above-mentioned array base palte that the embodiment of the present invention provides, in order to ensure that touch-control draws
Line will not take the aperture opening ratio of pixel, as it is shown on figure 3, touch-control lead-in wire 5 can be arranged on two adjacent row pictures
Gap location (showing 6*2 pixel cell in Fig. 3) between element unit.Touch-control lead-in wire can also be with number
Being parallel to each other according to line, equally, touch-control lead-in wire can also be arranged on the lower section of data wire and the most exhausted with data wire
Edge.For touch-control lead-in wire and the position relationship of data wire, can be according to practical situation depending on, do not limit at this
Fixed.
It should be noted that as a example by Fig. 3, when the quantity of grid line is less than the quantity of data wire, due to gold
The quantity belonging to cabling is identical with the quantity of grid line, then the quantity of metal routing is less than the quantity of data wire, now
The gap location that there will be between two adjacent row pixel cells is not provided with metal routing, and is provided with touch-control
The situation of lead-in wire, so can simplify Wiring technique, prevent from taking aperture opening ratio；It addition, in the quantity of grid line
During equal to the quantity of data wire, owing to the quantity of metal routing and the quantity of grid line are identical, then metal routing
Quantity is equal to the quantity of data wire, and the gap location that now there will be between two adjacent row pixel cells was both arranged
There is metal routing, have the situation being provided with touch-control lead-in wire；When the quantity of grid line is more than the quantity of data wire,
Owing to the quantity of metal routing and the quantity of grid line are identical, then the quantity of metal routing is more than the number of data wire
Amount, the gap location that now there will be between two adjacent row pixel cells is provided with a plurality of metal routing and touch-control
The situation of lead-in wire.
It should be noted that for touch-control lead-in wire and the position relationship of metal routing, carry in the embodiment of the present invention
In the above-mentioned array base palte of confession, could be arranged to touch-control lead-in wire with metal routing with layer arrange (it also will be understood that
For the same material of same layer), so, need not when preparing array base palte increase extra preparation section, only need
The figure of touch-control lead-in wire and metal routing can be formed, it is possible to simplify and make work by a patterning processes
Skill, saves preparation cost, improving product added value.
Based on same inventive concept, the embodiment of the present invention additionally provides the above-mentioned of a kind of embodiment of the present invention offer
The manufacture method of array base palte, owing to the principle of the method solution problem is similar to aforementioned a kind of array base palte,
Therefore the enforcement of the method may refer to the enforcement of array base palte, repeats no more in place of repetition.
In the specific implementation, the manufacture method of the array base palte that the embodiment of the present invention provides, as it is shown in figure 5,
Specifically include following steps:
S501, underlay substrate formed and intersects and put and a plurality of grid line of mutually insulated and a plurality of data lines
Figure, and formed and each grid line one_to_one corresponding and the figure of the metal routing of electric connection；
S502, form source electrode drive circuit and gate driver circuit in a frame region of array base palte；Source electrode
Each pin of drive circuit is directly electrically connected with each data wire；Each pin of gate driver circuit and each metal
Cabling is directly electrically connected with.
In the manufacture method of the above-mentioned array base palte provided in the embodiment of the present invention, due to gate driver circuit and
Source electrode drive circuit is both formed in the same frame region of array base palte, and gate driver circuit is walked by metal
The each grid line of alignment loads gated sweep signal successively, it is achieved the driving line by line to grid line, source electrode drive circuit is straight
Connect and load grayscale signal to data wire, screen accounting so can be greatly improved, it is achieved the narrowest limit on other three limits
Frame even Rimless, allows user enjoy unprecedented visual experience and the visual effect being more pleasantly surprised.
The making of the array base palte provided with a concrete example detailed description embodiment of the present invention below
Method (as a example by the film layer structure in the viewing area making array base palte), specifically comprises the following steps that
Step one, on underlay substrate formed include metal routing, barrier bed and touch-control lead-in wire figure；
In the specific implementation, as shown in Figure 6 a, by a patterning processes, utilize on underlay substrate 10
Metal level is formed and includes metal routing 11, barrier bed 12, the figure of touch-control lead-in wire 13；Wherein, block
Layer 12 is for being arranged on below grid to be formed, prevents light to be irradiated on grid；
Step 2, formed on the underlay substrate being formed with metal routing, barrier bed and touch-control lead-in wire figure slow
Rush layer (buffer)；
In the specific implementation, as shown in Figure 6 b, draw being formed with metal routing 11, barrier bed 12 and touch-control
Depositing one layer of cushion 14 on the underlay substrate of line 13 figure, this step is made without patterning processes；
Step 3, it is formed with the figure of active layer on the buffer layer；
In the specific implementation, as fig. 6 c, cushion 14 deposits one layer of active layer thin film, passes through
Patterning processes is formed with the figure of active layer 15；
Step 4, on the underlay substrate be formed with active layer pattern formed gate insulator, the first via and
The figure of the bottom etched portions of the second via；
In the specific implementation, as shown in fig 6d, on the underlay substrate 11 being formed with active layer 15 figure
Deposit one layer of gate insulator layer film, formed the figure of gate insulator 16 by patterning processes,
Region corresponding above metal routing 11 forms the figure of the first via, walks with metal with grid line to be formed
Line 11 is electrically connected with, and corresponding region forms the bottom etching of the second via above touch-control lead-in wire 13
The figure of part, with touch-control self-capacitance electrode to be formed and touch-control lead-in wire 13 electric connection；
Step 5, gate insulator is formed include the figure of grid line and grid；
In the specific implementation, as shown in fig 6e, gate insulator 16 deposits one layer of gate metal layer,
Grid line 17 and the figure of grid 18 is formed by a patterning processes；Wherein, grid line 17 is by the first mistake
Hole and touch-control lead-in wire 11 electric connection；
Step 6, on the underlay substrate being formed with grid line and gate patterns, form the first passivation layer, the second mistake
Hole and the figure of the 3rd via；
In the specific implementation, as shown in Figure 6 f, it is being formed with grid line 17 and the substrate base of grid 18 figure
Deposit one layer of passivation layer thin film on plate 11, formed the figure of the first passivation layer 19 by first time patterning processes,
Region corresponding above active layer 15 forms the figure of the 3rd via, with source electrode to be formed, drain electrode with
Active layer 15 is electrically connected with, and corresponding region forms the second complete via above touch-control lead-in wire 13
Figure；
Step 7, the first passivation layer is formed include the figure of source electrode, drain electrode and metal level；
In the specific implementation, as shown in figure 6g, the first passivation layer 19 deposits one layer of source-drain electrode metal level
Thin film, forms source electrode and the figure of drain electrode 20 by a patterning processes, and to be formed for connecting
The figure of the metal level 21 of touch-control self-capacitance electrode and touch-control lead-in wire；
Step 8, on the underlay substrate being formed with source electrode, drain electrode and metal layer image, form the second passivation layer
Figure, the 4th via and the figure of the 5th via；
In the specific implementation, as shown in figure 6h, it is being formed with source electrode, drain electrode 20 and metal level 21 figure
Underlay substrate 11 on deposit one layer of passivation layer thin film, form the second passivation layer 22 by a patterning processes
Figure, region corresponding above source electrode and drain electrode 20 forms the figure of the 4th via, and at metal
Region corresponding above layer 21 forms the figure of the 5th via；
Step 9, on the second passivation layer formed touch-control self-capacitance electrode figure；
In the specific implementation, as shown in Fig. 6 i, the figure of the second passivation layer deposits layer of transparent conductive thin
Film, by the figure of a patterning processes formation touch-control self-capacitance electrode 23；Touch-control self-capacitance electrode 23 leads to
Cross the 5th via and metal level 21 can be electrical connected with touch-control lead-in wire 13；Touch-control self-capacitance electrode 23 exists
The display stage is used as public electrode, is used as touch-control self-capacitance electrode in the touch-control stage；
Step 10, on the underlay substrate being formed with touch-control self-capacitance electrode formed the 3rd passivation layer figure；
In the specific implementation, as shown in Fig. 6 j, on the underlay substrate being formed with touch-control self-capacitance electrode 23
Deposit one layer of passivation layer thin film, by the figure of patterning processes formation the 3rd passivation layer 24；
Step 11, on the 3rd passivation layer, form the figure of pixel electrode；
In the specific implementation, as shown in Fig. 6 k, the 3rd passivation layer deposits one layer of electrode layer, by one
Secondary patterning processes forms the figure of pixel electrode 25；Pixel electrode 25 can be with drain electrode 20 by the 4th via
It is electrical connected.
So far, it is real that above-mentioned steps one to the step 11 provided through instantiation has produced the present invention
Executing the above-mentioned array base palte that example provides, the processing technology that the present invention provides has carried out ten patterning processes, phase altogether
Ratio merely add a patterning processes in prior art.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of touch-control display panel, including this
The above-mentioned array base palte that bright embodiment provides.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display device, real including the present invention
Executing above-mentioned array base palte or above-mentioned touch-control display panel that example provides, this display device can be: mobile phone, flat
Plate computer, television set, display, notebook computer, DPF, navigator etc. are any has display merit
The product of energy or parts.Other requisite ingredient for this display device is the general of this area
Logical skilled artisans appreciated that has, and does not repeats at this, also should not be taken as limiting the invention.Should
The enforcement of display device may refer to the embodiment of above-mentioned array base palte, repeats no more in place of repetition.
A kind of array base palte, its manufacture method, touch-control display panel and the display dress that the embodiment of the present invention provides
Put, including underlay substrate, the intersection that is arranged on underlay substrate and put and a plurality of grid line of mutually insulated and
A plurality of data lines, and it is positioned at the source electrode drive circuit of a frame region of array base palte；Source electrode drive circuit
Each pin be directly electrically connected with each data wire；Also include: be positioned at same rim area with source electrode drive circuit
The gate driver circuit in territory, and with each grid line one_to_one corresponding and the metal routing of electric connection；Raster data model
Each pin of circuit is directly electrically connected with each metal routing.Due to gate driver circuit and source electrode drive circuit
Being respectively positioned in the same frame region of array base palte, gate driver circuit passes through metal routing successively to each grid line
Loading gated sweep signal, source electrode drive circuit directly loads grayscale signal to each data wire, so can be big
Width improves screen accounting, it is achieved the narrowest frame even Rimless on other three limits, allows user enjoy unprecedented
Visual experience and the visual effect that is more pleasantly surprised.
Obviously, those skilled in the art can carry out various change and modification without deviating from this to the present invention
Bright spirit and scope.So, if the present invention these amendment and modification belong to the claims in the present invention and
Within the scope of its equivalent technologies, then the present invention is also intended to comprise these change and modification.
Claims (10)
1. an array base palte, including: underlay substrate, it is arranged on the intersection on described underlay substrate and puts
And a plurality of grid line of mutually insulated and a plurality of data lines, and be positioned at a frame region of described array base palte
Source electrode drive circuit；Each pin of described source electrode drive circuit is directly electrically connected with each described data wire；Its
It is characterised by, also includes:
With the gate driver circuit that described source electrode drive circuit is positioned at same frame region, and with each described grid
Line one_to_one corresponding and the metal routing of electric connection；
Each pin of described gate driver circuit is directly electrically connected with each described metal routing.
2. array base palte as claimed in claim 1, it is characterised in that described metal routing is positioned at described
Grid line and the lower section of described data wire；
Each described grid line is electrically connected with corresponding described metal routing by via.
3. array base palte as claimed in claim 2, it is characterised in that described metal routing and described number
It is parallel to each other according to line.
4. array base palte as claimed in claim 3, it is characterised in that along the extension side of described data wire
To, each described via is the most staggered.
5. array base palte as claimed in claim 1, it is characterised in that also include: arranged in arrays
Multiple pixel cells；Adjacent two described grid lines and adjacent two data line limit a pixel cell；
Described metal routing is arranged on the gap location between the two adjacent described pixel cells of row.
6. array base palte as claimed in claim 5, it is characterised in that also include: arranged in arrays
Multiple touch-control self-capacitance electrodes, and with each described touch-control self-capacitance electrode one_to_one corresponding and electric connection
Touch-control goes between, and each described touch-control self-capacitance electrode is connected with touch chip by corresponding touch-control lead-in wire；Described
Touch chip and described source electrode drive circuit are positioned at same frame region；
Described touch-control self-capacitance electrode is used as public electrode in the display stage, is used as touch-control from electricity in the touch-control stage
Hold electrode；
Described touch-control lead-in wire is for transmitting common electrode signal in the display stage to described public electrode, at touch-control
Stage is to described touch-control self-capacitance electrodes transfer touch scanning signals, and is additionally operable to touch position to occur
The touching signals that touch-control self-capacitance electrode produces is transferred to touch chip.
7. array base palte as claimed in claim 6, it is characterised in that described touch-control lead-in wire is arranged on phase
The adjacent gap location between the two described pixel cells of row.
8. the manufacture method of array base palte as described in any one of claim 1-7, it is characterised in that
Including:
Underlay substrate is formed and intersects and put and a plurality of grid line of mutually insulated and the figure of a plurality of data lines,
And formed and each described grid line one_to_one corresponding and the figure of the metal routing of electric connection；
A frame region at described array base palte forms source electrode drive circuit and gate driver circuit；Described source
Each pin of pole drive circuit is directly electrically connected with each described data wire；Respectively drawing of described gate driver circuit
Foot is directly electrically connected with each described metal routing.
9. a touch-control display panel, it is characterised in that include as described in any one of claim 1-7
Array base palte.
10. a display device, it is characterised in that include the array as described in any one of claim 1-5
Substrate or touch-control display panel as claimed in claim 9.
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| CN108206197A (en) * | 2016-12-20 | 2018-06-26 | 财团法人工业技术研究院 | display pixel array structure with sensing function |
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