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CN105845785B - A kind of method for preparing crystal silicon nanostructured anti-reflection layer - Google Patents

A kind of method for preparing crystal silicon nanostructured anti-reflection layer Download PDF

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CN105845785B
CN105845785B CN201610460217.XA CN201610460217A CN105845785B CN 105845785 B CN105845785 B CN 105845785B CN 201610460217 A CN201610460217 A CN 201610460217A CN 105845785 B CN105845785 B CN 105845785B
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reflection layer
silicon substrate
galvanic corrosion
crystalline silicon
resistivity
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CN105845785A (en
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赵世华
李朋
胡宏伟
李立强
姜龙
刘泉林
陈文聪
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Shangqiu Normal University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • H10F71/121The active layers comprising only Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/70Surface textures, e.g. pyramid structures
    • H10F77/703Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

本发明了提出一种在通电条件下对硅衬底进行化学腐蚀制备减反射层的方法。本发明的方法可以方便地在低电阻率的p型硅衬底上制备晶硅减反射层,制备成本低。利用本发明方法所获的减反射层尺寸结构较大,减反射效果明显,表面复合较小,与现有工业化生产工艺兼容性较好,制成太阳电池以后,其电池片的转换效率可提高0.2%左右。

The invention proposes a method for preparing an anti-reflection layer by chemically etching a silicon substrate under the condition of energization. The method of the invention can conveniently prepare the crystalline silicon anti-reflection layer on the p-type silicon substrate with low resistivity, and the preparation cost is low. The size and structure of the anti-reflection layer obtained by the method of the present invention is relatively large, the anti-reflection effect is obvious, the surface composite is small, and the compatibility with the existing industrial production process is good. After the solar cell is made, the conversion efficiency of the cell can be improved About 0.2%.

Description

一种制备晶硅纳米结构减反射层的方法A method for preparing crystalline silicon nanostructure anti-reflection layer

技术领域technical field

本发明涉及半导体领域,特别涉及制备晶硅纳米结构减反射层的方法。The invention relates to the field of semiconductors, in particular to a method for preparing a crystalline silicon nanostructure anti-reflection layer.

背景技术Background technique

目前,在太阳电池的生产工艺中,硅片表面的绒面结构可以有效地降低太阳电池的表面反射率,是影响太阳电池光电转换效率的重要因素之一。为了在晶体硅太阳能电池表面获得好的绒面结构,以达到较好的减反射效果,人们尝试了许多方法,常用的包括机械刻槽法、激光刻蚀法、反应离子刻蚀法(RIE)、化学腐蚀法(即湿法腐蚀)等。其中,机械刻槽方法可以得到较低的表面反射率,但是该方法造成硅片表面的机械损伤比较严重,而且其成品率相对较低,故而在工业生产中使用较少。对于激光刻蚀法,是用激光制作不同的刻槽花样,条纹状和倒金字塔形状的表面都已经被制作出来,其反射率可以低至8.3%,但是由其制得的电池的效率都比较低,不能有效地用于生产。RIE方法可以利用不同的模版来进行刻蚀,刻蚀一般是干法刻蚀,可以在硅片表面形成所谓的“黑硅”结构,其反射率可以低至7.9%,甚至可以达到4%,但是由于设备昂贵,生产成本较高,因此在工业成产中使用较少。而化学腐蚀法具有工艺简单、廉价优质、现有工艺好兼容等特点,成为了现有工业中使用最多的方法,但采用常规碱制绒所获得的绒面的反射率通常在10%以上,仍有进一步降低的空间。At present, in the production process of solar cells, the textured structure on the surface of silicon wafers can effectively reduce the surface reflectance of solar cells, which is one of the important factors affecting the photoelectric conversion efficiency of solar cells. In order to obtain a good textured structure on the surface of crystalline silicon solar cells to achieve a better anti-reflection effect, many methods have been tried, including mechanical grooving, laser etching, and reactive ion etching (RIE). , chemical etching (ie wet etching), etc. Among them, the mechanical groove method can obtain lower surface reflectivity, but this method causes serious mechanical damage to the surface of the silicon wafer, and its yield is relatively low, so it is rarely used in industrial production. For the laser etching method, lasers are used to make different groove patterns. Striped and inverted pyramid-shaped surfaces have been produced. The reflectivity can be as low as 8.3%, but the efficiency of the cells made by it is relatively high. Low and cannot be effectively used in production. The RIE method can use different templates for etching. The etching is generally dry etching, and the so-called "black silicon" structure can be formed on the surface of the silicon wafer, and its reflectivity can be as low as 7.9%, or even 4%. However, due to expensive equipment and high production costs, it is less used in industrial production. The chemical etching method has the characteristics of simple process, low cost and high quality, and good compatibility with existing processes, and has become the most used method in the existing industry. However, the reflectivity of the suede surface obtained by conventional alkali texturing is usually above 10%. There is still room for further reduction.

发明内容Contents of the invention

本发明的目的是为克服现有化学腐蚀技术在硅衬底上制备缺点,提出一种在通电条件下对硅衬底进行化学腐蚀制备减反射层的方法。本发明的方法可以方便的在低电阻率的p型硅衬底上制备晶硅纳米结构减反射层,制备成本低。The purpose of the present invention is to overcome the shortcomings of the existing chemical etching technology on the silicon substrate, and propose a method for preparing the anti-reflection layer by chemically etching the silicon substrate under the condition of energization. The method of the invention can conveniently prepare the crystalline silicon nanostructure anti-reflection layer on the p-type silicon substrate with low resistivity, and the preparation cost is low.

本发明的的制备方法如下:The preparation method of the present invention is as follows:

选择低电阻率的p型硅衬底,将其浸入在含有氧化剂以及银离子的溶液中进行通电腐蚀,通过调节各步工艺参数,获得微观机构百纳米到微米量级的晶硅纳米结构减反射层;Select a low-resistivity p-type silicon substrate, immerse it in a solution containing oxidants and silver ions for galvanic corrosion, and adjust the process parameters of each step to obtain anti-reflection of crystalline silicon nanostructures with a microstructure of hundreds of nanometers to microns Floor;

具体的,所述的低电阻率指所述的p型硅衬底的电阻率小于5Ω·cm。所述腐蚀溶液中含有氢氟酸,硝酸银,双氧水以及去离子水,其浓度分别为HF=0.5mol/L,AgNO3=1*10-4mol/L,H2O2=3mol/L。上述各种溶液的配比可以根据所希望获得的减反结构的大小进行调整Specifically, the low resistivity means that the resistivity of the p-type silicon substrate is less than 5Ω·cm. The corrosion solution contains hydrofluoric acid, silver nitrate, hydrogen peroxide and deionized water, the concentrations of which are respectively HF=0.5mol/L, AgNO 3 =1*10 -4 mol/L, H 2 O 2 =3mol/L . The ratio of the above various solutions can be adjusted according to the size of the desired anti-reflection structure

所述的制备晶硅纳米结构减反射层的方法,其特征在于所述的通电腐蚀是在晶硅正表面施加均匀的电场,晶硅背表面不接触上述的腐蚀液,通电腐蚀的电流密度为30mA/cm2,通电腐蚀的时间为30分钟。上述通电的电流大小以及腐蚀时间,亦可根据所希望获得的减反结构的尺寸以及深度进行调整。The method for preparing the crystalline silicon nanostructure anti-reflection layer is characterized in that the galvanic corrosion is to apply a uniform electric field on the front surface of the crystalline silicon, the back surface of the crystalline silicon does not contact the above-mentioned etching solution, and the current density of the galvanic corrosion is: 30mA/cm 2 , the galvanic corrosion time is 30 minutes. The size and corrosion time of the aforementioned energized current can also be adjusted according to the desired size and depth of the anti-reflection structure.

通过本发明的方法,在低电阻率的p型硅衬底上可获得的较为规则的硅孔,该硅孔为上方大下方小倒金字塔结构,并具有很好的陷光效果,这是外加电场和金属颗粒催化协同作用的结果。如果只有外加电场进行通电腐蚀,则只能低电阻率的硅衬底表面上形成多孔硅,硅孔尺寸小,深度浅,减反射效果不佳。如果只有金属颗粒催化在腐蚀液中进行腐蚀,而没有外加电场,则只能在这样的硅衬底表面上硅纳米线,减反射效果好,但表面复合严重,不利于太阳电池的制备。本发明在通电腐蚀的腐蚀液中加入少量的银离子,在反应过程中银离子不断地在腐蚀后的多孔硅表面成核析出,进而形成多个微小电极催化腐蚀反应的进行,由此形成较好的减反结构,其反射率在10%以下。利用本发明方法所获的减反层尺寸结构较大,减反效果明显,表面复合较小,与现有工业化生产工艺兼容性较好,制成太阳电池以后,其电池片的转换效率可提高0.2%左右。所以,本发明提供了一种在低电阻率的p型硅衬底上获得晶硅纳米结构减反射层的有效方法。Through the method of the present invention, relatively regular silicon holes can be obtained on the p-type silicon substrate with low resistivity. The silicon holes have a large inverted pyramid structure at the top and a small bottom at the bottom, and have a good light-trapping effect. This is an additional The result of the synergistic effect of electric field and metal particle catalysis. If only an external electric field is used for galvanic corrosion, porous silicon can only be formed on the surface of the silicon substrate with low resistivity, the silicon pores are small in size and shallow in depth, and the anti-reflection effect is not good. If only the metal particles are catalyzed to corrode in the corrosion solution without an external electric field, silicon nanowires can only be placed on the surface of such a silicon substrate, which has good anti-reflection effect, but the surface recombination is serious, which is not conducive to the preparation of solar cells. In the present invention, a small amount of silver ions are added to the corrosion solution for galvanic corrosion. During the reaction process, the silver ions are continuously nucleated and precipitated on the surface of the corroded porous silicon, and then a plurality of tiny electrodes are formed to catalyze the corrosion reaction, thereby forming a better The anti-reflection structure has a reflectivity below 10%. The anti-reflection layer obtained by the method of the present invention has a large size and structure, obvious anti-reflection effect, small surface recombination, and good compatibility with the existing industrial production process. After the solar cell is made, the conversion efficiency of the cell can be improved About 0.2%. Therefore, the present invention provides an effective method for obtaining a crystalline silicon nanostructure anti-reflection layer on a low-resistivity p-type silicon substrate.

附图说明Description of drawings

图1为本发明实施例制备出减反射层结构的的正面SEM图,图2为本发明实施例制备出的减反射层的截面SEM图,图3为本发明实施例与仅进行通电腐蚀(腐蚀液中不含银离子)的反射光谱对比图。Fig. 1 is the front SEM figure of the anti-reflection layer structure prepared by the embodiment of the present invention, Fig. 2 is the cross-sectional SEM figure of the anti-reflection layer prepared by the embodiment of the present invention, Fig. 3 is the embodiment of the present invention and only galvanic corrosion ( Corrosion solution does not contain silver ions) reflectance spectrum comparison chart.

具体实施方式detailed description

下面结合附图与具体实施方式对本技术方案进一步说明如下:Below in conjunction with accompanying drawing and specific embodiment the technical scheme is further described as follows:

选择低电阻率的p型硅衬底,将其浸入在含有氧化剂以及银离子的溶液中进行通电腐蚀,具体的,所述的低电阻率指所述的p型硅衬底的电阻率小于5Ω·cm。所述腐蚀溶液中含有氢氟酸,硝酸银,双氧水以及去离子水,其浓度分别为HF=0.5mol/L,AgNO3=1*10- 4mol/L,H2O2=3mol/L。所述的通电腐蚀是在晶硅正表面施加均匀的电场,晶硅背表面不接触上述的腐蚀液,通电腐蚀的电流密度为30mA/cm2,通电腐蚀的时间为30分钟。所制得的减反射层反射率在全可见光波段的反射率均低于10%,在短波长段与长波长段反射率更低。图3是样品在300-1200nm波长下测试得到的反射率,从该图中可以看出,本发明实施例与仅进行通电腐蚀(腐蚀液中不含银离子)的反射光谱对比,在全波长段反射率明显降低。用传统方法将其制成太阳电池以后,其电池片的转换效率可提高0.2%左右。Select a p-type silicon substrate with low resistivity, and immerse it in a solution containing oxidant and silver ions for galvanic corrosion. Specifically, the low resistivity means that the resistivity of the p-type silicon substrate is less than 5Ω cm. The corrosion solution contains hydrofluoric acid, silver nitrate, hydrogen peroxide and deionized water, the concentrations of which are respectively HF=0.5mol/L, AgNO 3 =1*10 - 4 mol/L, H 2 O 2 =3mol/L . The galvanic corrosion is to apply a uniform electric field on the front surface of the crystalline silicon, the back surface of the crystalline silicon is not in contact with the above-mentioned etching solution, the current density of the galvanic corrosion is 30mA/cm 2 , and the time of the galvanic corrosion is 30 minutes. The reflectance of the prepared anti-reflection layer is lower than 10% in all visible light bands, and the reflectance in short wavelength bands and long wavelength bands is even lower. Fig. 3 is the reflectance that the sample is tested under the wavelength of 300-1200nm, as can be seen from this figure, the embodiment of the present invention compares with the reflectance spectrum that only carries out electrification corrosion (does not contain silver ion in the corrosion solution), at full wavelength The segmental reflectance is significantly reduced. After it is made into a solar cell by the traditional method, the conversion efficiency of the cell sheet can be increased by about 0.2%.

Claims (1)

1.一种制备晶硅纳米结构减反射层的方法,其特征在于,选择低电阻率的p型硅衬底,将其浸入在含有氧化剂以及银离子的溶液中进行通电腐蚀,通过调节各步工艺参数,获得微观结构为百纳米到微米量级的晶硅纳米结构减反射层;其中,所述的低电阻率指所述的p型硅衬底的电阻率小于5Ω·cm,所述腐蚀溶液中含有氢氟酸,硝酸银,双氧水以及去离子水,其浓度分别为HF=0.5mol/L,AgNO3=1*10-4mol/L,H2O2=3mol/L;1. A method for preparing crystalline silicon nanostructure anti-reflection layer, is characterized in that, selects the p-type silicon substrate of low resistivity, immerses it in the solution that contains oxidizer and silver ion and carries out galvanic corrosion, by adjusting each step Process parameters, to obtain a crystalline silicon nanostructure anti-reflection layer with a microstructure of hundreds of nanometers to microns; wherein, the low resistivity means that the resistivity of the p-type silicon substrate is less than 5Ω·cm, and the corrosion The solution contains hydrofluoric acid, silver nitrate, hydrogen peroxide and deionized water, the concentrations of which are HF=0.5mol/L, AgNO 3 =1*10-4mol/L, H 2 O 2 =3mol/L; 所述的通电腐蚀是在晶硅正表面施加均匀的电场,晶硅背表面不接触所述的腐蚀溶液,通电腐蚀的电流密度为30mA/cm2,通电腐蚀的时间为30分钟,通过该方法,在低电阻率的p型硅衬底上获得规则的硅孔,该硅孔为上方大下方小倒金字塔结构。The galvanic corrosion is to apply a uniform electric field on the front surface of the crystalline silicon, the back surface of the crystalline silicon is not in contact with the etching solution, the current density of the galvanic corrosion is 30mA/cm 2 , and the time of the galvanic corrosion is 30 minutes. By this method , Obtain regular silicon holes on a low-resistivity p-type silicon substrate, and the silicon holes have an inverted pyramid structure with a large upper part and a smaller lower part.
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