CN105656619B - A kind of AES encryption method and the anti-power consumption attack method based on it - Google Patents
A kind of AES encryption method and the anti-power consumption attack method based on it Download PDFInfo
- Publication number
- CN105656619B CN105656619B CN201610074012.8A CN201610074012A CN105656619B CN 105656619 B CN105656619 B CN 105656619B CN 201610074012 A CN201610074012 A CN 201610074012A CN 105656619 B CN105656619 B CN 105656619B
- Authority
- CN
- China
- Prior art keywords
- data
- power consumption
- box
- encryption method
- exclusive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1441—Countermeasures against malicious traffic
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Storage Device Security (AREA)
Abstract
The invention discloses a kind of AES encryption method and based on its anti-power consumption attack method, AES encryption method includes: to be grouped to clear data；The input of round function and the key of extension are subjected to xor operation；Data replacement is carried out using the S box of 8 inputs, 32 outputs；It is shifted by 32 data that S box exports；Xor operation is performed in accordance with to 32 data of row shifting function output；Exclusive or is carried out to expanded keys；Data replacement is carried out using the S box of 8 inputs, 8 outputs；Exclusive or is carried out with expanded keys；Export ciphertext data.The present invention has the advantage that each main required operation of operation is only tabled look-up, shifted and exclusive or in encryption method, this is relatively simple and efficient in logic realization.Anti- power consumption attack method is obscured with column, and anti-power consumption attack effect is good.
Description
Technical field
The present invention relates to field of information security technology, and in particular to a kind of AES encryption method and is attacked based on its anti-power consumption
Hit method.
Background technique
With information-based development, information security issue is also more and more important, and people propose various in this process
Different cryptographic algorithms, in this numerous cryptographic algorithm, AES (Advanced Encryption Standard, superencipherment
Standard) widely the whole world use and have become an international symmetric encipherment algorithm, it is short, clever with its key settling time
The advantages such as sensitivity is high, request memory is low, are widely used in information security field, such as e-commerce and communication encryption.
As people carry out aes algorithm the analysis of various different levels, occur much cracking the attack of aes algorithm
Mode, in numerous attack patterns, power consumption attack executes the relationship between power consumption by analysis cryptographic algorithm, to using this
Key inside the crypto chip of algorithm carries out mathematical analysis analysis, such as simple power consumption analysis (SPA) and differential power consumption analysis
(DPA) etc., and key is finally obtained, to cause very big threat to the safety of crypto chip.
In the realization of traditional AES encryption algorithm, main arithmetic operation can be divided into " S box transformation, row transformation, column obscure, with
This four steps of the exclusive or of expanded keys ", many scholars propose the defence plan of the various anti-power consumption attacks of difference on this basis
Slightly.The present invention is directed to a kind of improved AES implementation, and it is mixed that this implementation simplifies column complicated during AES is realized
Confuse operation, and proposes a kind of method of anti-power consumption attack, Hamming weight of this method based on power consumption in conjunction with the implementation
Model theory enables the power consumption information of operation on chip to hide, and reach by the complementary operation in algorithm level come balance power consumption
To the purpose of anti-power consumption attack.
It is existing that Fig. 1 illustrates the realization process of AES-128 algorithm by taking AES-128 as an example, during this realization,
Using byte as basic operation unit, need " transformation of S box, row transformation, column obscure and the exclusive or of expanded keys " as one
Round function circulate operation 10 times.Wherein, for all mathematical operations are both for the operation on the domain G (2^8).
Realize that there has been proposed various anti-power consumption attack methods, common are centering for this AES encryption
Between data carry out mask (masking) operation, this method by using random mask come with cryptographic calculation generate mediant
According to certain associative operation is carried out, it is randomized intermediate data；Or power-consumption balance circuit is used, so that operation power consumption keeps flat
It weighs and unrelated with the data of processing；Also there is the method by being inserted into random delay, the time point for allowing cryptographic operation to execute is uncertain.
A kind of improvement implementation of AES encryption can be by the FOUR EASY STEPS of simplified round function, so that in ciphering process
Complicated column do not obscure operation.This implementation only needs four exclusive or of four look-up tables, every wheel each column, and storage
The additional storage space of these data.
But the method for anti-power consumption attack is designed primarily directed to traditional AES implementation on existing AES, lacks needle
Obscured without column this, and the anti-power consumption attack strategy of more efficient encryption realization process.
Summary of the invention
The present invention is directed at least solve one of above-mentioned technical problem.
For this purpose, the first purpose of this invention is to propose a kind of AES encryption method.
Second object of the present invention is to propose a kind of anti-power consumption attack method based on AES encryption method.
To achieve the goals above, embodiment of the invention discloses a kind of AES encryption method, include the following steps: S1:
Clear data is grouped；S2: specifically include: S200: loop initialization number is 0；S201: by the input and expansion of round function
The key of exhibition carries out xor operation；S202: data replacement is carried out using the S box of N inputs, M outputs, wherein N and M are
Natural number, M > N and M is evenly divisible by N；S203: carrying out capable displacement by the M-bit data that the S box exports, and it is mixed to obtain grouping rectangular array
Confuse the data of one of operation column；S204: xor operation is performed in accordance with to the M-bit data of row shifting function output, obtains one
The output valve of secondary round function, cycle-index add 1；S205: judging whether current cycle time reaches preset times, if currently followed
Ring number reaches the preset times and then enters step S3, otherwise return step S201；S3: exclusive or is carried out to expanded keys；S4:
Data replacement is carried out using the S box of N inputs, P outputs, wherein P is natural number and P is evenly divisible by N；S5: with expanded keys into
Row exclusive or；S6: output ciphertext data.
AES encryption method according to an embodiment of the present invention, each main required operation of operation only tables look-up, shifts and different
Or, this is relatively simple and efficient in logic realization.
In addition, AES encryption method according to the above embodiment of the present invention, can also have the following additional technical features:
Further, 8 N, M is 32 and P is 8.
To achieve the goals above, embodiment of the invention discloses a kind of anti-power consumption attack based on AES encryption method
Method, comprising the following steps: SA: clear data is obtained；SB: by AES encryption method of any of claims 1 or 2 to described
Clear data is encrypted, and introduces a complementary operation during encrypting to the clear data so that encryption behaviour
Make the power consumption that generates and power consumption that the complementary operation generates and for an approximate constant, the complementary operation includes and extension
Anti- carry out exclusive or, the replacement of anti-S box data, the line position shifting of anti-data and the same or operation of key；SC: output ciphertext.
Additional aspect and advantage of the invention will be set forth in part in the description, and will partially become from the following description
Obviously, or practice through the invention is recognized.
Detailed description of the invention
Above-mentioned and/or additional aspect of the invention and advantage will become from the description of the embodiment in conjunction with the following figures
Obviously and it is readily appreciated that, in which:
Fig. 1 is that the AES-128 of the relevant technologies realizes the flow chart of process；
Fig. 2 is the flow chart of the AES encryption method of one embodiment of the invention；
Fig. 3 is the data Transformation Graphs of part operation in the AES encryption method of one embodiment of the invention；
Fig. 4 is that the anti-power consumption attack of the anti-power consumption attack method based on AES encryption method of one embodiment of the invention is real
Existing block diagram.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, and for explaining only the invention, and is not considered as limiting the invention.
In the description of the present invention, it is to be understood that, term " center ", " longitudinal direction ", " transverse direction ", "upper", "lower",
The orientation or positional relationship of the instructions such as "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside" is
It is based on the orientation or positional relationship shown in the drawings, is merely for convenience of description of the present invention and simplification of the description, rather than instruction or dark
Show that signified device or element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as pair
Limitation of the invention.In addition, term " first ", " second " are used for description purposes only, it is not understood to indicate or imply opposite
Importance.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
Connection inside two elements.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in invention.
Referring to following description and drawings, it will be clear that these and other aspects of the embodiment of the present invention.In these descriptions
In attached drawing, some particular implementations in the embodiment of the present invention are specifically disclosed, to indicate to implement implementation of the invention
Some modes of the principle of example, but it is to be understood that the scope of embodiments of the invention is not limited.On the contrary, of the invention
Embodiment includes all changes, modification and the equivalent fallen within the scope of the spirit and intension of attached claims.
AES encryption method according to an embodiment of the present invention is described below in conjunction with attached drawing.
Fig. 2 is the flow chart of the AES encryption method of one embodiment of the invention.Referring to FIG. 2, a kind of AES encryption method,
The following steps are included:
S1: clear data is grouped.
S2: specifically include: S200: loop initialization number is 0.
S201: the input of round function and the key of extension are subjected to xor operation.The step and the realization of original AES are complete
Equally, the input of round function and the key of extension are executed into 2 add operation of mould, shows as xor operation in logic.
S202: data replacement is carried out using the S box of N inputs, M outputs, wherein N and M is natural number, M > N and M
It is evenly divisible by N.In an example of the invention, N 8, M 32, i.e., by using 8 inputs, the improvement S of 32 output
Box executes byte replacement.This 32 outputs are during original AES encryption on the basis of 8 output datas of S box transformation, in advance
Obtained from setting.
S203: carrying out capable displacement by the M-bit data that S box exports, and obtains grouping rectangular array in original aes algorithm and obscures behaviour
The data for the column made.
S204: xor operation is performed in accordance with to the M-bit data of row shifting function output, obtains the output of a round function
Value, cycle-index add 1.Specifically, mould 2 plus (exclusive or) are performed in accordance with to 32 data of row shifting function output, it is final to obtain
To the output valve of a round function.
S205: judging whether current cycle time reaches preset times, if current cycle time reaches preset times
S3 is entered step, otherwise return step S201.
S3: exclusive or is carried out to expanded keys.
S4: data replacement is carried out using the S box of N inputs, P outputs, wherein P is natural number and P is evenly divisible by N.Its
In, P 8.
S5: exclusive or is carried out with expanded keys.
S6: output ciphertext data.
AES encryption method according to an embodiment of the present invention, each main required operation of operation only tables look-up, shifts and different
Or, this be in logic realization it is relatively simple and efficient, with traditional algorithm realize be a difference in that " transformation of improved S box,
These three operations of row displacement, 32 data exclusive or ".
Fig. 3 is the data Transformation Graphs of part operation in the AES encryption method of one embodiment of the invention, of the invention one
In a example, each Sxx represents a byte data in Fig. 3, and the coefficient before byte data represents in G (2^8) finite field
Multiplying (multiplied by the coefficient), "+" is addition (in logic be exclusive or) operation in G (2^8) finite field, { a, b, c, d }
Represent a, b, c, 32 data that this four byte datas of d are spliced into.
A kind of anti-power consumption attack side based on AES encryption method according to an embodiment of the present invention is described below with reference to attached drawing
Method.
Referring to FIG. 4, a kind of anti-power consumption attack method based on AES encryption method, comprising the following steps:
SA: clear data is obtained.
SB: the clear data is encrypted by above-mentioned AES encryption method, is added to the clear data
Complementary operation is introduced in close process so that the power consumption that the power consumption and the complementary operation that cryptographic operation generates generate
With for a constant, the complementary operation include with the anti-carry out exclusive or of expanded keys, the replacement of anti-S box data, anti-data row
Displacement and same or operation.
Specifically, in the AES encryption method of above-described embodiment, with the difference of input data, during calculating process generates
Between the Hamming weights of data have very big difference, by Hamming weight model it is found that corresponding operation power consumption difference also can be very bright
It is aobvious.Typical power consumption attack method (such as DPA), the power consumption profile generated when being by capturing different conjecture keys, utilizes fortune
The difference of power consumption is generated during calculating different intermediate data to be achieved.For this improvement aes algorithm proposed above
Realization, by cryptographic calculation implementation procedure simultaneously introduce a complementary operation.
Assume that certain operation can be considered that function F (x), the Hamming weight of generation are HW (F (x)) in ciphering process, accordingly
Power consumption are as follows:
P≈kHW(F(x))+d
At the same time, complementary operation carries out F ' (x) operation, and the Hamming weight of generation is by HW (F ' (x)) and F ' and F are done
Mode of operation it is approximate the same (namely following formula k is identical), corresponding power consumption are as follows:
P′≈kHW(F′(x))+d
The entire hardware power consumption of this process is L=L1+L ', as long as guaranteeing in this way:
HW (F (x))+HW (F ' (x))=C
Allow for complementary operation and normal cryptographic operation, the sum of power consumption of generation of both approximately constant, and with encryption
The intermediate data numerical value that operation generates is unrelated, this just conceals power consumption in calculating process and data information and realizes that anti-power consumption is attacked
The purpose hit.
In the complementary operation of balance power consumption, the operation that specifically needs to introduce are as follows: with the anti-carry out exclusive or of expanded keys, anti-
The replacement of S box byte, the row displacement of anti-data and same or operation.
Complementary operation one: the anti-carry out exclusive or with expanded keys.Expanded keys xor operation simultaneously, executes complementary operation
" the anti-carry out exclusive or with expanded keys ", the output of the two anti-data each other, then the sum of Hamming weight both by it is constant be one
A constant is achieved in power consumption approximate equilibrium.
Data x and key carry out exclusive or:
F1 (x)=x ⊕ k1
Complementary operation:
It can guarantee
HW (F1 (x)) ⊕ HW (F1 ' (x))=C1
Wherein, k1 is expanded keys, and C1 is constant.
Complementary operation two: anti-S box byte replacement.In the AES encryption method of above-described embodiment, improved S box replacement is 8
32 outputs of position input, this process realize that transforming function transformation function is denoted as F2 (x), then often through a matrix look-up table:
F2 (x)={ x ', x ', 3x ', 2x ' }
Take complementary operation that its output is made to be the anti-of normal encryption output:
Wherein, x ' represents the byte output that traditional byte input is converted by S box." { } " represent the spellings of data
It connects, equally can guarantee in this way:
HW (F2 (x))+HW (F2 ' (x))=C2
It is constant thus equally to realize Hamming weight, corresponding total power consumption approximately constant, and in encryption data
Between be worth it is unrelated.
Complementary operation three: the row displacement of anti-data.During executing row displacement, due to the output of upper level operation
In, in addition to a normal output, there are one the outputs of anti-data, introduce additional behaviour while shifting to data line as a result,
Make, i.e., identical row is executed to its anti-data and shifted, the sum of power consumption of the two also achieves balance under the model of Hamming weight.
Complementary operation four: same or operation.In the AES encryption method of above-described embodiment, 32 data exclusive or are for 4
Data carry out xor operation, and sequence is needed to execute exclusive or three times, while executing first time exclusive or, complementary operation execute it is same or
Operation, the input data of operation is identical as normal cryptographic operation input data, after while encrypt xor operation twice complementation grasp
Make also to be XOR operation, then introduces the resulting intermediate data of operation and useful encryption intermediate data is constantly in complementary relationship.
It is equally able to achieve constant Hamming weight, still has approximate operation power consumption constant, and it is unrelated with intermediate data.
In addition, other compositions of a kind of AES encryption method and the anti-power consumption attack method based on it of the embodiment of the present invention
And effect be all for a person skilled in the art it is known, in order to reduce redundancy, do not repeat them here.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not
Centainly refer to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be any
One or more embodiment or examples in can be combined in any suitable manner.
Although an embodiment of the present invention has been shown and described, it will be understood by those skilled in the art that: not
A variety of change, modification, replacement and modification can be carried out to these embodiments in the case where being detached from the principle of the present invention and objective, this
The range of invention is by claim and its equivalent limits.
Claims (3)
1. a kind of AES encryption method, which comprises the steps of:
S1: clear data is grouped；
S2: specifically include: S200: loop initialization number is 0；
S201: the input of round function and the key of extension are subjected to xor operation；
S202: N inputs, the S box progress data replacement of M output are used, wherein N and M is natural number, M > N and M is whole by N
It removes；
S203: carrying out capable displacement by the M-bit data that the S box exports, and obtains grouping rectangular array and obscures one of operation column
Data；
S204: lining up 4*4 matrix to the M-bit data of row shifting function output, and 4*4 matrix is divided into 4 groups, every group of 4 elements,
Exclusive or is carried out to every group of 4 element, obtains the output valve of a round function, cycle-index adds 1；
S205: judging whether current cycle time reaches preset times, if current cycle time reaches the preset times
S3 is entered step, otherwise return step S201；
S3: to current cycle time reach the round function that preset times last time obtains output valve and expanded keys into
Row exclusive or；
S4: data replacement is carried out using the S box of N inputs, P outputs, wherein P is natural number and P is evenly divisible by N；
S5: by the data and expanded keys exclusive or of the output of replaced S box；
S6: output ciphertext data.
2. AES encryption method according to claim 1, which is characterized in that N 8, M are 32 and P is 8.
3. a kind of anti-power consumption attack method based on AES encryption method, which comprises the following steps:
SA: clear data is obtained；
SB: the clear data is encrypted by AES encryption method of any of claims 1 or 2, to the plaintext number
A complementary operation is introduced during according to being encrypted so that the power consumption and the complementary operation that cryptographic operation generates generate
The sum of power consumption be approximately a constant, the complementary operation includes replacing with anti-carry out exclusive or, the anti-S box data of expanded keys
It changes, the line position of anti-data is moved and same or operation；
SC: output ciphertext.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610074012.8A CN105656619B (en) | 2016-02-02 | 2016-02-02 | A kind of AES encryption method and the anti-power consumption attack method based on it |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610074012.8A CN105656619B (en) | 2016-02-02 | 2016-02-02 | A kind of AES encryption method and the anti-power consumption attack method based on it |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105656619A CN105656619A (en) | 2016-06-08 |
| CN105656619B true CN105656619B (en) | 2019-02-26 |
Family
ID=56488268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610074012.8A Active CN105656619B (en) | 2016-02-02 | 2016-02-02 | A kind of AES encryption method and the anti-power consumption attack method based on it |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105656619B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106101096B (en) * | 2016-06-10 | 2022-06-28 | 北京数盾信息科技有限公司 | High-speed encryption module based on interface bus separation |
| CN106130712B (en) * | 2016-06-14 | 2019-09-06 | 刘雷波 | A kind of opportunistic infections fault-resistant attack method based on INS network |
| CN105871536B (en) * | 2016-06-14 | 2019-01-29 | 东南大学 | A kind of anti-power consumption attack method towards aes algorithm based on random delay |
| CN106506142B (en) * | 2016-11-22 | 2020-11-03 | 北京航空航天大学 | Method for realizing low-complexity AES (advanced encryption Standard) integrated encryption and decryption device |
| CN110071794B (en) * | 2019-04-28 | 2022-06-07 | 苏州国芯科技股份有限公司 | AES algorithm-based information encryption method, system and related components |
| CN110336658B (en) * | 2019-07-01 | 2023-03-21 | 武汉能钠智能装备技术股份有限公司 | Encryption method based on AES algorithm, user equipment, storage medium and device |
| CN111262684A (en) * | 2020-01-13 | 2020-06-09 | 燕山大学 | Power battery traceability management coding encryption method based on improved AES algorithm |
| CN111680329B (en) * | 2020-08-14 | 2020-11-10 | 成都中轨轨道设备有限公司 | Data processing method for improving data security |
| CN112396377A (en) * | 2020-11-20 | 2021-02-23 | 国网天津市电力公司 | Power equipment warehouse management and control system based on Internet of things |
| CN112765686A (en) * | 2021-01-06 | 2021-05-07 | 苏州裕太微电子有限公司 | Power consumption attack prevention framework and method for algorithm key in chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103916236A (en) * | 2014-04-25 | 2014-07-09 | 东南大学 | Power attack prevention method oriented at AES algorithm and circuit achieving method thereof |
| CN104065474A (en) * | 2014-07-14 | 2014-09-24 | 衡阳师范学院 | Novel low-resource efficient lightweight Surge block cipher implementation method |
| CN104301095A (en) * | 2014-10-13 | 2015-01-21 | 深圳中科讯联科技有限公司 | DES round operation method and circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5433498B2 (en) * | 2010-05-27 | 2014-03-05 | 株式会社東芝 | Cryptographic processing device |
-
2016
- 2016-02-02 CN CN201610074012.8A patent/CN105656619B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103916236A (en) * | 2014-04-25 | 2014-07-09 | 东南大学 | Power attack prevention method oriented at AES algorithm and circuit achieving method thereof |
| CN104065474A (en) * | 2014-07-14 | 2014-09-24 | 衡阳师范学院 | Novel low-resource efficient lightweight Surge block cipher implementation method |
| CN104301095A (en) * | 2014-10-13 | 2015-01-21 | 深圳中科讯联科技有限公司 | DES round operation method and circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105656619A (en) | 2016-06-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105656619B (en) | A kind of AES encryption method and the anti-power consumption attack method based on it | |
| CN103905462B (en) | Encryption processing device and method capable of defending differential power analysis attack | |
| US11507705B2 (en) | Determining cryptographic operation masks for improving resistance to external monitoring attacks | |
| CN108123791B (en) | A kind of implementation method and device of lightweight block cipher SCS | |
| Solak et al. | Cryptanalysis of a multi-chaotic systems based image cryptosystem | |
| CN108964872B (en) | Encryption method and device based on AES | |
| CN106301759B (en) | A kind of method of data encryption, the method and device of decryption | |
| CN103067155A (en) | Method and test circuit for preventing data encryption algorithm (DES) attack based on power analysis | |
| CN106130712B (en) | A kind of opportunistic infections fault-resistant attack method based on INS network | |
| CN103795527A (en) | Software mask defense scheme capable of preventing attack on advanced encryption standard (AES) algorithm based on power analysis | |
| CN102546157A (en) | Random mixed encryption system for resisting energy analysis and implementation method thereof | |
| CN103634102A (en) | Protection method for side channel attack and fault attack | |
| Liu et al. | Chaos-based color image encryption using one-time keys and Choquet fuzzy integral | |
| CN104410490B (en) | The method of non-linear extruding protection password S boxes | |
| CN104301095A (en) | DES round operation method and circuit | |
| CN104484615B (en) | Suitable for reconfigurable arrays framework based on space randomization fault-resistant attack method | |
| CN108650072A (en) | It is a kind of to support a variety of symmetric cryptographic algorithm chips and its anti-attack circuit implementation method | |
| CN101866401B (en) | Method for resisting side channel attacks by evolutive S boxes | |
| CN109936437B (en) | power consumption attack resisting method based on d +1 order mask | |
| CN114428979A (en) | Data processing method, device, equipment and system | |
| WO2017223509A1 (en) | Cryptographic operations employing non-linear share encoding for protecting from external monitoring attacks | |
| CN106411495B (en) | To the error injection attack method and device of public key encryption algorithm RSA | |
| CN105119595B (en) | BLAKE algorithms based on precharge type PUF circuits | |
| CN103051443A (en) | AES (Advanced Encryption Standard) key expansion method | |
| CN108768624A (en) | A kind of defence reverse-engineering encryption method based on Camellia algorithms |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |