CN105390091B - LED shows enable signal control system, LED display system and display drive method - Google Patents
LED shows enable signal control system, LED display system and display drive method Download PDFInfo
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- CN105390091B CN105390091B CN201510740997.9A CN201510740997A CN105390091B CN 105390091 B CN105390091 B CN 105390091B CN 201510740997 A CN201510740997 A CN 201510740997A CN 105390091 B CN105390091 B CN 105390091B
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Abstract
The present invention relates to the control system that a kind of LED shows enable signal.The present invention by show enable signal in high frequency show enable signal be added to low frequency show enable signal transmit together, greatly reduce the frequency of transmission, realize the form that similar carrier wave is used with the display enable signal of lower frequency, transmit the display enable signal of upper frequency, transmission frequency limitation is not influenceed between by LED display unit, the display data for being no more than the frequency signal transmission higher frequency (lower gray scale) that transmission frequency limits can be used between LED display unit, so as to improve the refresh rate of LED display system.Simultaneously, the high and low frequency being superimposed originally is shown that enable signal is separated using frequency dividing circuit, realize that high-frequency and low frequency show reduction of the enable signal inside LED display unit, can be in the maximum clock frequency of crystal oscillator used by LED display system, the enabled width of minimum output is arbitrarily adjusted out, realizes higher display refresh rates and tonal gradation.
Description
Technical field
The present invention relates to technical field of LED display, more particularly to a kind of LED to show that enable signal control system, LED are shown
System and display drive method.
Background technology
In LED display fields, pixel color bit wide is being improved constantly, it is necessary to which the data volume of transmission increased dramatically, with this
Meanwhile the requirement to refresh rate is also improving constantly, thus it requires improving the data transmission bauds inside LED display system, i.e.,
Improve the data volume transmitted in the unit interval.And it can be seen from LED shows driving principle, the minimum of LED display datas has
The width (the enabled width of minimum output) of display enable signal corresponding to effect position data is minimum in all display gray scales, and most
The small enabled width of display is smaller, and for the required display cycle number of each weight position with regard to smaller, the refresh rate of display system is higher.Cause
This, will improve refresh rate, it is necessary to reduce the enabled width of minimum display of LED display datas.It is however generally that LED is shown
The signal frequency of transmission can be stablized between unit no more than 20MHz, the enabled width of minimum output is smaller, and signal frequency will be got over
Height, therefore, the enabled width of minimum output for the LED display datas transmitted with traditional display enable signal transmission means can not be low
In 50ns.This has resulted in conflict, when transmitting LED display datas and display enable signal, to ensure transmission stability,
When can not be transmitted with too high frequency, and be driven display inside LED display unit, need higher display enabled again
The frequency of signal is to improve refresh rate.
The content of the invention
The technical problem to be solved by the invention is to provide a kind of LED to show enable signal control system, LED displays system
System and display drive method, show enable signal to be added in low frequency display enable signal high frequency and be transmitted, to improve LED
The frequency for the display enable signal transmitted between display unit.What the present invention was realized in：
A kind of LED shows enable signal control system, and for the display enable signal of transmitting display data, the display makes
Can in signal from the different pieces of information position of the display data corresponding to enable signal there are different frequencies；The control system bag
Include Signal averaging unit；The control system is before the display enable signal is exported, by the Signal averaging unit by institute
State the high frequency in display enable signal and show that enable signal is added in low frequency display enable signal.
Further, the Signal averaging unit includes counting clock；The Signal averaging unit also utilizes the counting
The width summation of clock all display enable signals of superposition needed for, count and produce a complete display enable signal.
Further, during superposition, it will show that enable signal is added to and higher had corresponding to the relatively low order of display data
Imitate in display enable signal corresponding to position.
Further, the low frequency shows enable signal for the enabled letter of display corresponding to the higher significance bit of display data
Number；The high frequency shows enable signal for display enable signal corresponding to the relatively low order of display data.
A kind of LED display system, including any one control system as described above and some LED display units；It is described
LED display unit includes display module and the drive circuit for driving the display module to show；The drive of each LED display unit
Dynamic circuits cascading, the display enable signal of the control system output can cascade biography between the drive circuit of each LED display unit
It is defeated；
The drive circuit includes triggering latch cicuit, frequency dividing circuit；Wherein：
The triggering latch cicuit is used for according to the clock signal that the control system is sent to the display enable signal
Triggering latch is carried out, generates enabled latch signal, and this is enabled into latch signal and is sent to the frequency dividing circuit；
The frequency dividing circuit is used to receive the display enable signal and enabled latch signal, and to the enabled letter of the display
Number and enabled latch signal carry out logical operation, the high frequency that is superimposed in the display enable signal is shown into enable signal and low
Frequency shows enable signal separation, and high frequency is shown into enable signal and low frequency show the display enable signal after enable signal separation
Corresponding display module is output to, to drive its display.
Further, the frequency dividing circuit includes：First caches with gate circuit, second with gate circuit, not circuit, first
Circuit, the second buffer circuit；
Described first accesses the display enable signal with the first input end of gate circuit, makes described in the access of the second input
Energy latch signal, output end connect the input of first buffer circuit；
Described second accesses the display enable signal with the first input end of gate circuit；
The input of the not circuit accesses the enabled latch signal, and output end connects described second and gate circuit
Second input；
Described second is connected the input of second buffer circuit with the output end of gate circuit.
Further, the triggering latch cicuit includes some triggers；Each trigger cascade.
A kind of LED display drive methods, shown for the display enable signal driving display module using display data, institute
State in display enable signal from the different pieces of information position of the display data corresponding to enable signal there are different frequencies, including such as
Lower step：
High frequency in the display enable signal is shown that enable signal is added to low frequency by display enable signal control system
The output display enable signal after showing in enable signal；
Trigger latch cicuit and receive the display enable signal, and the clock signal exported according to the control system is to institute
State display enable signal and carry out triggering latch, generate enabled latch signal；
Frequency dividing circuit receives the display enable signal and enabled latch signal, and to the display enable signal and enables
Latch signal carries out logical operation, and the high frequency display enable signal and low frequency that are superimposed in the display enable signal, which are shown, to be made
Can Signal separator, and it is aobvious that high frequency is shown into enable signal and low frequency show that the display enable signal after enable signal separation is output to
Show module, to drive its display.
Further, during superposition, it will show that enable signal is added to and higher had corresponding to the relatively low order of display data
Imitate in display enable signal corresponding to position.
Further, the low frequency shows enable signal for the enabled letter of display corresponding to the higher significance bit of display data
Number；The high frequency shows enable signal for display enable signal corresponding to the relatively low order of display data.
Compared with prior art, the high frequency shown in enable signal in the controls, is shown enable signal by the present invention
The low frequency that is added to shows that enable signal is transmitted together, greatly reduces the frequency of transmission, realize is made with the display of lower frequency
Energy signal uses the form of similar carrier wave, transmits the display enable signal of upper frequency, not transmitting pin between by LED display unit
The influence of rate limitation, it can be used between LED display unit and be no more than the frequency signal transmission higher frequency that transmission frequency limits
The display data of (lower gray scale), so as to improve the refresh rate of LED display system.Meanwhile the present invention will using frequency dividing circuit
Originally the high and low frequency being superimposed shows that enable signal is separated, and realizes that high-frequency and low frequency show that enable signal exists
Reduction inside LED display unit.Using the present invention, can in the maximum clock frequency of crystal oscillator used by LED display system,
The enabled width of minimum output is arbitrarily adjusted out, realizes higher display refresh rates and tonal gradation.
Brief description of the drawings
Fig. 1：LED provided by the invention shows enable signal control system working waveform figure；
Fig. 2：The composition schematic diagram of LED display system provided by the invention；
Fig. 3：Drive circuit composition and working principle schematic diagram in LED display system；
Fig. 4：Triggering latch cicuit structural representation in the drive circuit；
Fig. 5：Frequency dividing circuit structural representation in the drive circuit；
Fig. 6：LED display drive methods schematic flow sheet provided by the present invention.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.
The display data of one pixel includes some binary data bit, and all corresponding display of each data bit is enabled
There are different weights signal, different pieces of information position, that is, show display corresponding with the different pieces of information position of display data in enable signal
Enable signal has different effective high level (or low level) width, namely (this is defined herein as effectively with different frequencies
The inverse of width, same as below).When the width of display enable signal determines the display of corresponding data position corresponding to data bit
Between.The width of display enable signal determines the display cycle number required for the display for completing corresponding data position.Complete all numbers
Display cycle number sum required for being shown according to position just completes once the display cycle number required for complete display for the pixel.Respectively
In data bit, the width of display enable signal is most wide corresponding to highest significant position, completes the display week required for its display
Issue is most, and the width of display enable signal corresponding to secondary high significance bit is the enabled letter of display corresponding to highest significant position
The half of number width, by that analogy, the width of display enable signal is minimum corresponding to least significant bit.Display cycle is believed by clock
Number determine, be i.e. clock signal period, therefore, when the timing of clock frequency one, to improve refresh rate, must just reduce and complete pixel
The once display cycle number required for complete display.As can be seen here, the width of display enable signal is determined corresponding to least significant bit
Determine to complete display cycle number of the pixel completely required for display, that is, shown the time, it is corresponding by reducing least significant bit
The display width (dutycycle) of display enable signal pixel can be reduced on the whole complete once required for complete display
Time, so as to improve refresh rate.However, when the width that enable signal is shown corresponding to least significant bit reduces, its frequency
Accordingly improving, when the transmission frequency between its frequency exceedes LED display unit limits, its transmission stability will receive
Influence.
Based on above-mentioned analysis, to make the high frequency limited more than transmission frequency between LED display unit show enable signal
Stably it can be transmitted between LED display unit, the invention provides a kind of LED to show enable signal control system, for passing
The display enable signal of defeated display data.The control system includes Signal averaging unit, and control system enables in output display
Before signal, can by Signal averaging unit by show enable signal in high frequency show enable signal be added to low frequency show enable
In signal, the signal after being so superimposed shows that the frequency of enable signal is lower (cycle is longer) than former low frequency, so as to make high frequency
Display enable signal shows that enable signal is transmitted with low frequency, the drive circuit in LED display unit, then from superposed signal
In isolate high frequency and show that enable signal and low frequency show enable signal separation, be then delivered to display module and shown, so as to
The display enable signal that the transmission between LED display unit exceedes transmission frequency limitation between LED display unit is realized, is improved
Display refresh rates.
Compared with showing that enable signal has a higher frequency corresponding to low order, the enabled letter of display corresponding to higher significance bit
Number there is relatively low frequency.Therefore, during superposition, will be added to higher significance bit pair compared with enable signal is shown corresponding to low order
In the display enable signal answered.Can be shown according to corresponding to transmission frequency limitation between LED unit determines those data bit makes
Energy signal needs to be superimposed, and those need not.Show in enable signal, the display enable signal beyond frequency limit should be folded
Add, and the display enable signal not less than frequency limit can be overlapped or not be superimposed.Driven in general, being shown in LED
During, it is display enable signal corresponding to the least significant bit of display data to be easiest to beyond transmission frequency limitation, because
It has highest frequency.Therefore, in the specific implementation, only enable signal will can be shown corresponding to the relatively low order of display data
It is transmitted in display enable signal corresponding to the higher significance bit that is added to, this can also improve refresh rate and ash to a certain extent
Spend grade.I.e. foregoing low frequency shows enable signal for display enable signal, high frequency corresponding to the higher significance bit of display data
Show enable signal for display enable signal corresponding to the relatively low order of display data.
According to above-mentioned transmission control system operation principle, to send and enable signal is shown corresponding to two data bit, one
It is the display enable signal of lower frequency corresponding to higher gradation data, another is upper frequency corresponding to relatively low gradation data
Display enable signal, traditional method is, control system is to need individually, respectively to send two display enable signals, this
Sample, the display enable signal of upper frequency corresponding to low gradation data transmission frequency will be limited between LED display unit
System, it is impossible to realize that the high frequency of low gray scale shows the transmission of enable signal, the aobvious of output refresh rate and multi-stage grey scale will be substantially reduced
Show.
And the control system of the present invention provides a kind of LED and shows the generation of enable signal, overlaying function.Signal averaging list
Member includes counting clock, and Signal averaging unit is total using the width of counting clock all display enable signals of superposition needed for
With the complete display enable signal of counting generation one.As shown in figure 1, the display enable signal (LSB_OE) of upper frequency is wide
Spend for t4-t3, display enable signal (MSB_OE) width of lower frequency is t3-t1, so two displays being transmitted are enabled
Signal overall width is t4-t1.Utilize the inner high speed crystal oscillator clock CONTROLER CLK of control system, by counting, Ran Houzhi
The display enable signal (OUTPUT_ENABLE) that a raw width of practicing midwifery is t4-t1, so, is equivalent to just high frequency
Show enable signal (t4-t3), the display enable signal (t3-t1) for the low frequency that is added to, one low frequency of output, complete display
Enable signal OUTPUT_ENABLE, so, just complete the superposition generation of the display enable signal of low-and high-frequency.Simultaneously at this
Count, during superposition, what is utilized is the high speed crystal oscillator clock inside control system, can cause the enabled letter of display of high frequency
Number step-length be made very small, i.e., frequency is very high, so high refresh display to follow-up and lays a good foundation.
In Fig. 1, a concrete numerical value is lifted to illustrate relatively good understanding, such as (highest significant position output is enabled by MSB_OE
Signal) high level width be 1us (corresponding highest frequency be 1MHz), LSB_OE (least significant bit output enable signal) height
Level width is 10ns (corresponding highest frequency is 100MHz), it can be seen that directly transmitting LSB_OE, this is up to 100MHz's
Signal, transmission is impossible between LED display unit, if superposition two signals of MSB_OE, LSB_OE are a signal
OUTPUT_ENABLE, high level width are total up to 1.01us, and respective frequencies are 990Hz, even less than MSB_OE, so,
Being transmitted between LED display unit just becomes to be easy to.
To show as shown in Fig. 2 present invention also offers a kind of LED display system, including above-mentioned control system 1 and some LED
Show unit 2.LED display unit 2 includes display module 21 and the drive circuit 22 for driving display module 21 to show.Each LED
The drive circuit 22 of display unit 2 cascades, and the display enable signal that control system 1 exports can be in the driving of each LED display unit 2
22 cascaded transmissions of circuit.Each drive circuit 22 has a display enable signal input and display enable signal output end,
The display enable signal input of first drive circuit 22 is connected with the output end of control system 1, follow-up each drive circuit 22
Enable signal input be connected with the enable signal output end of a upper drive circuit 22, will be aobvious so as to form cascade connection
Show enable signal cascaded transmission to each drive circuit 22.
As shown in figure 3, drive circuit 22 includes triggering latch cicuit 221, frequency dividing circuit 222.Drive circuit 22 it is basic
Operation principle is that triggering latch cicuit 221 carries out triggering lock according to the clock signal that control system 1 is sent to display enable signal
Deposit, generate enabled latch signal, and this is enabled into latch signal and is sent to frequency dividing circuit 222.Then, frequency dividing circuit 222 receives
Enable signal and enabled latch signal are shown, and logical operation is carried out to display enable signal and enabled latch signal, should
The high frequency being superimposed in display enable signal shows enable signal and low frequency shows enable signal separation, and will by drive circuit 22
Display enable signal after separation is output to corresponding display module 21, to drive its display.
As shown in figure 4, triggering latch cicuit 221 includes some triggers 2211, each trigger 2211 cascades.Trigger
2211 can use rising edge flip-flops, be triggered by the rising edge of clock signal.Output OUTPUT_ENABLE_T as shown in Figure 1
The signal once obtained afterwards is latched for triggering, enabled latch signal enables latch signal and obtained after triggering latch twice
Signal.As shown in figure 1, the rising edge and trailing edge and the rising edge alignment of clock signal of enabled latch signal.Trigger 2211
Number according to delay latch needs depending on.
Frequency dividing circuit 222 is used to receive the display enable signal after being superimposed and enabled latch signal, and display is enabled
High frequency in signal shows that enable signal and low frequency show enable signal separation.As shown in figure 5, frequency dividing circuit 222 includes first
With gate circuit 2221, second and gate circuit 2222, not circuit 2225, the first buffer circuit 2223, the second buffer circuit 2224.
Its structure is, first shows enable signal with the first input end access of gate circuit 2221, and the access of the second input is enabled to latch
Signal, output end connect the input of the first buffer circuit 2223；Second is enabled with the first input end access display of gate circuit
Signal；The enabled latch signal of input access of not circuit 2225, the second of output end connection second and gate circuit 2222 are defeated
Enter end；Second is connected the input of the second buffer circuit 2224 with the output end of gate circuit 2222.
In the frequency dividing circuit 222, first with gate circuit 2221 will show enable signal and enabled latch signal carry out with
Computing：Show enable signal high level with enabled latch signal high level through with obtaining high level after operation；Show enable signal
High level is with enabled latch signal low level through with obtaining low level after operation；Show that enable signal low level is believed with enabled latch
Number high level after operation through with obtaining low level；Show enable signal low level and enabled latch signal low level through with after operation
Low level is obtained, enable signal LSB_OE is shown so as to isolate high frequency, is that low gray scale is shown corresponding to the high frequency enable signal
Data.Similarly, latch signal is enabled after inverse again with the progress of display enable signal and computing, is shown so as to isolate low frequency
Show enable signal MSB_OE, the low frequency shows that corresponding to enable signal be high gray scale display data.By taking Fig. 1 as an example, by that will show
Show that enable signal (i.e. superposed signal OUTPUT_ENABLE shown in Fig. 1) carries out above-mentioned computing with enabled latch signal OE_latch
Afterwards, will be isolated from superposed signal OUTPUT_ENABLE shown corresponding to the low order of high frequency enable signal LSB_OE and
Display enable signal MSB_OE corresponding to the high significance bit of low frequency.Everybody corresponding display enable signal after separation is buffered in phase
In the buffer circuit answered, for driving display module 21 to show.So, handled inside LED display unit by frequency dividing circuit,
The display enable signal of two height frequencies will be retrieved, high frequency can be especially recovered and show enable signal LSB_
It OE, no matter LSB_OE is 10ns or 100ns, can internally recover, substantially increase the low step-length of giving display module
Signal is shown, improves display refresh rates.
Drive display module 21 show when, according to the display module 21 often row cascade LED number and tonal gradation, every time
Display enable signal corresponding to the serial same data bit for being sent into a line LED, to drive row LED to show, while display,
According to the display time of the width control system of the enable signal data bit, after the display for completing the data bit, next number is re-fed into
According to the enable signal corresponding to position, by that analogy, after all data bit of the row complete display, that is, represent that row LED is completed
Once complete display, then controls next line LED display, realizes the scanning to display module 21 in the same way.
Present invention also offers a kind of LED display drive methods, and display is driven using the display enable signal of display data
Module is shown.As shown in fig. 6, the driving method comprises the following steps：
Step A：The high frequency display enable signal shown in enable signal is added to low by display enable signal control system
Frequency exports the display enable signal after showing in enable signal；
Step B：Trigger latch cicuit and receive display enable signal, and the clock signal pair exported according to the control system
Display enable signal carries out triggering latch, generates enabled latch signal；
Step C：Frequency dividing circuit, which receives, shows enable signal and enabled latch signal, and to display enable signal and enabled lock
Deposit signal and carry out logical operation, will show that the high frequency being superimposed in enable signal shows that enable signal and low frequency show enable signal
Separation, and high frequency is shown that enable signal and low frequency show that the display enable signal after enable signal separation is output to display mould
Block, to drive its display.
During superposition, it will show that enable signal is added to corresponding to higher significance bit corresponding to the relatively low order of display data
Show in enable signal, various combinations can be taken, for example, display enable signal is added to most corresponding to least significant bit
In display enable signal corresponding to high significance bit, time high significance bit that is added to of display enable signal corresponding to secondary low order is corresponding
Display enable signal in, by that analogy, etc..Be easiest to beyond transmission frequency limitation be display data least significant bit
Corresponding display enable signal, because it has highest frequency.Therefore, in the specific implementation, only the relatively low of display data is had
Display enable signal corresponding to effect position is added to, and be transmitted in display enable signal corresponding to higher significance bit also can be certain
Refresh rate and tonal gradation are improved in degree.Various height frequency enable signal stacked systems this patent narration scope it
It is interior.
The detailed schematic of each step refers to foregoing in the driving method, will not be repeated here.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should be included in the scope of the protection.
Claims (10)
1. a kind of LED shows enable signal control system, for the display enable signal of transmitting display data, the display is enabled
In signal from the different pieces of information position of the display data corresponding to enable signal there are different frequencies；It is characterised in that it includes
Signal averaging unit；The control system is before the display enable signal is exported, by the Signal averaging unit by described in
High frequency in display enable signal shows that enable signal is added in low frequency display enable signal.
2. control system as claimed in claim 1, it is characterised in that the Signal averaging unit includes counting clock；It is described
Signal averaging unit also using the width summation of the counting clock all display enable signals of superposition needed for, counts production
A raw complete display enable signal.
3. control system as claimed in claim 1, it is characterised in that during superposition, the relatively low order of display data is corresponding
Display enable signal be added in display enable signal corresponding to higher significance bit.
4. control system as claimed in claim 1, it is characterised in that the low frequency show enable signal for display data compared with
Display enable signal corresponding to high significance bit；The high frequency shows enable signal to show corresponding to the relatively low order of display data
Show enable signal.
5. a kind of LED display system, it is characterised in that including the control system as described in any in claims 1 to 3 and some
LED display unit；The LED display unit includes display module and the drive circuit for driving the display module to show；
The drive circuit cascade of each LED display unit, the display enable signal of the control system output can be in each LED display unit
Cascaded transmission between drive circuit；
The drive circuit includes triggering latch cicuit, frequency dividing circuit；Wherein：
The triggering latch cicuit is used to carry out the display enable signal according to the clock signal that the control system is sent
Triggering is latched, and generates enabled latch signal, and this is enabled into latch signal and is sent to the frequency dividing circuit；
The frequency dividing circuit is used to receiving the display enable signal and enabled latch signal, and to the display enable signal and
Enabled latch signal carries out logical operation, and the high frequency being superimposed in the display enable signal is shown into enable signal and low frequency show
Show that enable signal separates, and high frequency is shown that enable signal and low frequency show that the display enable signal after enable signal separation exports
To corresponding display module, to drive its display.
6. LED display system as claimed in claim 5, it is characterised in that the frequency dividing circuit includes：First with gate circuit,
Second with gate circuit, not circuit, the first buffer circuit, the second buffer circuit；
Described first accesses the display enable signal with the first input end of gate circuit, and the second input accesses the enabled lock
Signal is deposited, output end connects the input of first buffer circuit；
Described second accesses the display enable signal with the first input end of gate circuit；
The input of the not circuit accesses the enabled latch signal, and output end connects the second of described second and gate circuit
Input；
Described second is connected the input of second buffer circuit with the output end of gate circuit.
7. LED display system as claimed in claim 5, it is characterised in that the triggering latch cicuit includes some triggers；
Each trigger cascade.
8. a kind of LED display drive methods, shown for the display enable signal driving display module using display data, it is described
Display enable signal in from the different pieces of information position of the display data corresponding to enable signal there are different frequencies, its feature exists
In comprising the following steps：
High frequency in the display enable signal is shown that the enable signal low frequency that is added to is shown by display enable signal control system
The output display enable signal after in enable signal；
Trigger latch cicuit and receive the display enable signal, and according to the clock signal that the control system exports to described aobvious
Show that enable signal carries out triggering latch, generate enabled latch signal；
Frequency dividing circuit receives the display enable signal and enabled latch signal, and to the display enable signal and enabled latch
Signal carries out logical operation, and the high frequency being superimposed in the display enable signal is shown into enable signal and low frequency show enabled letter
Number separation, and high frequency is shown that enable signal and low frequency show that the display enable signal after enable signal separation is output to display mould
Block, to drive its display.
9. LED display drive methods as claimed in claim 8, it is characterised in that during superposition, by the relatively low effective of display data
Display enable signal is added in display enable signal corresponding to higher significance bit corresponding to position.
10. LED display drive methods as claimed in claim 8, it is characterised in that the low frequency shows enable signal for display
Display enable signal corresponding to the higher significance bit of data；The high frequency shows the relatively low order that enable signal is display data
Corresponding display enable signal.
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| CN105792422B (en) * | 2016-04-11 | 2017-06-30 | 电子科技大学 | A kind of switch switching circuit for LED |
| CN112785965B (en) * | 2019-11-11 | 2022-03-25 | 杭州海康威视数字技术股份有限公司 | Data display method, device and system |
| CN112233606B (en) * | 2020-12-15 | 2021-06-01 | 武汉华星光电技术有限公司 | Display device, display system and distributed function system |
| CN113192467B (en) * | 2021-04-29 | 2022-10-21 | 贵州芯源微科技有限公司 | Scanning method of backlight panel, LED backlight panel, driving unit and display panel |
| CN115001058B (en) * | 2021-12-24 | 2023-04-11 | 荣耀终端有限公司 | Electronic device, power supply method, and computer storage medium |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101192371A (en) * | 2006-11-28 | 2008-06-04 | 康佳集团股份有限公司 | LEDLED display module group signal |
| CN101489033A (en) * | 2008-01-15 | 2009-07-22 | 华晶科技股份有限公司 | Image noise reduction method based on optimal original color signal |
| CN102215194A (en) * | 2011-05-27 | 2011-10-12 | 南阳理工学院 | Nonlinear composite modulation wireless communication method |
| CN102915705A (en) * | 2012-11-17 | 2013-02-06 | 华北水利水电学院 | Timing sequence generating circuit for improving definition of light-emitting diode (LED) display screen with gray scale |
| CN103414514A (en) * | 2013-08-07 | 2013-11-27 | 武汉邮电科学研究院 | System and method for visible light communication based on OFDM modulation codes and frequency division receiving |
| CN205177383U (en) * | 2015-11-04 | 2016-04-20 | 深圳市绿源半导体技术有限公司 | LED shows enable signal control system and LED display system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005051461A (en) * | 2003-07-28 | 2005-02-24 | Sony Corp | Superposition transmission system of dc current, low-frequency signal, and high-frequency signal |
| DE102009050651A1 (en) * | 2009-10-26 | 2011-04-28 | Infineon Technologies Austria Ag | Method and device for controlling the brightness of light-emitting diodes |
-
2015
- 2015-11-04 CN CN201510740997.9A patent/CN105390091B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101192371A (en) * | 2006-11-28 | 2008-06-04 | 康佳集团股份有限公司 | LEDLED display module group signal |
| CN101489033A (en) * | 2008-01-15 | 2009-07-22 | 华晶科技股份有限公司 | Image noise reduction method based on optimal original color signal |
| CN102215194A (en) * | 2011-05-27 | 2011-10-12 | 南阳理工学院 | Nonlinear composite modulation wireless communication method |
| CN102915705A (en) * | 2012-11-17 | 2013-02-06 | 华北水利水电学院 | Timing sequence generating circuit for improving definition of light-emitting diode (LED) display screen with gray scale |
| CN103414514A (en) * | 2013-08-07 | 2013-11-27 | 武汉邮电科学研究院 | System and method for visible light communication based on OFDM modulation codes and frequency division receiving |
| CN205177383U (en) * | 2015-11-04 | 2016-04-20 | 深圳市绿源半导体技术有限公司 | LED shows enable signal control system and LED display system |
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