CN105375768B

CN105375768B - Capacitive mode protection method and capacitive mode control circuit of resonant converter

Info

Publication number: CN105375768B
Application number: CN201510677591.0A
Authority: CN
Inventors: 陈跃东
Original assignee: Chengdu Monolithic Power Systems Co Ltd
Current assignee: Chengdu Monolithic Power Systems Co Ltd
Priority date: 2015-10-19
Filing date: 2015-10-19
Publication date: 2018-03-06
Anticipated expiration: 2035-10-19
Also published as: US9912244B2; US20170110973A1; CN105375768A

Abstract

A capacitive mode protection method and a capacitive mode control circuit of a resonant converter are disclosed. The capacitive mode protection method comprises the following steps: judging whether the resonant converter enters a capacitive working mode or not; once entering the capacitive mode, the control circuit works in the capacitive protection control mode and turns off the high-side switch and the low-side switch for N periods; after N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the rising process, and conducting a high-side switch when the current detection signal reaches the zero-crossing threshold value in the rising process; and after N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the descending process, and conducting the low-side switch when the current detection signal reaches the zero-crossing threshold value in the descending process. The capacitive mode protection method can avoid damage to the high-side switch and the low-side switch in the capacitive mode.

Description

Capacitive mode protection method and capacitive mode control circuit of resonant converter

Technical Field

The present invention relates to electronic circuits, and in particular, but not exclusively, to a capacitive mode protection method and capacitive mode control circuit for a resonant converter.

Background

The half-bridge LLC resonant converter 100 is widely used in modern switching power supplies due to its soft switching characteristics, low component count, high efficiency, and the like.

Fig. 1 is a simplified schematic diagram of a prior art half bridge LLC resonant converter 50. As shown in fig. 1, resonatesThe converter 50 includes an inverter circuit 51, a resonant network 52, an isolation transformer T, a rectifier circuit, and a load. The inverter circuit 51 is of a half-bridge structure and includes a DC voltage source V connected in series_INA high-side switch tube M1 and a low-side switch tube M2 at two ends, wherein the two switch tubes are formed by a pair of control signals V which are complementary and have constant duty ratio of 0.5_G1And V_G2To control. By alternately driving the high-side switch transistor M1 and the low-side switch transistor M2, the inverter circuit 51 converts the dc voltage V into the dc voltage V_INConverted into a square-wave voltage V_SW。

The resonant network 52 is illustrated as an LLC resonant converter comprising an inductor Lr, an inductor Lm in parallel with the primary winding of the isolation transformer T, and a resonant capacitor Cr. Usually the inductor Lm is the excitation inductance of the isolation transformer T. The resonant network 52 converts the square wave voltage V_SWConverted into an alternating current signal.

The rectifying circuit is coupled between the secondary winding of the isolation transformer T and the load, receives the AC signal output by the resonant network 52 through the transformer, rectifies the AC signal into a half-wave DC signal, and provides a DC output voltage V for the load_OUT。

The resonant converter 50 also includes a control circuit. The control circuit comprises a voltage detection circuit, a current detection circuit, a capacitive mode judgment circuit and a frequency control circuit.

The voltage detection circuit detects the output voltage V_OUTAnd generates a representative output voltage V_OUTIs fed back to_FB. The current detection circuit detects the value of an inductive current Ir flowing through an inductor Lr and generates a current detection signal V representing the inductive current Ir_CS. The capacitive mode judging circuit receives the current detection signal V_CSAnd, according to the current detection signal V_CSA capacitive mode decision signal MC is generated for deciding whether the resonant converter 50 is operating in the capacitive mode or the inductive mode. The frequency control circuit receives a feedback signal V_FBAnd a capacitive mode judging signal MC, based on the feedback signal V_FBGenerating high-side switching control by using capacitive mode judging signal MCSystem signal V_G1And a low side switch control signal V_G2The on and off frequencies of the high side switch M1 and the low side switch M2 are controlled. When the capacitive mode determination signal MC indicates that the resonant converter 50 is operating in the capacitive operating mode, the frequency control circuit will increase the high-side switch control signal V_G1And a low side switch control signal V_G2To cause the resonant converter 50 to quickly revert from the capacitive mode of operation to the inductive mode of operation.

However, once the resonant converter 50 enters the capacitive operation mode, the high-side switch M1 and the low-side switch M2 may be damaged by high voltage breakdown due to the inability to implement soft switching, and therefore, the high-side switch M1 and the low-side switch M2 need to be protected in the capacitive mode.

Disclosure of Invention

In order to solve one or more of the problems described above, the present invention proposes a capacitive mode control circuit for a resonant converter, a method and a corresponding resonant converter, which are different from the prior art.

The invention provides a capacitive mode protection method of a resonant converter, wherein the resonant converter comprises an inverter circuit which at least comprises a pair of high-side switch and low-side switch which are complementarily switched on and off respectively at the same duty ratio, the switching-on and switching-off frequencies of the high-side switch and the low-side switch are changed, and an input voltage is converted into an output voltage; the resonant converter further comprises a resonant network having at least one resonant inductance and at least one resonant capacitance; the resonant converter further includes a control circuit having a normal control mode and a capacitive protection control mode. The capacitive mode protection method comprises the following steps: detecting an inductor current flowing through the resonant inductor and generating a current detection signal representing the inductor current; judging whether the resonant converter works in a capacitive working mode or an inductive working mode according to the current detection signal; when the resonant converter enters a capacitive working mode, the control circuit works in a capacitive protection control mode, and simultaneously, the high-side switch and the low-side switch are turned off for N periods to carry out capacitive protection on the resonant converter, wherein N is a positive integer greater than or equal to 1; after N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the rising process, and conducting a high-side switch when the current detection signal reaches the zero-crossing threshold value in the rising process; after N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the descending process, and conducting a low-side switch when the current detection signal reaches the zero-crossing threshold value in the descending process; when any one of the high-side switch and the low-side switch is conducted again, the control circuit jumps out of the capacitive protection control mode and returns to the normal control mode.

Another aspect of the invention provides a control circuit for a capacitive mode of a resonant converter. The resonant converter comprises an inverter circuit at least provided with a pair of high-side switch and low-side switch which are complementarily switched on and switched off with the same duty ratio respectively; the resonant converter converts an input voltage into an output voltage by changing the on and off frequencies of the high-side switch and the low-side switch; the resonant converter further comprises a resonant network having at least one resonant inductance and at least one resonant capacitance; the capacitive mode control circuit includes a first control mode and a second control mode. The capacitive mode control circuit comprises: the voltage detection circuit is provided with an input end and an output end, wherein the input end is coupled to the output end of the resonant converter to detect the output voltage of the resonant converter, and a feedback signal representing the output voltage is generated at the output end; the current detection circuit is provided with an input end and an output end, wherein the input end is coupled to the resonant network, detects the inductive current flowing through the resonant inductor and provides a current detection signal representing the inductive current at the output end; the capacitive mode judging circuit is provided with an input end and an output end, wherein the input end receives a current detection signal, compares the current detection signal with a zero-crossing threshold value, and generates a capacitive mode judging signal at the output end for judging whether the resonant converter works in a capacitive mode or an inductive mode; the frequency control circuit is provided with a first input end, a second input end, a first output end and a second output end, wherein the first input end and the second input end respectively receive the capacitive mode judging signal and the feedback signal, and generate a first control signal and a second control signal at the first output end and the second output end, and the first control signal and the second control signal are respectively used for controlling the high-side switch and the low-side switch to be switched on and off by the resonant converter in the first control mode; the capacitive protection circuit is provided with a first input end, a second input end, a third input end, a fourth input end, a first output end and a second output end, wherein the first input end and the second input end receive a first control signal and a second control signal respectively; and the logic circuit is provided with a first input end, a second input end, a third input end and a fourth input end which respectively receive the first control signal, the second control signal, the first capacitive protection signal and the second capacitive protection signal, performs logic operation on the first control signal, the second control signal, the first capacitive protection signal and the second capacitive protection signal, and respectively outputs a high-side switch control signal and a low-side switch control signal at a first output end and a second output end. When the capacitive mode judging signal is invalid, the first capacitive protection signal and the second capacitive protection signal are invalid, and the resonant converter is in a first control mode; when the capacitive mode judging signal is effective, the first capacitive protection signal and the second capacitive protection signal are effective, the resonant converter is in a second control mode, the high-side switch control signal and the low-side switch control signal control the high-side switch and the low-side switch to be turned off for N periods at the same time, wherein N is a positive integer greater than or equal to 1; after N periods, when the current detection signal reaches a zero-crossing threshold value in the rising process, the first capacitive protection signal is invalid, and the high-side switch control signal switches on the high-side switch; after N periods, when the current detection signal reaches a zero-crossing threshold value in the descending process, the second capacitive protection signal is invalid, and the low-side switch control signal conducts the low-side switch; and when any one of the high-side switch and the low-side switch is conducted again, the resonant converter jumps out of the second control mode.

The capacitive mode protection method and the capacitive mode control circuit provided by the embodiment of the invention have the advantages that the high-side switch and the low-side switch can be prevented from being damaged in the capacitive mode, and the like.

Drawings

For a better understanding of the present invention, reference will now be made in detail to the following drawings, in which:

fig. 1 is a simplified schematic diagram of a prior art half-bridge LLC resonant converter 50A;

fig. 2 is a schematic diagram of an LLC resonant converter 100 according to an embodiment of the invention;

FIG. 3 is a diagram illustrating waveforms 200 of parameters associated with operation of a resonant converter in accordance with one embodiment of the present invention;

FIG. 4 is a schematic diagram of a waveform 300 of an operation-related parameter of a resonant converter according to another embodiment of the invention;

FIG. 5 is a circuit schematic of a capacitive protection circuit and logic circuit 400 according to an embodiment of the present invention;

fig. 6 is a circuit schematic of a resonant converter 500 according to an embodiment of the present invention;

fig. 7 is a flow chart illustrating a method 600 for capacitive mode protection of a resonant converter according to an embodiment of the invention.

Hereinafter, specific embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same reference numbers will be used throughout the drawings to refer to the same or like parts or features.

Detailed Description

Specific embodiments of the present invention will be described in detail below, and it should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following detailed description of the present invention, numerous details are set forth in order to provide a better understanding of the present invention. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details. A detailed description of some specific structures and functions is simplified herein for clarity in setting forth the invention. In addition, similar structures and functions that have been described in detail in some embodiments are not repeated in other embodiments. Although the terms of the present invention have been described in connection with specific exemplary embodiments, the terms should not be construed as limited to the exemplary embodiments set forth herein.

Throughout the specification, reference to "one embodiment," "an embodiment," "one example," or "an example" means: the particular features, structures, or characteristics described in connection with the embodiment or example are included in at least one embodiment of the invention. Thus, the appearances of the phrases "in one embodiment," "in an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Like reference numerals refer to like elements. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Fig. 2 is a schematic diagram of an LLC resonant converter 100 according to an embodiment of the invention. As shown in fig. 2, the resonant converter 100 includes an inverter circuit 101, a resonant network 102, an isolation transformer T, and a rectifying filter circuit 103.

The inverter circuit 101 is in a half-bridge structure and includes a DC voltage source V connected in series_INA high-side switch tube M1 and a low-side switch tube M2 at two ends, wherein the two switch tubes are formed by a pair of control signals V which are complementary and have constant duty ratio of 0.5_G1And V_G2To control. By alternately driving the high-side switch transistor M1 and the low-side switch transistor M2, the inverter circuit 101 converts the dc voltage V into the dc voltage V_INConverted into a square-wave voltage V_SW. In other examples, the inverter circuit 101 may include other configurations, such as a full bridge inverter circuit or the like topology.

The resonant network 102 includes an LLC series-parallel resonant network composed of a first inductor Lr, a second inductor Lm, and a resonant capacitor Cr, wherein the second inductor Lm is connected in parallel with the primary winding of the isolation transformer T. Typically the second inductor Lm is the excitation inductance of the isolation transformer T. The resonant network 102 converts the square wave voltage signal V_SWConverted into an alternating voltage signal.

The rectifying and smoothing circuit 103 is coupled between the secondary winding of the isolation transformer T and the load, and includes first and second rectifying diodes D1, D2 and an output capacitor Co, wherein an anode of the first rectifying diode D1 is coupled to a first end of the secondary winding, and an anode of the second rectifying tube D2 is coupled to a second end of the secondary winding. The output capacitor Co has a first terminal coupled to the cathode of the first rectifying diode D1 and the cathode of the second rectifying diode D2, and a second terminal coupled to the secondary reference ground. In other embodiments, the rectifying and filtering circuit 103 may have other structures. The rectifying and filtering circuit 103 receives the ac signal output from the resonant network 102 through the transformer T, rectifies the ac voltage signal into a half-wave dc voltage signal, and provides a dc voltage to the loadOutput voltage V_OUT。

The resonant converter 100 also includes a control circuit. The control circuit includes a voltage detection circuit 104, a current detection circuit 105, a capacitive mode determination circuit 106, a frequency control circuit 107, a capacitive protection circuit 108, and a logic circuit 109. The control circuit has a first control mode (normal control mode) and a second control mode (capacitive protection control mode).

The voltage detection circuit 104 has an input terminal coupled to the output terminal of the resonant converter 100 and an output terminal for detecting the output voltage V_OUTAnd generating a representative output voltage V at the output terminal_OUTIs fed back to_FB. Feedback signal V_FBIncluding voltage signals, current signals, or the like, in appropriate signal form to reflect the output voltage V_OUTA change in (c). In one embodiment, the voltage detection circuit 104 includes an optocoupler for isolated sampling on the secondary and primary sides of the transformer.

The current detection circuit 105 has an input terminal coupled to the resonant network 102 and an output terminal, detects a value of an inductor current Ir flowing through the inductor Lr, and generates a current detection signal V representing the inductor current Ir at the output terminal_CS. In one embodiment, the current detection circuit 105 comprises a sampling capacitor and a sampling resistor connected in series, wherein a common terminal of the sampling capacitor and the sampling resistor provides the current detection signal V as an output terminal of the current detection circuit 105_CS。

The capacitive mode judging circuit 106 has an input terminal receiving the current detection signal V and an output terminal_CSAnd detecting the current signal V_CSA capacitive mode decision signal MC is generated at the output for deciding whether the resonant converter 100 is operating in the capacitive or inductive mode of operation, compared to a zero-crossing threshold. The capacitive mode determination signal MC is a logic high/low level signal having a first logic state and a second logic state. In one embodiment, a first logic state (e.g., logic high) indicates that the resonant converter is in a capacitive mode of operation and a second logic stateAn edit state (e.g., logic low) indicates that the resonant converter is in an inductive mode of operation. In another embodiment, a first logic state (e.g., logic high) indicates that the resonant converter is in an inductive mode of operation and a second logic state (e.g., logic low) indicates that the resonant converter is in a capacitive mode of operation. In one embodiment, the current detection signal V is detected at the turn-off time of the low-side switch M2_CSWhen the current detection signal V is_CSIs less than the zero crossing threshold value, indicating that the resonant converter 100 is operating in the inductive operating mode; if the current detection signal V_CSA value of greater than the zero crossing threshold indicates that the resonant converter 100 is operating in the capacitive mode of operation. In another embodiment, the current detection signal V is detected when the high-side switch tube M1 is turned off_CSValue of (1), current detection signal V_CSIs greater than the zero crossing threshold value, indicating that the resonant converter 100 is operating in the inductive mode of operation; if the current detection signal V_CSA value of less than the zero crossing threshold indicates that the resonant converter 100 is operating in the capacitive mode of operation.

The frequency control circuit 107 has a first input terminal, a second input terminal, a first output terminal and a second output terminal. A first input terminal coupled to the voltage detection circuit 104 for receiving the feedback signal V_FBAnd a second input terminal coupled to the capacitive mode determining circuit 106 for receiving the capacitive mode determining signal MC. The frequency control circuit 107 determines the signal MC and the voltage feedback signal V according to the capacitive mode_FBA set of variable frequency first control signals SW1 and second control signals SW2 are generated. The first control signal SW1 and the second control signal SW2 are used for the resonant converter 100 to turn on and off the high-side switch M1 and the low-side switch M2 in the first control mode, wherein the first control signal SW1 and the second control signal SW2 are logic complementary high-low level signals having a first logic state (e.g., logic high) and a second logic state (e.g., logic low). When the resonant converter 100 enters the capacitive operating mode (i.e., MC has the first logic state), the frequency control circuit 107 increases the operating frequency of the first control signal SW1 and the second control signal SW 2. In one embodiment, when the voltage feedback signal V_FBBelow a predetermined reference voltage level, the frequency control circuit 107 decreases the first control signal SW1 and the second control signal SWThe operating frequency of the two control signals SW 2; when the voltage feedback signal V_FBAbove a predetermined reference voltage level, the frequency control circuit 107 increases the operating frequencies of the first control signal SW1 and the second control signal SW 2.

The capacitive protection circuit 108 has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal, and a second output terminal. A first input terminal of the first control signal SW1 is coupled to a first output terminal of the frequency control circuit 107; a second input terminal coupled to a second output terminal of the frequency control circuit 107 for receiving a second control signal SW 2; the third input terminal is coupled to the capacitive mode determining circuit 106 for receiving the capacitive mode determining signal MC; the fourth input terminal is coupled to the current detection circuit 105 for receiving the current detection signal V_CS. The capacitive protection circuit 108 outputs a first capacitive protection signal C at a first output terminal and a second output terminal, respectively_P1And a second capacitive protection signal C_P2. First capacitive protection signal C_P1And a second capacitive protection signal C_P2For the resonant converter 100 to turn on and off the high-side switch M1 and the low-side switch M2 in the second control mode, wherein the first capacitive protection signal C_P1And a second capacitive protection signal C_P2A logic high low signal having a first logic state (e.g., logic high) and a second logic state (e.g., logic low).

The logic circuit 109 has a first input terminal, a second input terminal, a third input terminal and a fourth input terminal for receiving the first control signal SW1, the second control signal SW2 and the first capacitive protection signal C_P1And a second capacitive protection signal C_P2. And for the first control signal SW1, the second control signal SW2, and the first capacitive protection signal C_P1And a second capacitive protection signal C_P2Performing logic operation, and respectively outputting high-side switch control signals V at a first output terminal and a second output terminal_G1And a low side switch control signal V_G2For turning on and off the high side switch M1 and the low side switch M2 in the resonant converter 100. Wherein the high side switch control signal V_G1And a low side switch control signal V_G2High and low level signals for logic complement, having a first logicAn edit state (e.g., logic high) and a second logic state (e.g., logic low). In one embodiment, the high-side switch control signal V_G1Having a first logic state (e.g., logic high), the high-side switch M1 is turned on; having a second logic state (e.g., logic low), the high-side switch M1 is turned off. Low side switch control signal V_G2Having a first logic state (e.g., logic high), the low side switch M2 is conductive; having a second logic state (e.g., logic low), the low side switch M2 is turned off.

When the capacitive mode judging signal MC is invalid (i.e. the resonant converter 100 operates in the inductive mode), the first capacitive protection signal C_P1And a second capacitive protection signal C_P2Inactive, the resonant converter 100 is in the first control mode. The high side switch M1 and the low side switch M2 are turned on and off by a first control signal SW1 and a second control signal SW 2.

When the capacitive mode determination signal MC is active (i.e., the resonant converter 100 operates in the capacitive mode), the first capacitive protection signal C is asserted_P1And a second capacitive protection signal C_P2Effectively, the resonant converter 100 is in the second control mode. High side switch control signal V_G1And a low side switch control signal V_G2And controlling the high-side switch M1 and the low-side switch M2 to be turned off simultaneously for N periods, wherein N is a positive integer greater than or equal to 1.

After N cycles, the capacitive protection circuit 108 determines the current detection signal V_CS(representing the inductor current Ir) whether it reaches the zero-crossing threshold V during the ramp-up_THIf so, a first capacitive protection signal C_P1Deactivated, resonant converter 100 jumps out of the second control mode back to the first control mode, high side switch control signal V_G1Controlling the high-side switch M1 to be conducted; meanwhile, the capacitive protection circuit 108 also judges the current detection signal V_CS(representing the inductor current Ir) whether it reaches the zero-crossing threshold V during the descent_THIf so, a second capacitive protection signal C_P2In the event of failure, the resonant converter 100 jumps out of the second control mode back to the first control mode, and the low-side switching control signal V_G2The low side switch M2 is controlled to conduct.

In one embodiment, the zero-crossing threshold V_THIncluding a first zero-crossing threshold value V_TH1And a second zero-crossing threshold value V_TH2. First zero-crossing threshold value V_TH1A voltage signal slightly greater than zero, such as 80 mV; second zero crossing threshold V_TH2Is a voltage signal slightly less than zero, such as-80 mV. In one embodiment, when the current detection signal V_CSReaching a second zero-crossing threshold V during the rise_TH2(e.g., -80mV), first capacitive protection signal C_P1Inactive, the resonant converter 100 trips out of the second control mode, and the first control signal SW1 controls the high-side switch M1 to be turned on; when the current detection signal V_CSReaching a first zero-crossing threshold V during descent_TH1(e.g., 80mV), second capacitive protection signal C_P2Inactive, the resonant converter 100 trips out of the second control mode, and the second control signal SW2 controls the low-side switch M2 to be conductive.

Fig. 3 is a diagram illustrating waveforms 200 of operation-related parameters of the resonant converter 100 according to an embodiment of the present invention. The high-side switch control signal V is illustrated_G1Low side switch control signal V_G2Square wave voltage signal V_SWCurrent detection signal V_CSAnd a first comparison signal C_H(as will be explained in detail in fig. 5). In the embodiment shown in FIG. 3, the high-side switch control signal V_G1And a low side switch control signal V_G2A logic high indicates that the high-side switch M1 and the low-side switch M2 are on, and a logic low indicates that the high-side switch M1 and the low-side switch M2 are off. Square wave voltage signal V_SWVarying between a high level and a low level, the high level being about V_IN+0.7V and low level of about 0.7V, where 0.7V is the body diode D of the high side switch M1 and the low side switch M2_M1And D_M2The conduction voltage drop of (1).

Since the current detection signal V is at time t1 when the high-side switch M1 is turned off_CSIs less than the first capacitive mode judging threshold V_TH1(80mV), so the resonant converter 100 enters a capacitive operating mode and the control circuit of the resonant converter 100 enters a second control mode (capacitive protection)Guard control mode) when the high-side switch control signal V is asserted_G1And a low side switch control signal V_G2Both logic low, the high-side switch M1 and the low-side switch M2 are turned off simultaneously for a blank time blank 1. In the embodiment shown in fig. 3, the blank time blank1 is illustrated as a duty cycle, such as the time t1-t2 shown in the figure, but it should be understood by those skilled in the art that the blank time blank1 can be any N cycles according to the load requirement, where N is a positive integer greater than or equal to 1.

After N periods, when the current detection signal V_CS(representing the inductor current Ir) reaches the first zero-crossing threshold V during the fall_TH1Low side switch control signal V_G2Going from logic low to logic high, the low-side switch M2 is turned on and the resonant converter 100 jumps out of the second control mode. As can be seen from the embodiment shown in fig. 3, when the low-side switch M2 is turned on, the square wave voltage signal V is generated_SWAt 0.7V, the low side switch M2 is turned on for zero voltage, enabling soft switching. This avoids the need to detect the signal V at the current_CSGreater than the first capacitive mode decision threshold V_TH1There may be a hard switching risk of turning on the low side switch M2. For example, when the current detection signal V_CSA2, and the body diode D of the high-side switch M1 at this time, the low-side switch M2 is turned on_M1Is still turned on, so that the square wave voltage signal V_SWIs still equal to the input voltage V_IN+0.7V, the low side switch M2 cannot implement soft switching. Even in the presence of the current detection signal V_CSIs greater than the first capacitive mode decision threshold V_TH1Thereafter, the low-side switch M2 is turned on after being kept off for a while due to the different body diodes D_M1With different reverse recovery times, it is still not guaranteed that the low-side switch M2 is fully turned on at zero voltage.

Fig. 4 is a diagram illustrating waveforms 300 of operation-related parameters of the resonant converter 100 according to an embodiment of the invention. The high-side switch control signal V is illustrated_G1Low side switch control signal V_G2Voltage V at the common node of the high-side switch M1 and the low-side switch M2_SWSquare wave voltage signal V_SWCurrent detection signal V_CSAnd a second comparison signal C_L(as will be explained in detail in fig. 5). In the embodiment shown in FIG. 3, the high-side switch control signal V_G1And a low side switch control signal V_G2A logic high indicates that the high-side switch M1 and the low-side switch M2 are on, and a logic low indicates that the high-side switch M1 and the low-side switch M2 are off. Square wave voltage signal V_SWAt 0.7V and V_IN+0.7V, where 0.7V is the body diode D of the high side switch M1 and the low side switch M2_M1And D_M2The conduction voltage drop of (1).

Due to the current sense signal V at time t1 when the low side switch M2 is turned off_CSIs greater than the second capacitive mode determination threshold V_TH2(-80mV), therefore the resonant converter 100 enters the capacitive operating mode and the control circuit of the resonant converter 100 enters the second control mode (capacitive protection control mode), when the high-side switch control signal V is asserted_G1And a low side switch control signal V_G2Are logic low, the high-side switch M1 and the low-side switch M2 are turned off for a blank time blank2, and the control signal V of the high-side switch is now asserted_G1And a low side switch control signal V_G2Are all logic low. In the embodiment shown in fig. 3, the blank time blank2 is illustrated as a duty cycle, such as the time t1-t2 shown in the figure, but it should be understood by those skilled in the art that the blank time blank2 can be any N cycles according to the load requirement, where N is a positive integer greater than or equal to 1.

After N periods, when the current detection signal V_CS(representative of the inductor current Ir) reaches the second zero-crossing threshold V during the rising process_TH2Control signal V of high-side switch_G1Going from logic low to logic high, the high-side switch M1 is turned on and the resonant converter 100 jumps out of the second control mode. As can be seen from the embodiment shown in FIG. 3, when the high-side switch M1 is turned on, the square wave voltage signal V is generated_SWIs a V_IN+0.7V, the high side switch M1 is zero voltage conduction, achieving soft switching. This avoids the need to detect the signal V at the current_CSLess than the second capacitive mode determination threshold V_TH2While turning on the high-side switch M1 may be presentThe hard switching risk of. For example, when the current detection signal V_CSIs B2, turns on the high-side switch M1, at which time the body diode D of the low-side switch M2_M2Is still turned on, so that the square wave voltage signal V_SWStill equal to 0.7V, the high-side switch M1 cannot achieve soft switching. Even in the presence of the current detection signal V_CSIs less than the second capacitive mode determination threshold V_TH2Thereafter, the high-side switch M1 continues to be turned off for a period of time and then turned on again due to the different body diodes D_M2With different reverse recovery times, it is still not guaranteed that the high-side switch M1 fully achieves zero voltage conduction.

Fig. 5 is a circuit schematic of a capacitive protection circuit and logic circuit 400 according to an embodiment of the invention. As shown, the capacitive protection circuit 108 includes a high-side switch capacitive protection circuit 41 and a low-side switch capacitive protection circuit 42.

The high-side switch capacitive protection circuit 41 includes a first comparison circuit 411, a first counter 412, a first flip-flop 413, and a first logic gate 414.

The first comparison circuit 411 receives the current detection signal V_CSAnd a second zero-crossing threshold signal V_TH2And detecting the current signal V_CSAnd a second zero-crossing threshold signal V_TH2Comparing and outputting a first comparison signal C_H. First comparison signal C_HA logic high low signal having a first logic state (e.g., logic high) and a second logic state (e.g., logic low). In one embodiment, when the current detection signal V_CSGreater than a second zero-crossing threshold signal V_TH2While, the first comparison signal C_HA first logic state (e.g., logic high); when the current detection signal V_CSLess than a second zero-crossing threshold signal V_TH2While, the first comparison signal C_HAnd a second logic state (e.g., logic low).

The first counter 412 receives the capacitive mode determination signal MC and the first comparison signal C_HWhen the capacitive mode determination signal MC is asserted, i.e. the resonant converter 100 enters the capacitive operation mode, the first counter 412 starts to compare the first comparison signalNumber C_HCounting N cycles and outputting a first count signal C_H-blank. Where N is a positive integer greater than or equal to 1, equal to the period of simultaneous turning off of the high-side switch M1 and the low-side switch M2.

The first flip-flop 413 receives the first count signal C_H-blankOutputting a first trigger signal D_HAfter N cycles, when the first comparison signal is at the edge of the transition from the second logic state to the first logic state, the first trigger signal D_HIs effective. In one embodiment, the first flip-flop 413 is a rising edge flip-flop that counts N cycles later than the first count signal C_H-blankRising edge of the first trigger signal D_HIs effective.

The first logic gate 414 receives the first trigger signal D_HAnd a capacitive mode judging signal MC for the first trigger signal D_HAnd the capacitive mode judging signal MC performs logical operation and outputs a first capacitive protection signal C_P1. Wherein, when the capacitive mode judging signal MC is valid, the first capacitive protection signal C_P1The method is effective; when the first trigger signal D_HWhen active, a first capacitive protection signal C_P1And (4) invalidation. In one embodiment, the first logic gate 414 is a NAND logic gate.

The low side switch capacitive protection circuit 42 includes a second comparison circuit 421, a first counter 422, a second flip-flop 423, and a second logic gate 424.

The second comparator 421 receives the current detection signal V_CSAnd a first zero-crossing threshold signal V_TH1And detecting the current signal V_CSAnd a first zero-crossing threshold signal V_TH1Comparing and outputting a second comparison signal C_L. Second comparison signal C_LA logic high low signal having a first logic state (e.g., logic high) and a second logic state (e.g., logic low). In one embodiment, when the current detection signal V_CSGreater than a first zero-crossing threshold signal V_TH1While the second comparison signal C_LA first logic state (e.g., logic high); when the current detection signal V_CSLess than a first zero crossing threshold signalV_TH1While the second comparison signal C_LAnd a second logic state (e.g., logic low).

The second counter 422 receives the capacitive mode determination signal MC and the second comparison signal C_LWhen the capacitive mode determination signal MC is asserted, i.e. the resonant converter 100 enters the capacitive operation mode, the second counter 422 starts to compare the second comparison signal C_LCounting N periods and outputting a second count signal C_L-blank. Where N is a positive integer greater than or equal to 1, equal to the period of simultaneous turning off of the high-side switch M1 and the low-side switch M2.

The second flip-flop 423 receives the second count signal C_L-blankOutputting a second trigger signal D_LAfter N cycles, when the second comparison signal is at the edge of the transition from the first logic state to the second logic state, the second trigger signal D_LIs effective. In one embodiment, the second flip-flop 423 is a falling edge flip-flop that counts N cycles later in the second count signal C_L-blankSecond trigger signal D of falling edge_LIs effective.

The second logic gate 424 receives the second trigger signal D_LAnd a capacitive mode judging signal MC, and a second trigger signal D_LAnd the capacitive mode judging signal MC performs logical operation and outputs a second capacitive protection signal C_P2. Wherein, when the capacitive mode judging signal MC is valid, the second capacitive protection signal C_P2The method is effective; when the second trigger signal D_LWhen active, a second capacitive protection signal C_P2And (4) invalidation. In one embodiment, the second logic gate 424 is a NAND logic gate.

Fig. 6 shows a circuit schematic of a resonant converter 500 according to an embodiment of the invention. As shown, the resonant converter 500 includes an inverter circuit 501, a resonant network 502, an isolation transformer T, and a rectifier filter circuit 503. The control circuit of the resonant converter 500 includes a voltage detection circuit 504, a current detection circuit 505, a capacitive mode determination circuit 506, a frequency control circuit 507, a capacitive protection circuit 508, and a logic circuit 509.

In one embodiment, the voltage detection circuit 504 includes a voltage dividing resistor R_A、R_BAnd an optocoupler device OC. Voltage dividing resistor R_AAnd R_BConnected in series at an output voltage V_OUTAnd the optical coupler is coupled between the ground and the voltage dividing resistor R at one end_AAnd R_BAnd the other end is coupled to the frequency control circuit 507. Optical coupler OC receiving divider resistor R_AAnd R_BA common terminal voltage and generating a representative output voltage V_OUTIs fed back to_FBAnd a frequency control circuit 507 to the primary side of the transformer T, and simultaneously realizes the isolation of the primary side and the secondary side of the transformer.

In one embodiment, the current detection circuit 505 includes a sampling capacitor Cs and a sampling resistor Rs connected in series. The other end of the sampling resistor Rs is connected to logic ground, and the other end of the sampling capacitor Cs is connected to the common end of the primary side of the transformer and the resonance capacitor Cr. The common terminal of the sampling capacitor Cs and the sampling resistor Rs is used as the output terminal of the current detection circuit 505 to provide the current detection signal V_CS。

In one embodiment, the capacitive mode decision circuit 506 receives the current detection signal V_CSAnd detects the signal V according to the current_CSA capacitive mode determination signal MC is generated for determining whether the resonant converter 500 operates in the capacitive or inductive operating mode. In one embodiment, the current detection signal V is detected when the low-side switch tube M2 is turned off_CSWhen the current detection signal V is_CSIs less than the zero-crossing threshold value V_THRepresenting the resonant converter 500 operating in an inductive mode of operation; if the current detection signal V_CSA value of greater than the zero crossing threshold indicates that the resonant converter 500 is operating in the capacitive mode of operation. In one embodiment, the current detection signal V is detected when the high-side switch tube M1 is turned off_CSWhen the current detection signal V is_CSIs greater than the zero crossing threshold value, indicating that the resonant converter 500 is operating in the inductive mode of operation; if the current detection signal V_CSA value of less than the zero crossing threshold indicates that the resonant converter 500 is operating in the capacitive mode of operation.

In one embodiment, the frequency control circuit 507 receives the capacitive mode determination signal MC and the feedback voltage signal V_FB. The frequency control circuit 507 feeds back the signal V according to the voltage_FBGenerating a charging current and a discharging current to respectively charge and discharge a frequency setting capacitor CT to generate a frequency setting voltage V_CT. The resistor Rset and the optical coupler OC are connected in series to an internal DC voltage V_BAnd logically to ground for generating a first current Iset. When the load of the resonant converter changes, the resistance value of the optical coupler OC changes along with the change, so that the first current Iset changes. For example, when the load of the resonant converter is increased, the output voltage V_OUTIs pulled low. At this time, the resistance value of the optical coupler OC becomes large, and the first current Iset becomes small (i.e., the frequency setting capacitor C)_TBecomes smaller) to lower the operating frequency of the resonant converter 500, so that the output voltage V becomes smaller_OUTMaintained at a constant value. First mirror current source I_S1For mirroring the first current Iset, when the frequency sets the capacitance C_TIs lower than a lower threshold value V_LWhile, the first mirror current source I_S1For setting the capacitance C to the frequency_TCharging; second mirror current source I_S2Also mirrored by the first current Iset, when the frequency sets the capacitance C_TIs higher than the upper threshold value V_HWhile the second mirror current source I_S2For setting the capacitance C to the frequency_TDischarging, wherein the frequency sets the capacitance C_TIs equal to the discharge rate, so that the frequency sets the capacitance C_TVoltage V of_CTAn equilateral triangle wave. The frequency control circuit 507 further sets the frequency to the capacitor C_TVoltage V of_CTAnd an upper threshold V_HAnd a lower threshold value V_LComparing, the first control signal SW1 and the second control signal SW2 are generated.

In the embodiment of FIG. 6, the capacitive protection circuit 508 is slightly different from the embodiment 400 of FIG. 5 in that the first comparison signal C is generated by the existing blocks in the capacitive mode determination circuit 506_HAnd a second comparison signal C_LTherefore, the frequency control circuit 508 is directly connectedReceive a first comparison signal C_HAnd a second comparison signal C_LWithout the need for an additional incoming current sense signal V_CSRe-crosses the first zero-crossing threshold V_TH1And a second zero-crossing threshold value V_TH2And (6) comparing.

In one embodiment, the logic circuit 509 includes a third logic gate 43 and a fourth logic gate 44. The third logic gate 43 receives the first capacitive protection signal C_P1And a first control signal SW1, and a first capacitive protection signal C_P1And a first control signal SW1 for outputting a high-side switch control signal V_G1. When the first capacitive protection signal C_P1Active, high side switch control signal V_G1Controlling the high-side switch M1 to be turned off when the first capacitive protection signal C_P1Inactive, high-side switch control signal V_G1The high side switch M1 is controlled to conduct. In one embodiment, the third logic gate 43 is an and logic gate. The fourth logic gate 44 receives the second capacitive protection signal C_P2And a second control signal SW2, and protects the second capacitive protection signal C_P2And the second control signal SW2 to output a low-side switch control signal V_G2. When the second capacitive protection signal C_P2Active, low side switch control signal V_G2Controlling the low-side switch M2 to be turned off when the second capacitive protection signal C_P2Inactive, low-side switch control signal V_G2The high side switch M2 is controlled to conduct. In one embodiment, the fourth logic gate 44 is an and logic gate.

Fig. 7 is a flow chart illustrating a method 600 for capacitive mode protection of a resonant converter according to an embodiment of the invention. The resonant converter of fig. 7 comprises an inverter circuit 101 having at least a pair of high-side switch M1 and low-side switch M2, which are complementarily turned on and off at the same duty cycle, respectively, and an input voltage V is applied by changing the on and off frequencies of the high-side switch M1 and the low-side switch M2_INIs converted into an output voltage V_OUT. The resonant converter further comprises a resonant network 102 having at least one resonant inductance Lr and at least one resonant capacitance Cr. The resonant converter involved in the embodiment shown in fig. 7 comprises two control modes: containerA sexual protection control mode and a normal control mode. As shown in FIG. 7, capacitive mode protection method 600 includes steps 610-680.

Step 610, detecting an inductor current Ir flowing through a primary resonant inductor Lr of the transformer, and generating a current detection signal V representing the inductor current Ir_CS。

Step 620, detecting the signal V according to the current_CSAnd judging whether the resonant converter enters a capacitive working mode or not. In one embodiment, step 820 includes detecting a current signal V_CSWith zero-crossing threshold signal V_THAnd comparing and judging whether the resonant converter enters a capacitive working mode. If the resonant converter does not enter the capacitive operating mode, returning to step 610; if the resonant converter enters the capacitive mode of operation, go to step 630.

In step 630, the resonant converter 100 enters the capacitive protection control mode, and the control circuit turns off the high-side switch M1 and the low-side switch M2 for N cycles at the same time. Wherein N is a positive integer greater than or equal to 1.

Step 640, after N cycles, judging the current detection signal V_CSWhether the zero-crossing threshold value V is reached during the rise_THIf not, go to step 630; if so, go to step 650.

Step 650, when the current detection signal V is detected_CSReaching the zero crossing threshold V during the rise_THThe high-side switch M1 is turned on and the resonant converter 100 jumps out of the capacitive protection control mode.

Step 660, after N cycles, judging the current detection signal V_CSWhether a zero-crossing threshold value V is reached during the descent_THIf not, go to step 630; if so, go to step 670.

Step 670, when the current detection signal V_CSReaching the zero-crossing threshold V during the descent_THAnd the low-side switch M2 is turned on, and the resonant converter 100 jumps out of the capacitive protection control mode.

It should be noted that step 660 and step 670 are illustrated after step 640 and step 650, and in fact, step 640 and step 660 may be performed simultaneously, and step 650 and step 670 may also be performed simultaneously. As soon as either of the high-side switch M1 and the low-side switch M2 is turned on again, the resonant converter 100 jumps out of the capacitive protection control mode into the normal control mode.

In one embodiment, the zero-crossing threshold V_THIncluding a first zero-crossing threshold value V_TH1And a second zero-crossing threshold value V_TH2. First zero-crossing threshold value V_TH1A voltage signal slightly greater than zero, such as 80 mV; second zero crossing threshold V_TH2Is a voltage signal slightly less than zero, such as-80 mV.

In one embodiment, the step 620 of determining whether the resonant converter 100 enters the capacitive operation mode includes the step 621: determining the turn-off time of the high-side switch M1 and the current detection signal V_CSIf it is greater than the zero crossing threshold (in one embodiment, the zero crossing threshold is a hysteresis signal including a first threshold and a second threshold, e.g., 80mV and-80 mV), if the current sense signal V is greater than the zero crossing threshold_CSAbove a zero-crossing threshold (e.g., 80mV), the resonant converter operates in an inductive mode of operation; if the current detection signal V_CSBelow a zero crossing threshold (e.g. -80mV), the resonant converter operates in a capacitive mode of operation. In one embodiment, the step 620 of determining whether the resonant converter enters the capacitive operation mode includes the step 622 of: determining the turn-off time of the low-side switch M2 and the current detection signal V_CSIf it is less than the zero crossing threshold (in one embodiment, the zero crossing threshold is a hysteresis signal including a first threshold and a second threshold, such as 80mV and-80 mV), if the current sense signal V is less than the zero crossing threshold_CSAbove a zero-crossing threshold (e.g., 80mV), the resonant converter operates in a capacitive mode of operation; if the current detection signal V_CSBelow the zero crossing threshold (e.g. -80mV), the resonant converter operates in an inductive mode of operation.

While the present invention has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration, rather than of limitation. As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.

Claims

1. A capacitive mode protection method for a resonant converter, wherein the resonant converter comprises an inverter circuit having at least a pair of a high-side switch and a low-side switch which are complementarily turned on and off at the same duty ratio, respectively, and an input voltage is converted into an output voltage by changing the turn-on and turn-off frequencies of the high-side switch and the low-side switch; the resonant converter further comprises a resonant network having at least one resonant inductance and at least one resonant capacitance; the resonant converter also comprises a control circuit which has a normal control mode and a capacitive protection control mode; the capacitive mode protection method comprises the following steps:

detecting an inductor current flowing through the resonant inductor and generating a current detection signal representing the inductor current;

judging whether the resonant converter works in a capacitive working mode or an inductive working mode according to the current detection signal;

when the resonant converter enters a capacitive working mode, the control circuit works in a capacitive protection control mode, and simultaneously, the high-side switch and the low-side switch are turned off for N periods to carry out capacitive protection on the resonant converter, wherein N is a positive integer greater than or equal to 1;

after the high-side switch and the low-side switch are turned off for N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the rising process, and turning on the high-side switch when the current detection signal reaches the zero-crossing threshold value in the rising process;

after the high-side switch and the low-side switch are turned off for N periods, judging whether the current detection signal reaches a zero-crossing threshold value in the descending process, and turning on the low-side switch when the current detection signal reaches the zero-crossing threshold value in the descending process;

when any one of the high-side switch and the low-side switch is conducted again, the control circuit jumps out of the capacitive protection control mode and returns to the normal control mode.

2. The capacitive mode protection method of claim 1, wherein the step of determining whether the resonant converter enters the capacitive operating mode based on the current sense signal comprises:

judging whether the current detection signal is greater than a zero-crossing threshold value at the turn-off time of the high-side switch; if the current detection signal is larger than the zero-crossing threshold value, the resonant converter works in an inductive working mode; if the current detection signal is smaller than the zero-crossing threshold value, the resonant converter works in a capacitive working mode; and

judging whether the current detection signal is greater than a zero-crossing threshold value at the turn-off moment of the low-side switch; if the current detection signal is larger than the zero-crossing threshold value, the resonant converter works in a capacitive working mode; and if the current detection signal is smaller than the zero-crossing threshold value, the resonant converter works in an inductive working mode.

3. The capacitive mode protection method of claim 1, wherein the zero crossing threshold is a hysteresis signal comprising a first zero crossing threshold and a second zero crossing threshold; wherein the first zero crossing threshold signal is greater than zero and the second zero crossing threshold signal is less than zero.

4. The capacitive mode protection method of claim 3, determining a turn-off time of the high-side switch, and if the current detection signal is greater than a first zero-crossing threshold, operating the resonant converter in an inductive operating mode; if the current detection signal is smaller than a second zero-crossing threshold value, the resonant converter works in a capacitive working mode; and

judging the turn-off time of the low-side switch, and if the current detection signal is greater than a first zero-crossing threshold, enabling the resonant converter to work in a capacitive working mode; and if the current detection signal is smaller than the second zero-crossing threshold value, the resonant converter works in an inductive working mode.

5. The capacitive mode protection method of claim 3, wherein determining whether the current sense signal reaches the zero crossing threshold during the ramp up after N cycles comprises: and judging whether the current detection signal reaches a second zero-crossing threshold value in the rising process, and conducting the high-side switch when the current detection signal reaches the second zero-crossing threshold value in the rising process.

6. The capacitive mode protection method of claim 3, wherein determining whether the current sense signal reaches the zero crossing threshold during the fall after N cycles comprises: and judging whether the current detection signal reaches a first zero-crossing threshold value in the descending process, and turning on the low-side switch when the current detection signal reaches the first zero-crossing threshold value in the descending process.

7. A capacitive mode control circuit for a resonant converter, wherein the resonant converter comprises an inverter circuit having at least a pair of high-side and low-side switches that are complementarily turned on and off at the same duty cycle, respectively; the resonant converter converts an input voltage into an output voltage by changing the on and off frequencies of the high-side switch and the low-side switch; the resonant converter further comprises a resonant network having at least one resonant inductance and at least one resonant capacitance; the capacitive mode control circuit comprises a first control mode and a second control mode; the capacitive mode control circuit comprises:

the voltage detection circuit is provided with an input end and an output end, wherein the input end is coupled to the output end of the resonant converter to detect the output voltage of the resonant converter, and a feedback signal representing the output voltage is generated at the output end;

the current detection circuit is provided with an input end and an output end, wherein the input end is coupled to the resonant network, detects the inductive current flowing through the resonant inductor and provides a current detection signal representing the inductive current at the output end;

the capacitive mode judging circuit is provided with an input end and an output end, wherein the input end receives a current detection signal, compares the current detection signal with a zero-crossing threshold value, and generates a capacitive mode judging signal at the output end for judging whether the resonant converter works in a capacitive mode or an inductive mode;

the frequency control circuit is provided with a first input end, a second input end, a first output end and a second output end, wherein the first input end and the second input end respectively receive the capacitive mode judging signal and the feedback signal, and generate a first control signal and a second control signal at the first output end and the second output end, and the first control signal and the second control signal are respectively used for controlling the high-side switch and the low-side switch to be switched on and off by the resonant converter in the first control mode;

the capacitive protection circuit is provided with a first input end, a second input end, a first output end and a second output end, the first input end is connected with the capacity mode judging signal, the second input end receives the current detection signal, and the capacitive protection circuit outputs the first capacitive protection signal and the second capacitive protection signal at the first output end and the second output end respectively according to the capacity mode judging signal and the current detection signal and is used for controlling the high-side switch and the low-side switch to be switched on and off respectively in a second control mode by the resonant converter; and

the logic circuit is provided with a first input end, a second input end, a third input end and a fourth input end which are used for respectively receiving a first control signal, a second control signal, a first capacitive protection signal and a second capacitive protection signal, and the logic circuit carries out logic operation on the first control signal, the second control signal, the first capacitive protection signal and the second capacitive protection signal and respectively outputs a high-side switch control signal and a low-side switch control signal at a first output end and a second output end; wherein,

when the capacitive mode judging signal is invalid, the first capacitive protection signal and the second capacitive protection signal are invalid, and the resonant converter is in a first control mode; when the capacitive mode judging signal is effective, the first capacitive protection signal and the second capacitive protection signal are effective, the resonant converter is in a second control mode, the high-side switch control signal and the low-side switch control signal control the high-side switch and the low-side switch to be turned off for N periods at the same time, wherein N is a positive integer greater than or equal to 1;

after the high-side switch and the low-side switch are turned off for N periods, when the current detection signal reaches a zero-crossing threshold value in the rising process, the first capacitive protection signal is invalid, and the high-side switch control signal turns on the high-side switch; after the high-side switch and the low-side switch are turned off for N periods, when the current detection signal reaches a zero-crossing threshold value in the descending process, the second capacitive protection signal is invalid, and the low-side switch control signal switches on the low-side switch; and when any one of the high-side switch and the low-side switch is conducted again, the resonant converter jumps out of the second control mode.

8. The capacitive mode control circuit of claim 7, wherein the zero crossing threshold is a hysteresis signal comprising a first zero crossing threshold and a second zero crossing threshold; wherein the first zero crossing threshold signal is greater than zero and the second zero crossing threshold signal is less than zero.

9. The capacitive mode control circuit of claim 8, wherein at a high side switch turn off time, the capacitive mode decision signal is inactive if the current sense signal is greater than a first zero crossing threshold and active if the current sense signal is less than a second zero crossing threshold; and

at the turn-off moment of the low-side switch, if the current detection signal is greater than a first zero-crossing threshold value, the capacitive mode judgment signal is effective, and if the current detection signal is less than a second zero-crossing threshold value, the capacitive mode judgment signal is ineffective.

10. The capacitive mode control circuit of claim 8, wherein after the high-side switch and the low-side switch are turned off for N cycles, when the current sense signal reaches the zero-crossing threshold during the rise, including when the current sense signal reaches the second zero-crossing threshold during the rise; and

after the high-side switch and the low-side switch are turned off for N periods, when the current detection signal reaches a zero-crossing threshold during the falling process, including when the current detection signal reaches a first zero-crossing threshold during the falling process.

11. The capacitive mode control circuit of claim 8, wherein the capacitive protection circuit comprises a high side switch capacitive protection circuit and a low side switch capacitive protection circuit, wherein,

a high-side switch capacitive protection circuit, comprising:

a first comparison circuit receiving the current detection signal and the second zero-crossing threshold signal, comparing the current detection signal and the second zero-crossing threshold signal, and outputting a first comparison signal having a first logic state and a second logic state; when the current detection signal is greater than the second zero-crossing threshold signal, the first comparison signal is in a first logic state, and when the current detection signal is less than the second zero-crossing threshold signal, the first comparison signal is in a second logic state;

the first counter receives the capacitive mode judging signal and the first comparison signal, and when the capacitive mode judging signal is effective, the first counter starts to count the first comparison signal for N periods and outputs a first counting signal;

the first trigger receives the first counting signal and outputs a first trigger signal, wherein after N periods, when the first comparison signal is at the edge of the transition from the second logic state to the first logic state, the first trigger signal is effective; and

the first logic gate receives the first trigger signal and the capacitive mode judging signal, performs logic operation on the first trigger signal and the capacitive mode judging signal, and outputs a first capacitive protection signal, wherein the first capacitive protection signal is effective when the capacitive mode judging signal is effective, and the first capacitive protection signal is ineffective when the first trigger signal is effective; and

a low side switch capacitive protection circuit comprising:

a second comparison circuit receiving the current detection signal and the first zero-crossing threshold signal, comparing the current detection signal and the first zero-crossing threshold signal, and outputting a second comparison signal having a first logic state and a second logic state; when the current detection signal is greater than the first zero-crossing threshold signal, the first comparison signal is in a first logic state, and when the current detection signal is less than the first zero-crossing threshold signal, the first comparison signal is in a second logic state;

the second counter receives the capacitive mode judging signal and the second comparison signal, and when the capacitive mode judging signal is effective, the second counter starts to count the second comparison signal for N periods and outputs a second counting signal;

the second trigger receives the second counting signal and outputs a second trigger signal, wherein after N periods, when the second comparison signal is at the edge of the transition from the first logic state to the second logic state, the second trigger signal is effective; and

and the second logic gate receives the second trigger signal and the capacitive mode judging signal, performs logic operation on the second trigger signal and the capacitive mode judging signal, and outputs a second capacitive protection signal, wherein the second capacitive protection signal is effective when the capacitive mode judging signal is effective, and the second capacitive protection signal is ineffective when the second trigger signal is effective.

12. The capacitive mode control circuit of claim 8, wherein the logic circuit comprises a third logic gate and a fourth logic gate, wherein,

the third logic gate receives the first capacitive protection signal and the first control signal, performs logic operation on the first capacitive protection signal and the first control signal, and outputs a high-side switch control signal; and

the fourth logic gate receives the second capacitive protection signal and the second control signal, performs logic operation on the second capacitive protection signal and the second control signal, and outputs a low-side switch control signal.