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CN104935327A - Gallium Nitride-Based Low Leakage Current Dual Cantilever Beam Switching NOR Gate - Google Patents

Gallium Nitride-Based Low Leakage Current Dual Cantilever Beam Switching NOR Gate Download PDF

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CN104935327A
CN104935327A CN201510379728.4A CN201510379728A CN104935327A CN 104935327 A CN104935327 A CN 104935327A CN 201510379728 A CN201510379728 A CN 201510379728A CN 104935327 A CN104935327 A CN 104935327A
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mesfet
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cantilever
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cantilever beam
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CN104935327B (en
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廖小平
王小虎
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Southeast University
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Abstract

An NOR gate of a gallium nitride-based double-cantilever switch with low leakage current of the invention uses MESFET with double cantilever switches to replace traditional MESFET, wherein the two cantilever switches are suspended on the gate of the MESFET, and the positions of the two cantilever switches are symmetrical with each other in terms of the source-drain direction of the MESFET. Schottky contact is formed between the gate of the MESFET and a substrate. A depletion layer is formed in the substrate under the gate. The pull-down voltage of the cantilever switch is designed to be equal to the threshold voltage of the MESFET. When the voltage loaded between the cantilever switch and a pull-down electrode is more than the threshold voltage of the MESFET, the cantilever switch is pulled down to stick close to the gate to conduct the MESFET. When the voltage is less than the threshold voltage of the N type MESFET, the cantilever switch could not be pulled down and the MESFET is cut off. When the NOR gate works, the cantilever switch is in a suspending state when the NMOS transistor is closed. The NOR gate of the gallium nitride-based double-cantilever switch with low leakage current reduces the leakage current of the gate so as to reduce the power dissipation of a circuit.

Description

氮化镓基低漏电流双悬臂梁开关或非门Gallium Nitride-Based Low Leakage Current Dual Cantilever Beam Switching NOR Gate

技术领域technical field

本发明提出了GaN(氮化镓)基低漏电流双悬臂梁开关MESFET(金属—半导体场效应晶体管)或非门,属于微电子机械系统的技术领域。The invention provides a GaN (gallium nitride)-based low-leakage current double cantilever beam switch MESFET (metal-semiconductor field effect transistor) NOR gate, which belongs to the technical field of micro-electromechanical systems.

背景技术Background technique

随着无线通信技术的发展,射频集成电路的芯片也迅速发展,集成规模不断扩大,工作频率不断提高,传统的硅基材料已经不能满足要求。基于氮化镓衬底的MESFET就是在这种背景下被提出应用,由于氮化镓材料良好的特性使得由它制造的晶体管具有很高的电子迁移率,很强的抗辐射能力,较大的工作温度范围。由于芯片中晶体管的数量越来越多,随之而来的就是集成电路的功耗问题。随着集成电路的发展,芯片的规模变得很大,人们对于芯片的功耗越来越重视。太高的功耗会对芯片的散热材料提出更高的要求,还会使芯片的性能受到影响。所以,对于器件的低功耗的设计在集成电路的设计中显得越来越重要。With the development of wireless communication technology, the chips of radio frequency integrated circuits are also developing rapidly, the scale of integration continues to expand, and the operating frequency continues to increase. Traditional silicon-based materials can no longer meet the requirements. MESFET based on gallium nitride substrate is proposed and applied under this background. Due to the good characteristics of gallium nitride material, the transistor manufactured by it has high electron mobility, strong radiation resistance, and large range of working temperature. As the number of transistors in a chip increases, so does the power consumption of integrated circuits. With the development of integrated circuits, the scale of chips becomes larger, and people pay more and more attention to the power consumption of chips. Too high power consumption will impose higher requirements on the heat dissipation material of the chip, and will also affect the performance of the chip. Therefore, the design of low power consumption of devices is becoming more and more important in the design of integrated circuits.

或非门电路能够实现两个输入端所输入的数字信号的或非逻辑功能,或非门作为数字电路的重要组成部分,有着巨大的应用,所以对或非门电路的功耗和温度的控制就显得十分重要,由常规MESFET组成的或非门,随着集成度的提升,功耗变得越来越严重,功耗过大带来的芯片过热问题会严重影响集成电路的性能,MEMS技术的发展使得制造具有可动悬臂梁开关的MESFET成为可能,具有可动悬臂梁开关的MESFET可以有效降低栅极漏电流,进而降低或非门电路的功耗。The NOR gate circuit can realize the NOR logic function of the digital signal input by the two input terminals. As an important part of the digital circuit, the NOR gate has a huge application, so the power consumption and temperature control of the NOR gate circuit It is very important. The NOR gate composed of conventional MESFET, with the improvement of integration, the power consumption becomes more and more serious. The chip overheating problem caused by excessive power consumption will seriously affect the performance of integrated circuits. MEMS technology The development of the technology makes it possible to manufacture MESFETs with movable cantilever switches. MESFETs with movable cantilever switches can effectively reduce the gate leakage current, thereby reducing the power consumption of the NOR gate circuit.

发明内容Contents of the invention

技术问题:本发明的目的是提供一种GaN基低漏电流双悬臂梁开关MESFET或非门,将或非门中采用的两个传统MESFET换为一个具有双悬臂梁开关结构的MESFET,在该或非门处于工作状态时,可以有效地降低晶体的栅极漏电流,从而降低或非门的功耗。Technical problem: the purpose of this invention is to provide a kind of GaN base low leakage current double cantilever beam switch MESFET NOR gate, two traditional MESFETs adopted in the NOR gate are changed into a MESFET with double cantilever beam switch structure, in this When the NOR gate is in the working state, the gate leakage current of the crystal can be effectively reduced, thereby reducing the power consumption of the NOR gate.

技术方案:本发明的一种砷化镓基低漏电流双悬臂梁开关或非门由具有双悬臂梁开关N型MESFET,电阻和电源组成,该双悬臂梁开关MESFET是制作在GaN衬底上,该双悬臂梁开关MESFET的源极和漏极由金属和重掺杂N区形成欧姆接触构成,栅极由钛/铂/金合金和N型有源层形成肖特基接触构成,在悬臂梁开关N型MESFET的栅极上方悬浮着两个用钛/金/钛制作而成的对称设计的悬臂梁开关,两个悬臂梁开关的悬浮端之间留有一定缝隙以保证两个悬臂梁开关下拉时互不干扰,两个悬臂梁开关的位置关于该MESFET源-漏方向对称,悬臂梁开关的锚区制作在半绝缘GaN衬底上,在悬臂梁开关与衬底之间存在下拉电极,下拉电极由氮化硅材料覆盖,悬臂梁开关N型MESFET的下拉电极接地,该双悬臂梁开关MESFET的源极接地,漏极通过电阻与电源VCC相连,源极和漏极分别与引线连接,引线用金制作,两路输入信号即信号A和信号B分别在双悬臂梁开关MESFET的两个悬臂梁开关输入,输出信号Y在该双悬臂梁开关MESFET的漏极与电阻之间输出,电阻的阻值远大于该MESFET导通的阻抗,从而保证在悬臂梁开关N型MESFET导通时由电阻分压得到输出为低电平。Technical solution: A gallium arsenide-based low-leakage current double cantilever switch NOR gate of the present invention is composed of a double cantilever switch N-type MESFET, a resistor and a power supply. The double cantilever switch MESFET is fabricated on a GaN substrate , the source and drain of the double cantilever beam switch MESFET are composed of metal and heavily doped N regions to form ohmic contacts, and the gate is composed of titanium/platinum/gold alloy and N-type active layer to form Schottky contacts. Two symmetrically designed cantilever beam switches made of titanium/gold/titanium are suspended above the gate of the beam switch N-type MESFET. A certain gap is left between the suspension ends of the two cantilever beam switches to ensure that the two cantilever beam switches The switches do not interfere with each other when they are pulled down. The positions of the two cantilever switches are symmetrical with respect to the source-drain direction of the MESFET. The anchor region of the cantilever switch is fabricated on a semi-insulating GaN substrate, and there is a pull-down electrode between the cantilever switch and the substrate. , the pull-down electrode is covered by silicon nitride material, the pull-down electrode of the cantilever beam switch N-type MESFET is grounded, the source of the double cantilever beam switch MESFET is grounded, the drain is connected to the power supply VCC through a resistor, and the source and drain are respectively connected to the leads , the leads are made of gold, the two input signals, signal A and signal B, are respectively input to the two cantilever switches of the double cantilever switch MESFET, and the output signal Y is output between the drain and the resistor of the double cantilever switch MESFET, The resistance value of the resistor is much larger than the turn-on impedance of the MESFET, so as to ensure that the output obtained by dividing the voltage by the resistor is a low level when the N-type MESFET of the cantilever beam switch is turned on.

所述的两个悬臂梁开关是依靠锚区的支撑悬浮在栅极上方,栅极与衬底之间形成了肖特基接触;该N型MESFET的两个悬臂梁开关的下拉电压设计的与该N型MESFET的阈值电压相等,只有当N型MESFET的悬臂梁开关上所加的电压大于N型MESFET的阈值电压时,其悬臂梁开关才能下拉并接触栅极从而使双悬臂梁开关MESFET导通,当所加电压小于N型MESFET的阈值电压时悬臂梁开关就不能下拉,MESFET关断,在或非门工作时,当N型MESFET处于关断时其悬臂梁开关就处于悬浮态,降低了栅极漏电流,从而降低了电路的功耗。The two cantilever switches are suspended above the gate relying on the support of the anchor region, and a Schottky contact is formed between the gate and the substrate; the pull-down voltage of the two cantilever switches of the N-type MESFET is designed in accordance with The threshold voltages of the N-type MESFETs are equal, and only when the voltage applied to the cantilever switch of the N-type MESFET is greater than the threshold voltage of the N-type MESFET, the cantilever switch can be pulled down and contact the gate so that the double cantilever switch MESFET conducts When the applied voltage is less than the threshold voltage of the N-type MESFET, the cantilever switch cannot be pulled down, and the MESFET is turned off. When the NOR gate is working, when the N-type MESFET is turned off, the cantilever switch is in a suspended state, reducing the gate leakage current, thereby reducing power dissipation in the circuit.

在工作时,该或非门的两个数字信号输入端A和B,只要有一路为高电平,该高电平输入信号通过锚区加在双悬臂梁开关MESFET的悬臂梁开关上,能够使悬臂梁开关下拉并接触栅极使双悬臂梁开关MESFET导通,从而使输出Y为低电平,只有当两个数字信号输入端都为低电平时,双悬臂梁开关MESFET的两个悬臂梁开关都不能下拉,该MESFET关断,则输出Y为高电平,从而实现对输入信号进行或非的功能该或非门中的双悬臂梁开关MESFET处于关断态时其悬臂梁开关处于悬浮状态,降低了栅极漏电流,从而降低了电路的功耗,或非门的真值表:When working, as long as one of the two digital signal input terminals A and B of the NOR gate is high level, the high level input signal is added to the cantilever switch of the double cantilever beam switch MESFET through the anchor area, which can Make the cantilever beam switch pull down and touch the gate to turn on the dual cantilever beam switch MESFET, so that the output Y is low, and only when both digital signal inputs are low, the two cantilever beams of the dual cantilever beam switch MESFET Beam switches cannot be pulled down, the MESFET is turned off, and the output Y is high level, so as to realize the function of NORing the input signal The double cantilever beam switch MESFET in the NOR gate is in the suspended state when the cantilever beam switch is in the off state, which reduces the gate leakage current, thereby reducing the power consumption of the circuit. The truth table of the NOR gate:

AA BB YY 00 00 11 11 00 00

00 11 00 11 11 00

有益效果:本发明的GaN基低漏电流双悬臂梁开关MESFET或非门中的双悬臂梁开关MESFET的的两个悬臂梁开关下拉与N型MESFET栅极相接触时,N型MESFET导通。当悬臂梁开关与下拉电极之间所加电压小于MESFET的阈值电压时,悬臂梁开关不能下拉,N型MESFET关断,此时悬臂梁开关处于悬浮态,降低了栅极漏电流从而降低了该或非门的功耗。Beneficial effects: when the two cantilever switches of the double cantilever switch MESFET in the GaN-based low leakage current MESFET NOR gate are pulled down and contact the gate of the N-type MESFET, the N-type MESFET is turned on. When the voltage applied between the cantilever switch and the pull-down electrode is less than the threshold voltage of the MESFET, the cantilever switch cannot be pulled down, and the N-type MESFET is turned off. At this time, the cantilever switch is in a floating state, which reduces the gate leakage current and thus reduces the The power consumption of the NOR gate.

附图说明Description of drawings

图1为本发明GaN基低漏电流双悬臂梁开关MESFET或非门的俯视图,1 is a top view of a GaN-based low-leakage current double cantilever switch MESFET NOR gate of the present invention,

图2为图1GaN基低漏电流双悬臂梁开关MESFET或非门的P-P’向的剖面图,Figure 2 is a cross-sectional view of the P-P' direction of the GaN-based low-leakage current double cantilever switch MESFET NOR gate in Figure 1,

图3为图1GaN基低漏电流双悬臂梁开关MESFET或非门的A-A’向的剖面图,Figure 3 is a cross-sectional view of the A-A' direction of the GaN-based low-leakage current double cantilever switch MESFET NOR gate in Figure 1,

图中包括:双悬臂梁开关N型MESFET1,电阻2,半绝缘GaN衬底3,引线4,栅极5,悬臂梁开关6,锚区7,下拉电极板8,氮化硅层9,源极10,N型有源层11,漏极12。The figure includes: double cantilever switch N-type MESFET1, resistor 2, semi-insulating GaN substrate 3, lead 4, gate 5, cantilever switch 6, anchor region 7, pull-down electrode plate 8, silicon nitride layer 9, source Pole 10, N-type active layer 11, drain 12.

具体实施方式Detailed ways

本发明的GaN基低漏电流双悬臂梁开关MESFET或非门由一个双悬臂梁开关N型MESFET和一个电阻组成,该GaN基低漏电流双悬臂梁开关MESFET的源极接地,两路输入信号分别接在该MESFET的两个悬臂梁开关上,漏极与电阻相连并与电源接在一起,输出信号在漏极与电阻之间输出,该电阻远大于MESFET导通阻抗从而在MESFET导通时输出为低电平。该MESFET的源极和漏极由金属和重掺杂N区形成欧姆接触构成,栅极由钛/铂/金合金和N型有源层形成肖特基接触构成,在悬臂梁开关N型MESFET的栅极上方悬浮着两个用钛/金/钛制作而成的对称设计的悬臂梁开关,两个悬臂梁开关的悬浮端留有一定缝隙以保证两个悬臂梁开关下拉时互不干扰,两个悬臂梁开关的位置关于该N型MESFET源-漏方向对称。交流信号加载在两个悬臂梁开关上,悬臂梁开关的锚区制作在半绝缘GaN衬底上,在悬臂梁开关与衬底之间存在下拉电极,下拉电极由氮化硅材料覆盖,悬臂梁开关N型MESFET的下拉电极接地。The GaN-based low-leakage current double-cantilever switch MESFET NOR gate of the present invention is composed of a double-cantilever switch N-type MESFET and a resistor. The source of the GaN-based low-leakage current double-cantilever switch MESFET is grounded, and two input signals They are respectively connected to the two cantilever switches of the MESFET, the drain is connected to the resistor and connected to the power supply, the output signal is output between the drain and the resistor, the resistance is much larger than the on-resistance of the MESFET so that when the MESFET is turned output is low. The source and drain of the MESFET are composed of metal and heavily doped N regions to form ohmic contacts, and the gate is composed of titanium/platinum/gold alloys and N-type active layers to form Schottky contacts. In the cantilever beam switch N-type MESFET Two cantilever beam switches with symmetrical design made of titanium/gold/titanium are suspended above the grid. A certain gap is left at the suspension ends of the two cantilever beam switches to ensure that the two cantilever beam switches do not interfere with each other when they are pulled down. The positions of the two cantilever switches are symmetrical about the source-drain direction of the N-type MESFET. The AC signal is loaded on two cantilever beam switches. The anchor area of the cantilever beam switch is fabricated on a semi-insulating GaN substrate. There is a pull-down electrode between the cantilever beam switch and the substrate. The pull-down electrode is covered by silicon nitride material. The cantilever beam The pull-down electrode of the switching N-type MESFET is grounded.

本发明中的或非门所使用的双悬臂梁开关N型MESFET的悬臂梁开关是悬浮在其栅极之上的,N型MESFET的栅极与衬底之间形成了肖特基接触,在栅极下方的衬底中形成耗尽层,该N型MESFET的悬臂梁开关的下拉电压设计得与MESFET的阈值电压相等,当加载在悬臂梁开关与下拉电极之间的电压大于MESFET的阈值电压时,悬臂梁开关下拉与栅极紧贴,N型MESFET导通。当悬臂梁开关与下拉电极之间所加电压小于MESFET的阈值电压时,悬臂梁开关不能下拉,N型MESFET关断,此时悬臂梁开关处于悬浮态,降低了栅极漏电流从而降低了该或非门的功耗。The cantilever switch of the double cantilever switch N-type MESFET used in the NOR gate in the present invention is suspended above its gate, and a Schottky contact is formed between the gate of the N-type MESFET and the substrate. A depletion layer is formed in the substrate below the gate. The pull-down voltage of the cantilever switch of the N-type MESFET is designed to be equal to the threshold voltage of the MESFET. When the voltage loaded between the cantilever switch and the pull-down electrode is greater than the threshold voltage of the MESFET When the cantilever beam switch is pulled down and close to the gate, the N-type MESFET is turned on. When the voltage applied between the cantilever switch and the pull-down electrode is less than the threshold voltage of the MESFET, the cantilever switch cannot be pulled down, and the N-type MESFET is turned off. At this time, the cantilever switch is in a floating state, which reduces the gate leakage current and thus reduces the The power consumption of the NOR gate.

该或非门的两个数字信号输入端只要有一路为高电平,该高电平输入信号通过锚区加在双悬臂梁开关N型MESFET的悬臂梁开关上,能够使该悬臂梁开关下拉并且导通,从而使输出为低电平。只有当两个数字信号输入端都为低电平时,双悬臂梁开关N型MESFET的两个悬臂梁开关都不能下拉,双悬臂梁开关N型MESFET不能导通,则输出为高电平,从而实现对输入信号进行或非的功能该或非门中的双悬臂梁开关N型MESFET处于关断态时其悬臂梁开关处于悬浮状态,此时该或非门中的MESFET上不存在栅极漏电流。或非门的真值表:As long as one of the two digital signal input terminals of the NOR gate is high level, the high level input signal is added to the cantilever switch of the double cantilever beam switch N-type MESFET through the anchor area, which can make the cantilever beam switch pull down And conduction, so that the output is low. Only when the two digital signal input terminals are both low, the two cantilever switches of the double cantilever switch N-type MESFET cannot be pulled down, and the double cantilever switch N-type MESFET cannot be turned on, then the output is high level, thus Realize the function of NORing the input signal When the double cantilever switch N-type MESFET in the NOR gate is in the off state, the cantilever switch is in a suspended state, and there is no gate leakage current on the MESFET in the NOR gate at this time. Truth table for NOR gate:

AA BB YY 00 00 11 11 00 00 00 11 00 11 11 00

GaN基低漏电流双悬臂梁开关MESFET或非门的制备方法包括以下几个步骤:The preparation method of the GaN-based low-leakage current double cantilever switch MESFET NOR gate includes the following steps:

1)准备半绝缘GaN衬底;1) Prepare a semi-insulating GaN substrate;

2)淀积氮化硅,用等离子体增强型化学气相淀积法工艺(PECVD)生长一层氮化硅,然后光刻和刻蚀氮化硅,去除N型MESFET有源区的氮化硅;2) Deposit silicon nitride, grow a layer of silicon nitride by plasma enhanced chemical vapor deposition (PECVD), and then photolithography and etch silicon nitride to remove silicon nitride in the active area of N-type MESFET ;

3)N型MESFET有源区离子注入:注入磷后,在氮气环境下退火;退火完成后,在高温下进行N+杂质再分布,形成N型MESFET有源区的N型有源层;3) Ion implantation in the active area of N-type MESFET: after implanting phosphorus, anneal in nitrogen environment; after annealing, redistribute N + impurities at high temperature to form the N-type active layer in the active area of N-type MESFET;

4)去除氮化硅层:采用干法刻蚀技术将氮化硅全部去除;4) Removing the silicon nitride layer: using dry etching technology to remove all the silicon nitride;

5)光刻开关区,去除开关区的光刻胶;5) photolithography switch area, removing the photoresist in the switch area;

6)电子束蒸发钛/铂/金;6) Electron beam evaporation of titanium/platinum/gold;

7)去除光刻胶以及光刻胶上的钛/铂/金;7) removing the photoresist and the titanium/platinum/gold on the photoresist;

8)加热,使钛/铂/金合金与N型GaN有源层形成肖特基接触;8) heating to form a Schottky contact between the titanium/platinum/gold alloy and the N-type GaN active layer;

9)涂覆光刻胶,光刻并刻蚀N型MESFET源极和漏极区域的光刻胶;9) Coating photoresist, photolithography and etching the photoresist in the source and drain regions of the N-type MESFET;

10)注入重掺杂N型杂质,在N型MESFET源极和漏极区域形成的N型重掺杂区,注入后进行快速退火处理;10) Implanting heavily doped N-type impurities, forming N-type heavily doped regions in the N-type MESFET source and drain regions, and performing rapid annealing after implantation;

11)光刻源极和漏极,去除引线、源极和漏极的光刻胶;11) Photoetching the source and drain, removing the photoresist of the leads, source and drain;

12)真空蒸发金锗镍/金;12) Vacuum evaporation of gold germanium nickel/gold;

13)去除光刻胶以及光刻胶上的金锗镍/金;13) remove the photoresist and the gold germanium nickel/gold on the photoresist;

14)合金化形成欧姆接触,形成引线、源极和漏极;14) Alloying to form ohmic contact, forming leads, source and drain;

15)涂覆光刻胶,去除输入引线、电极板和固支梁的锚区位置的光刻胶;15) Coating photoresist, removing the photoresist at the anchor area position of the input lead, the electrode plate and the fixed support beam;

16)蒸发第一层金,其厚度约为0.3μm;16) Evaporate the first layer of gold with a thickness of about 0.3 μm;

17)去除光刻胶以及光刻胶上的金,初步形成输入引线、电极板和固支梁的锚区;17) Remove the photoresist and the gold on the photoresist, and initially form the anchor area of the input lead, the electrode plate and the fixed support beam;

18)淀积氮化硅:用等离子体增强型化学气相淀积法工艺(PECVD)生长厚的氮化硅介质层;18) Deposition of silicon nitride: growth by plasma-enhanced chemical vapor deposition (PECVD) Thick silicon nitride dielectric layer;

19)光刻并刻蚀氮化硅介质层,保留在电极板上的氮化硅;19) Photolithography and etching the silicon nitride dielectric layer, and the silicon nitride on the electrode plate is retained;

20)淀积并光刻聚酰亚胺牺牲层:在砷化镓衬底上涂覆1.6μm厚的聚酰亚胺牺牲层,要求填满凹坑;光刻聚酰亚胺牺牲层,仅保留固支梁下方的牺牲层;20) Deposit and lithography polyimide sacrificial layer: Coat a 1.6 μm thick polyimide sacrificial layer on the gallium arsenide substrate, and it is required to fill the pits; photolithography polyimide sacrificial layer, only Retain the sacrificial layer under the fixed beam;

21)蒸发钛/金/钛,其厚度为蒸发用于电镀的底金;21) Evaporate titanium/gold/titanium to a thickness of Evaporation of base gold for electroplating;

22)光刻:去除要电镀地方的光刻胶;22) Photolithography: remove the photoresist at the place to be electroplated;

23)电镀金,其厚度为2μm;23) Gold electroplating, the thickness of which is 2 μm;

24)去除光刻胶:去除不需要电镀地方的光刻胶;24) Remove photoresist: remove photoresist where electroplating is not required;

25)反刻钛/金/钛,腐蚀底金,形成固支梁;25) Anti-etch titanium/gold/titanium, corrode the bottom gold, and form a solid support beam;

26)释放聚酰亚胺牺牲层:显影液浸泡,去除固支梁下的聚酰亚胺牺牲层,去离子水稍稍浸泡,无水乙醇脱水,常温下挥发,晾干。26) Release the polyimide sacrificial layer: soak in developer solution, remove the polyimide sacrificial layer under the fixed beam, soak in deionized water for a while, dehydrate with absolute ethanol, volatilize at room temperature, and dry in the air.

本发明与现有技术的区别在于:The difference between the present invention and prior art is:

本发明中的或非门所使用的双悬臂梁开关MESFET的两个悬臂梁开关是悬浮在其栅极之上的,N型MESFET的栅极与衬底之间形成了肖特基接触,在栅极下方的衬底中形成耗尽层,该N型MESFET的悬臂梁开关的下拉电压设计得与MESFET的阈值电压相等,当加载在悬臂梁开关与下拉电极之间的电压大于MESFET的阈值电压时,悬臂梁开关下拉与栅极紧贴,N型MESFET导通。当悬臂梁开关与下拉电极之间所加电压小于MESFET的阈值电压时,悬臂梁开关不能下拉,其MESFET关断,此时悬臂梁开关处于悬浮态,降低了栅极漏电流从而降低了该或非门的功耗。Two cantilever switches of the double cantilever switch MESFET used in the NOR gate in the present invention are suspended above its gate, and a Schottky contact is formed between the gate of the N-type MESFET and the substrate, and the A depletion layer is formed in the substrate below the gate. The pull-down voltage of the cantilever switch of the N-type MESFET is designed to be equal to the threshold voltage of the MESFET. When the voltage loaded between the cantilever switch and the pull-down electrode is greater than the threshold voltage of the MESFET When the cantilever beam switch is pulled down and close to the gate, the N-type MESFET is turned on. When the voltage applied between the cantilever beam switch and the pull-down electrode is less than the threshold voltage of the MESFET, the cantilever beam switch cannot be pulled down, and the MESFET is turned off. At this time, the cantilever beam switch is in a floating state, which reduces the gate leakage current and thus reduces the or The power consumption of the NOT gate.

满足以上条件的结构即视为本发明的GaN基低漏电流双悬臂梁开关MESFET或非门。A structure satisfying the above conditions is regarded as the GaN-based low-leakage current double cantilever switch MESFET NOR gate of the present invention.

Claims (2)

1. a GaAs based low-leakage current double cantilever beam switch NOR gate, it is characterized in that this NOR gate is by having double cantilever beam switch N-type MESFET (1), resistance (2) and power supply composition, this double cantilever beam switch MESFET (1) is produced on semi-insulating GaN substrate (3), the source electrode (10) of this double cantilever beam switch MESFET (1) and drain electrode (12) form ohmic contact by metal and heavy doping N district and form, grid (5) forms Schottky contacts by titanium/platinum/billon and N-type active layer (11) and forms, grid (5) top in cantilever switch N-type MESFET (1) left floating the cantilever switch (6) of the symmetric design that two are made with titanium/gold/titanium, do not interfere with each other when leaving certain gap between the suspension end of two cantilever switch (6) to ensure that two cantilever switch (6) are drop-down, the position of two cantilever switch (6) is symmetrical about this MESFET source-drain direction, the anchor district (7) of cantilever switch (6) is produced on semi-insulating GaN substrate (3), pull-down electrode (8) is there is between cantilever switch (6) and substrate, pull-down electrode (8) is covered by silicon nitride material (9), pull-down electrode (8) ground connection of cantilever switch N-type MESFET (1), source electrode (10) ground connection of this double cantilever beam switch MESFET (1), drain electrode (12) is connected with power supply VCC by resistance (2), source electrode (10) is connected with lead-in wire (4) respectively with drain electrode (12), lead-in wire (4) gold makes, two-way input signal and signal A and signal B are respectively in two cantilever switch (6) inputs of double cantilever beam switch MESFET (1), output signal Y exports between the drain electrode (12) and resistance (2) of this double cantilever beam switch MESFET (1), the resistance of resistance (2) is much larger than the impedance of this MESFET conducting, thus ensure that obtaining output when cantilever switch N-type MESFET (1) conducting by electric resistance partial pressure is low level.
2. GaAs based low-leakage current double cantilever beam switch NOR gate according to claim 1, it is characterized in that two described cantilever switch (6) are being supported and suspended on above grid (5) of dependence anchor district (7), between grid (5) and substrate (3), define Schottky contacts, two cantilever switch (6) of this N-type MESFET actuation voltage design equal with the threshold voltage of this N-type MESFET, only have when the upper added voltage of cantilever switch (6) of N-type MESFET is greater than the threshold voltage of N-type MESFET, its cantilever switch (6) could be drop-down and contact grid (5) thus make double cantilever beam switch MESFET (1) conducting, when institute's making alive is less than the threshold voltage of N-type MESFET, cantilever switch (6) just can not be drop-down, MESFET turns off, when NOR gate works, when N-type MESFET is in shutoff, its cantilever switch (6) is just in suspended state, reduce grid leakage current, thus reduce the power consumption of circuit.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1051296A (en) * 1996-08-06 1998-02-20 Nippon Telegr & Teleph Corp <Ntt> Logic circuit
US20110114980A1 (en) * 2009-11-19 2011-05-19 Ung Lee Semiconductor light-emitting device and method for manufacturing the same
US20110180806A1 (en) * 2010-01-28 2011-07-28 Intersil Americas Inc. Monolithic integration of gallium nitride and silicon devices and circuits, structure and method
CN102735935A (en) * 2012-06-20 2012-10-17 东南大学 Phase detector based on micro-mechanical silicon-based cantilever beam and detection method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1051296A (en) * 1996-08-06 1998-02-20 Nippon Telegr & Teleph Corp <Ntt> Logic circuit
US20110114980A1 (en) * 2009-11-19 2011-05-19 Ung Lee Semiconductor light-emitting device and method for manufacturing the same
US20110180806A1 (en) * 2010-01-28 2011-07-28 Intersil Americas Inc. Monolithic integration of gallium nitride and silicon devices and circuits, structure and method
CN102735935A (en) * 2012-06-20 2012-10-17 东南大学 Phase detector based on micro-mechanical silicon-based cantilever beam and detection method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
周桂林: "增强型GaNMOSFET的制备及其绝缘栅的电荷特性研究", 《中国科技论文》 *

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