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CN104885577B - Electric current in printed circuit board (PCB) is reallocated - Google Patents

Electric current in printed circuit board (PCB) is reallocated Download PDF

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Publication number
CN104885577B
CN104885577B CN201380068753.XA CN201380068753A CN104885577B CN 104885577 B CN104885577 B CN 104885577B CN 201380068753 A CN201380068753 A CN 201380068753A CN 104885577 B CN104885577 B CN 104885577B
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China
Prior art keywords
pattern
electric current
layer
pcb
power plane
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CN201380068753.XA
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Chinese (zh)
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CN104885577A (en
Inventor
古翰姆·塞巴维特
杰维德·穆罕默德
苏布拉马尼安·拉马纳坦
斯蒂芬·西尔斯
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Cisco Technology Inc
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Cisco Technology Inc
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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/225Correcting or repairing of printed circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/093Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09681Mesh conductors, e.g. as a ground plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969Apertured conductors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

In one implementation, multilayer board is configured as redirecting electric current distribution.Electric current can be distributed by guiding, stopping or otherwise manipulate electric current flowing.Multilayer board includes at least one power plane layer 100b.The power plane layer unevenly distributes electric current.On the contrary, the power plane layer includes multiple patterns with different resistance.These patterns may include shade pattern 113, grid pattern, directionality pattern 101, fluting, gap or continuous pattern.The pattern is that predetermined spatial variations make it that the flowing of electric current in the first region is different from flowing in the second area.

Description

Electric current in printed circuit board (PCB) is reallocated
Technical field
Present disclose relates generally to art of printed circuit boards, relates more specifically to the printed circuit that there is high current to apply Plate.
Background technology
Printed circuit board (PCB) (PCB) is almost used in each consumption and industrial electrical equipment.PCB supports multiple in structure Electronic building brick.Cabling on PCB provides signal to electronic building brick.PCB can have single side signals layer, two-way signal layer or multilayer. PCB with multilayer is with one or more " printing " circuit layer separated by one or more separation layers.Electronics on surface The electroplating ventilating hole under the certain layer of printed circuit is got into component connection.
Higher and higher electric current can cause to burn out, open a way, or due to there is no enough areas to can be used for power supply on PCB Electric power deficiency caused by supply.In addition, such current crowding causes high resistance (IR) to drop.Increased IR drops are based on electric current Path length influences to pass to the power of component.Increased IR drops cause extra heat, this may cause the layering of PCB.
In addition, there is some High density of PCB limited space to be used for the through hole to other layer of transmission electric current.It is if fewer Through hole is installed on PCB, then more electric currents is by each through hole, so as to produce the electric current higher than tolerable grade.
Brief description of the drawings
The exemplary embodiment of the present embodiment is described herein with reference to attached drawing.
Fig. 1 shows multilayer board (PCB).
Fig. 2 shows the exemplary power plane of the multi-layer PCB of Fig. 1.
Fig. 3 shows the another exemplary power plane of the multi-layer PCB of Fig. 1.
Fig. 4 shows that the three-dimensional of exemplary multiple layer printed circuit board (PCB) attempts.
Fig. 5 shows that another three-dimensional of the multilayer board of Fig. 4 attempts.
Fig. 6 is the top view of the multilayer board of Fig. 4.
Fig. 7 shows the map of current of the multilayer board of Fig. 4.
Fig. 8 shows the developer layer of another exemplary multilayer board.
Fig. 9 is shown according to one embodiment, for manufacturing the manufacturing equipment of multilayer printed circuit.
Figure 10 shows the exemplary process diagram of the manufacturing process for the printed circuit board (PCB) reallocated with electric current.
Figure 11 shows the exemplary process diagram of the electric current redistribution process in power plane.
Figure 12 shows the exemplary process diagram of the electric current redistribution process around through hole.
Embodiment
General introduction
In one embodiment, a kind of device (such as printed circuit board (PCB)) includes:Signals layer, power plane layer and in signal Insulating layer between layer and power plane layer.Power plane layer includes conductive sheet, which has predetermined spatial variations, make It is different from the electric current flowed in the second area to obtain the electric current flowed in the first region.
In another embodiment, a kind of device (such as printed circuit board (PCB)) includes:Dielectric substrate layers and power plane layer.Electricity Source plane layer includes the first pattern (pattern) of conductive material and the second pattern of conductive material.Power plane layer adjoining is exhausted Edge substrate layer.First pattern of conductive material is configured as the first flowing in guiding electric current in a predetermined direction, and conduction material Second pattern of material is configured as guiding the second of electric current to flow in a manner of different from the first pattern.First figure of conductive material Second pattern of sample and conductive material lies substantially in common potential.
In another embodiment, a kind of method includes:Electric current is received at the power plane of multilayer board, is based on First pattern of conductive material boots up electric current in the first party of power plane, and the second pattern based on conductive material exists The second party of power plane boots up electric current.
Exemplary embodiment
One challenge of high-end route platform is printed circuit board (PCB) (PCB) density.Per the requirement of generation electronic equipment in electric current The notable growth of aspect, and generally remained unchanged to current PCB space.The growth of caused current density causes perpendicular interconnection Path (i.e. through hole, via) is limited near load equipment (for example, voltage regulator module).Since positioning causes different loads Equipment may receive the different magnitudes of current, this is undesired.Opposed Current is distributed based on the resistance from power supply to load.Selection The resistance increased in path to property can make electric current reallocate.Following embodiments are included in optionally right in the power plane of PCB The technology that electric current is reallocated.
Fig. 1 shows multilayer board 10.Multilayer board 10 can have the layer of any amount and/or type Or plane.Multilayer board 10 shown in Fig. 1 includes the first signal plane 11, power plane 12, ground plane 13 and the Binary signal plane 14.Printed circuit board (PCB) 10 may include ground plane 13 and the power plane separated by other one or more layers 12, or may include the signal plane 11 and 14 in adjoining course.In addition, printed circuit board (PCB) 10 may include multiple power planes. Multiple power planes may include one or more parallel paths, be set for reaching load from the electric current of identical or different power supply It is standby.
The signal that signal plane 11 and 14 includes the signal code that carrying is electrically coupled between the electronic building brick of signals layer is walked Line.Electric current is passed to signal plane 11 and 14 by power plane 12.Signal code may include AC signals, DC signals or the two all Have.Signal plane 11 and 14 can be formed by various processing.One exemplary process is addition process, and wherein conductive material is electric Plate, add or be printed on and be electrically connected on substrate surface in the path of electronic building brick.Another example is subtraction process, wherein conduction material Material is plated, adds or prints over the entire substrate, and is produced by etching away or subtracting the undesired part of conductive material Raw desired path.Conductive material can be copper or another material.
Signal plane 11 and 14 is electrically connected to power plane 12 and ground plane 12 by one or more through holes.Through hole It is electrical connections of one or more of the electric PCB between plane or layer.Through hole can be to provide the piece of metal of electrical connection.Through hole Can at one end or both ends have pad.Pad is the zonule of conductive material (such as copper).Through hole may include to have and run through The hole of one or more layers the conductor of PCB.
Through hole can be formed by drilling through one or more layers and with the inner surface that plated with conductive material drills.Based on through hole Size, through hole can be by rated current.Rated current can be directly proportional to the diameter of through hole, or with the sectional area of through hole into just Than.The example of rated current and hole size includes:Corresponding 1.7 amperes of 10 mils (mil), 15 mils correspond to 2.2 amperes and 25 mils correspond to 3.2 amperes.Other hole sizes and rated current can be used.Rated current can also proportionally be based on through hole Thickness of coating.
Some electrical components (for example, microprocessor) need high current in the case of fixed voltage.Voltage regulator module passes through DC to DC converters provide the high current with fixed voltage.Space around voltage regulator module includes some through holes, these are logical Hole it is sufficiently large with to other layers provide high current.However, space is limited.Some through holes are close to the place of electric current (or source).This A little close through holes are a parts for the shorter path of electric current.Shorter path has less resistance, and former by current divider Manage to carry more electric currents.The electric current of growth can exceed that the class rating of through hole.Following embodiments are in printed circuit board (PCB) Electric current guide to guide electric current and/or block electric current.
In conventional example, power plane 12 and ground plane 13 can be made of continuous sheet of conductive material.Continuously Sheet of conductive material can refer to all standing (full pour), the covering of full copper or surface.Sheet of conductive material has general uniform Resistance.The resistance of general uniform is the resistance of the change in permission (for example, 0.1%, 1%, 5%).Alternatively, general uniform The pressure drop that the resistance that resistance can be defined as source to load produces is less than predetermined value.Predetermined value (for example, 0.1 volt, 0.3 volt) can be from Logic levels (for example, 1.5 volts, 5.0 volts) needed for electronic building brick carry out tolerable change.Predetermined value can be in same PCB Electronic building brick between be varied from.
Following embodiments are not including being that the power supply of the serialgram of conductive material and/or the resistance without general uniform is put down Face.Discontinuous pattern be used to optionally boot up electricity from the side for spending the through hole to the under utilized through hole that use more Stream.The part of the serialgram of conductive material can be removed to form discontinuous pattern.
Discontinuous pattern can be shade pattern, directionality pattern, fluting pattern or isolation pattern.Shade pattern is to lead The grid or grid of electric material.Shade pattern is determined by the width in the gap between the width of current-carrying part and adjacent current-carrying part Justice.Dash area includes the current-carrying part extended to two or more directions.Directionality pattern is included in what a direction extended Current-carrying part.Fluting pattern is the gap in conductive material.Pattern of slotting can be L-type, U-shaped, half U type or another shape.L-type Fluting pattern extends in the two directions.L-type fluting pattern redirects electric current on the both sides of through hole or another current element. U-shaped fluting pattern is bent or is otherwise extended in three directions.U-shaped fluting pattern is in through hole or another current element Three sides on redirect electric current.Half U type open slot pattern includes three or more sections with through hole or another current element Electric current is redirected on both sides.Isolation pattern is the gap in the conductive pattern of through hole.The combination of other patterns or pattern It can be used.
Fig. 2 shows exemplary power plane layer 12.Power plane layer 12 includes a variety of patterns of pattern in conductive sheet.Figure One or more of sample changes including predetermined space, so that the electric current flowed in the first region with flowing in the second area Electric current it is different.Electric current flowing be not both because resistance in first area or pattern with the resistance in second area or pattern not Together.These resistance can be measured with the ohmage (that is, " every square of ohm ") of every square unit.
Example shown in Fig. 2 includes four patterns or region.These regions have identical or different size and/or shape Shape.As shown in Fig. 2, each region is the square of formed objects.In other embodiments, a region by two or three as Limit is formed.In other embodiments, a region is circular tubular shape, and another region be internal block (such as annular hole, donut hole).Arbitrary region disconnecting or segmentation can be used.Any number of region can be used.
There is different predetermined spaces to change in each region, and the change of these predetermined spaces is defined by grid pattern.Region 22 include intensive grid.Region 24 includes sparse grid.Region 21 and 23 has the grid in medium gap.This four patterns Or each in region is defined by sizing grid and gap size.Sizing grid is the thickness (t) of the current-carrying part of pattern. Exemplary thickness includes 1 millimeter, 10-100 mils or 100-800 microns.Gap size (g) is the interval between current-carrying part. Exemplary compartment includes 1 millimeter, 50-900 mils or 500-1000 microns.Any combination of sizing grid and gap size can quilt For creating the discontinuous pattern of the conductive material with specific electrical resistance.In other embodiments, the pattern in given area can Change as the function of position, for example, make gap size on one or more directions in the region between two values into Row conversion.
Pattern can be defined by the ratio of conductive material size and gap size.Exemplary ratios include 1,1/2 and 1/4. Pattern can also be defined by the percentage of remaining how many conductive material in description piece.Exemplary percentage of coverage include 10%, 50% and 90%.In one embodiment, percentage of coverage is between the 40% of insulating layer size and 95%.
Resistance difference guiding electric current between region, because path of the electric current selection with minimum resistance.In one example, Region 24 has the resistance of every square of 50 milliohms, and region 23 has the resistance of every square of 40 milliohms, and region 22, which has, often puts down The resistance of 25 milliohms of side, and region 21 has the resistance of every square of 10 milliohms.
Grid can be from a region to next region alignment, or grid can advance in different directions.For example, region 23 Including the current-carrying part vertically and horizontally advanced, and region 24 includes the current-carrying part diagonally advanced.Electric current can flow vertically through area Domain 24, but the path is longer than the path for extending diagonally across region 24, and resistance will height.
Fig. 3 shows another exemplary power plane layer 12.Power plane layer 12 includes being configured as the side of guiding electric current Tropism pattern.Power plane layer 12 includes region 31-34.Each in the 31-34 of region is included to define the list of direction pattern The current-carrying part of one direction extension.Each in the 31-34 of region is in one direction with high resistance and on other direction With low resistance.Low resistance can be 1-10 milliohms per cm.High resistance can be 1-10 kilohms per cm.
For example, the electric current perpendicular flow in region 31.Gap between current-carrying part prevents electric current to other direction stream It is dynamic.Flow electric current diagonal in region 32 and 33.Region 34 is continuous part.There is no conductive material from piece in region 34 Middle removal.Electric current unfetteredly flows on some or all directions in region 34.
Figure 4 and 5 show that two three-dimensionals of multi-layer PCB attempt.Fig. 6 is the top view of multi-layer PCB.PCB includes layer 100a- b.Layer 100b is power plane layer.Layer 100a is top layer.Top layer redistribution current between through hole 109.Including electric current cabling Other layers be also included in wherein, but have been not shown so that power plane layer 100b is visible.In one embodiment, push up Layer 100a is considered as power plane layer, and power supply is not included in top layer 100a.Top layer 100a can be manipulated to distribution electricity Stream.
Power plane layer 100b includes multiple patterns.Directionality pattern 101 at least partly guides electric current to lead to away from neighbouring Hole.Directionality pattern 101 is on most directions with high resistance and in one direction with low resistance.From directionality pattern 101 the first shade of the current direction patterns 103 and the second shade pattern 113 out flowed to current flow devices 107.First echo 103 and second shade pattern 113 of sample has different resistance.In addition, the first shade pattern 103 and the second shade pattern 113 draw Lead most of electric current to flow in different directions, as shown in Figure 7.
Additionally or alternatively, layer 100b includes one or more gaps to guide electric current.Rectilinear clearance 115 is a side Upwardly extend, and stop some electric currents from selected through hole.Angled gap 105a-b prolongs in more than one directions Stretch.For example, angled gap 105a is U-shaped in Fig. 5, and angled gap 105b is half U type.Other shapes and big Small gap can be included to guiding electric current.Angled gap 105a-b parts surround particular via.
In one example, the distance between angled gap 105a and current flow devices 107 are 38 mils, angled 52 mils during the widest portion of gap 105a, and the distance between angled gap 105a and 105b is 18 mils.Other away from From can be used in any arrangement, which can be selected either automatically or manually.
One or more through holes 109 extend through multi-layer PCB.Conductive area portion around selected through hole 109 can be moved Divided by create the gap for the part for only being around through hole 109.The gap can increase between through hole and current flow devices 107 The transmission path of through hole 109.The gap can be connected to the region of power plane to reduce with other positions and by limitation Electric current.
Current flow devices 107 can be current source or current sink.In one example, current flow devices 107 are from power plane Layer 100b obtains the outputting inductance of electric current.In another example, current flow devices 107 are the voltage-stablizer moulds powered to other equipment Block.
Current flow devices 107 can be the power supply powered to power plane layer 100b.Power supply is in and power plane layer 100b The potential being substantially the same.The potential being substantially the same means the voltage of power plane layer 100b in the range of supply voltage.Electricity Small resistor in the plane layer 100b of source causes voltage slight change.
Fig. 7 shows the map of current of power plane 12.The electric current shows each of electric current flowing in power plane 12 Direction.Directionality pattern 101 forces long path of some electric currents using the region A close to map of current.First shade pattern, 103 He Second shade pattern 113 causes the through hole in less current direction region B.
Fig. 8 shows the developer layer that the three-dimensional of the multilayer board of Fig. 5 attempts.Multilayer board includes four Layer.Power plane layer 312 and ground plane 313 are clipped in the middle by signals layer 311 and 314.Gap 303a in power plane layer 312 And the gap 303b in signals layer 314 is formed to prevent electric current from flowing through the through hole around selected through hole.And electric current is forced to flow Cross other through holes for being connected to other layers (for example, top layer 100a) being connected in parallel.
Fig. 9 shows the equipment for manufacturing multilayer printed circuit.The equipment includes input equipment 205, control device 200 With manufacturing equipment 207.Control device 200 connects 205 including at least memory 201, processor 203 and communication.
Control device 200 receives input from the user by input equipment 205, to create above-mentioned multi-layer PCB.User can Electrical component, including current flow devices and through hole are arranged in the plane.Control device 200 is configured as access and is stored in memory 201 In for current flow devices and through hole rating data.The circuit that 200 simulation of control device is proposed is any logical to determine Whether hole electric current exceedes rating data.That is, input equipment 205 receives the position selection of each current source and current sink. Control device 200 simulates one or more layers current density of multi-layer PCB.Alternatively, control device 200 is not accessing rating data In the case of receive power plane pattern.
When through hole electric current exceedes class rating, control device 200 puts down the power supply of electric current guide features insertion multi-layer PCB In face.The groove that exemplary current induction element is the gap section of conductive material and conductive material is removed.200 base of control device Come to select preferable or possible position for electric current induction element in these emulation.Alternatively, user can pass through 205 hand of input equipment The type of dynamic input current induction element and position.Alternatively, trial-and-error method can be used to select and place electric current induction element.
Control device 200 generates the image or schematic diagram of multi-layer PCB.The image includes power plane layer and signals layer.Electricity Source plane includes being used for the multiple patterns for guiding electric current flowing, and signals layer includes multiple signal leads.
Manufacturing equipment 207 receives the image or schematic diagram of multi-layer PCB from control device 200.In subtraction process, manufacture is set The egative film of standby 207 generation image.The egative film is placed on copper, and is partly etched accordingly.It is more in addition process The image of layer PCB is used as pouring into a mould the mould of copper.
Figure 10 shows the flow chart of the manufacturing process for the printed circuit board (PCB) reallocated with electric current.Although these action with Shown order performs, but other sequentially can be used as.Extra, different or less actions can be provided.
In action S101, control device 200 receives PCB templates from input equipment 205.PCB templates may include to represent the number of plies With the data of the placement of electrical component, through hole, current source and current sink.
In action S103, control device 200 is configured as modeling for PCB templates for current density.The model may include Current simulations software.Current density can be stored or be shown in current density figure, which has each layer of PCB In size of current and direction.According to current density figure, control device 200 determines whether that any electric current exceedes class rating. Class rating can be associated with pain or power plane layer.Class rating can be limited by bore diameter, the bore diameter by with In the insulating layer that through hole is drilled through to PCB.
In action S105, when current class exceedes class rating, control device 200 is configured as arranging in PCB templates Electric current guiding mechanism.Electric current guiding mechanism is arranged to may include a part for power plane layer being converted to shade pattern, or Gap is inserted into power plane layer.The gap is the gap in conductive material.If necessary, action S103 and S105 can be repeated To avoid overcurrent.
In action S107, control device 200 generates the modified PCB templates for including electric current guiding mechanism.It is modified PCB templates are sent to manufacturing equipment 207.Manufacturing equipment 207 can be configured as addition process and/or subtraction process.In subtraction In processing, manufacturing equipment 207 receives the substrate for having applied copper and removes the copper of specific region.Removal processing may include silk screen Printing, photoetching or grinding.In silk-screen printing, inking is printed on the copper of substrate, and it is undesired to remove using etching The part of copper.In photoetching, light shield and developer be used to remove the coating for protecting copper, and undesired to remove using etching The part of copper.In grinding, PCB prototypes move up copper removal from substrate.
In addition process, manufacturing equipment 207 adds copper by plating to naked substrate.Photo-conductive film is exposed by light shield Under light, and the copper that there is the developer of the chemical paths comprising palladium to enable exposed region to bond plating.
Processor 203 may include that general processor, digital signal processor, application-specific integrated circuit (ASIC), scene can compile Journey gate array (FPGA), analog circuit, digital circuit, combinations thereof or other processors currently known or develop later. Processor 203 can be the combination of individual equipment or equipment, for example, related to network, distributed treatment or cloud computing The equipment of connection.
Memory 201 can be volatile memory or nonvolatile memory.Memory 201 may include only Read memory (ROM), random access memory (RAM), flash memory, electrically erasable programmable read-only memory (EEPROM) or other One or more of memory of type.Memory 201 can be removed from control device 200, for example, secure digital (SD) is deposited Card storage.
Input equipment 205, which includes button, button, keyboard, mouse, stylus, trace ball, rocker switch, touch pad, sound, to be known Other circuit or for one or more of the other equipment to 200 input data of control device or component.205 He of input equipment Display can be combined into touch-screen, which can be that capacitance can also be resistance.Display can be liquid crystal Show device (LCD) panel, optical diode (LED) screen, thin film transistor screen or another type of display.
Control device 200 may include the instruction on computer-readable medium, for example, the collection of the one or more instruction set of storage Chinese style or distributed data base and/or associated caching and server.Term " computer-readable medium " should also include can The arbitrary medium of storage, coding or carrying instruction set, these instructions are used to be executed by processor or so that computer system is held Row any one or more methods disclosed herein or operation.
In a specific unrestricted, exemplary embodiment, computer-readable medium may include solid-state memory, example Such as, storage card or other encapsulation equipped with one or more non-volatile read-only storages.In addition, computer-readable medium can be with It is random access memory or other volatibility recordable memorys.In addition, computer-readable medium may include that magneto-optic or light are situated between Matter, for example, disk or band or other storage devices, for capturing carrier signal, for example, the signal to be communicated by transmission medium.Electricity The digital file annex of sub- mail or other self-contained news files or archive set can be considered as distributed medium, the distribution Formula medium is tangible media.Therefore, the disclosure is believed to comprise can to store the computer-readable of data or instruction wherein It is any one or more in medium or distributed medium and other equivalents and successor media.Computer-readable medium can To be non-transient, it includes all tangible computer-readable mediums.
In an alternate embodiment, specialized hardware implementation (for example, application-specific integrated circuit, programmable logic array and its His hardware device) it may be structured to realize one or more method described hereins.It may include the device of each embodiment and be The application of system can widely include various electronics and computer system.One or more embodiment as described herein can be used two Or more specific interconnected hardware module or equipment, by the way that between these modules and by these modules or special collection can be used as The relevant control and data-signal that communicate into the part of circuit realizes function.Therefore, the system include software, firmware and Hardware implementation mode.
According to each embodiment of the disclosure, method described herein can be by the software program that is performed by computer system To realize.In addition, in exemplary, non-limiting embodiment, implementation may include distributed treatment, component/object point Cloth processing and parallel processing.Alternatively, virtual computer system processing may be structured to realize one or more as described herein Method or function.
Figure 11 shows the exemplary process diagram of the electric current redistribution process in multi-layer PCB.Process description power supply is put down The operation in face.In S201 is acted, the electric current from power supply is received in power plane.Power plane and power supply are lain substantially in Identical potential.
In S203 and S205 is acted, power plane redistributes electric current.Power plane includes at least one area Domain, the region are different from least one other region.Words sentence is talked about, and power plane includes multiple conductive material patterns, passes through this A little patterns, electric current carry out different flowings.Each pattern of conductive material has different resistance.Different resistance can be by conduction The shape of material is set.In S203 is acted, power plane guides electric current in a first direction based on the first pattern, and dynamic Make in S205, power plane guides electric current in a second direction based on the first pattern.
One in first pattern and the second pattern can be continuous sheet of conductive material.In first pattern and the second pattern One can be mesh shape shade pattern.One in first pattern and the second pattern can have in one direction There is a resistance and there is the directionality pattern of another resistance on other direction.One in first pattern and the second pattern can To be the gap that may include polyhedral shape or removed from conductive material.Can also be other shapes, for example, the tear of connection Shape, circle or ellipse.
Figure 12 shows the exemplary process diagram of the electric current redistribution process around through hole.In action S301, detection is flowed through The electric current of one or more through holes of printed circuit board (PCB).Galvanometer, potentiometer or another instrument can be used to make for the detection, or Simulation software can be used to make in person's detection.
In action S303, the electric current detected and threshold value comparison.If the electric current detected is less than threshold value, no longer perform Further action.If the electric current detected is more than threshold value, in action S305, obstacle can be added to printed circuit board (PCB).Should Obstacle can be added in power plane layer.The obstacle can be made in the top layer for not including power supply or place.The obstacle can be layer In gap or gap.High obstacle can be around the gap of through hole.The obstacle can physically be made on a printed circuit Or made in simulation software.In action S307, the electric current near the through hole in the layer of printed circuit board (PCB) due to the destruction and It is interrupted.Electric current may diminish due to the destruction.New electric current can repeat to measure with the process, until new electric current Less than current threshold.
The diagram of embodiment as described herein is intended to provide the general understanding to the structure of each embodiment.The diagram is not It is intended to as all elements of the device and system using structure as described herein or method and being fully described for feature.When checking During the disclosure, it would have been obvious for a person skilled in the art for a lot of other embodiments.Can be from the disclosure using simultaneously Obtain other embodiment so that without departing from the scope of the disclosure, the replacement and change of structure and logic can be made. In addition, the diagram is only representational, and may not be drawn to scale.Some parts in diagram may be exaggerated, and its He may partly be minimized.Therefore, the disclosure and attached drawing will be considered schematic and nonrestrictive.
Although this specification includes many details, these details are not necessarily to be construed as to of the invention or claimed Scope limitation, and should be interpreted to the present invention specific embodiment special characteristic description.In the present specification with The described some features of situation of separated embodiment can also be implemented as being incorporated into single embodiment.On the contrary, single Each feature described in the situation of embodiment can also be implemented in multiple realities separated or in any suitable subcombination Apply in example.In addition, although hereinbefore feature can be described as acting on some combinations, or even it is also initially so statement , but in some cases, the one or more features from the combination stated can be peeled off from combination, and be stated Combination can be directed to the version of sub-portfolio or sub-portfolio.
Similarly, although operation is shown by particular order in the accompanying drawings, and it is described herein by particular order, But this be understood not to need these operations by shown particular order or by sequential order come perform or it is all shown in Operation is performed to obtain desired result.In some cases, it may be advantageous for multitask and parallel processing.In addition, The separation of each system component in above-described embodiment is understood not to be required to such separation in all embodiments, should The understanding, described program component and system can be generally integrated into single software product together, or be packaged into multiple software productions In product.
One or more other embodiments of the present disclosure individually and/or can be collectively referred to as term " invention " herein, its It is for convenience, and to be not intended to scope of the present application volitional check in any specific invention or inventive concept.Though in addition, Specific embodiment so has been illustrated and described herein, but it is to be understood that, it is designed to realize any of same or similar purpose Subsequently arrange alternative shown specific embodiment.The disclosure is intended to any and all follow-up adaptability for covering each embodiment Modification changes.When checking this specification, the combination of above example and the other embodiment not specifically described herein It will be apparent to those skilled in the art.
The summary of the disclosure is provided to meet 72 sections of the 1st article b, 37 chapter of United States Federal Regulations, and is understanding that it will not Submitted in the case of the scope or implication that are used to interpret or limit claim.In addition, in described in detail above, it is each Feature can be merged or be described in single embodiment, to improve the efficiency of the disclosure.The disclosure is not necessarily to be construed as reflection institute Claimed embodiment needs the intention of features more more than the feature being expressly recited in each claim.On the contrary, as institute What attached claim was reflected, the theme of invention can be directed to fewer than all features of any the disclosed embodiments.Therefore, it is appended Claim is integrated into detailed description, wherein, each claim is based on being claimed respectively own as restriction Theme.
It is considered illustrative and not restrictive to wish discussed in detail above, and it should be understood that including all equivalent The appended claims intended limitation the scope of the present invention of form.Claim should not be considered limiting described order or member Part, unless being the effect by explanation.Therefore, scope of the following claims and spirit in all embodiments and its wait similar shape Formula is declared as the present invention.

Claims (7)

1. the device that a kind of electric current for printed circuit board (PCB) reassigns, including:
The signals layer of printed circuit board (PCB);
The power plane layer of the printed circuit board (PCB);And
Insulating layer, the insulating layer between the signals layer and the power plane layer,
Wherein, the power plane layer includes conductive sheet, and the conductive sheet has predetermined spatial variations so as to which electric current is first Flowing in region is different from flowing in the second area, is formed in wherein the first area has in the conductive sheet The discontinuous directionality pattern and second area has the discontinuous shade pattern being formed in the conductive sheet;
Wherein described discontinuous directionality pattern guides electric current to be flowed towards power plain film, and the discontinuous shade pattern draws The perpendicular interconnection path in perpendicular interconnection path row in second area of the electrical conduction current away from the power planes,
And wherein the conductor of the conductor of directionality pattern and the discontinuous shade pattern is in diagonal, and wherein directional pattern The direction of the conductor of sample and the perpendicular interconnection path row is in diagonal.
2. device as claimed in claim 1, wherein, the conductive sheet covers the predetermined percentage of the insulating layer, wherein, institute Predetermined percentage is stated between the 40% of the insulating layer and 95%.
3. device as claimed in claim 1, further includes:
Power supply, the potential of the power supply and the power plane layer are essentially identical.
4. device as claimed in claim 1, further includes:
It is electrically coupled to the signals layer and the power plane layer, at least one component therein, at least one component Powered by the electric current for flowing through the first area.
5. a kind of method that electric current for printed circuit board (PCB) reassigns, including:
Electric current is received at the power plane of multilayer board;
Discontinuous shade pattern based on conductive material guides electric current in the power plane with first direction;And
The directionality pattern of parallel portion based on extension conductive material in a single direction is in the power plane with the Two directions guide electric current,
Wherein described discontinuous directionality pattern guides electric current to be flowed towards power plain film, and the discontinuous shade pattern draws The perpendicular interconnection path in perpendicular interconnection path row in second area of the electrical conduction current away from the power planes,
And wherein the conductor of the conductor of directionality pattern and the discontinuous shade pattern is in diagonal, and wherein directional pattern The direction of the conductor of sample and the perpendicular interconnection path row is in diagonal.
6. method as claimed in claim 5, wherein, the discontinuous shade pattern is included than the directionality pattern per single The big per unit area resistance of position area resistance.
7. method as claimed in claim 5, wherein, the discontinuous shade pattern of the conductive material includes shade pattern, side Tropism pattern or more side channels.
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PCT/US2013/047492 WO2014070253A1 (en) 2012-10-29 2013-06-25 Current redistribution in a printed circuit board

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US20200107452A1 (en) 2020-04-02
US20140118962A1 (en) 2014-05-01
US11277918B2 (en) 2022-03-15
EP2912928A1 (en) 2015-09-02
US9468090B2 (en) 2016-10-11
US20160381807A1 (en) 2016-12-29
EP2912928B1 (en) 2018-11-21
WO2014070253A1 (en) 2014-05-08
US10548227B2 (en) 2020-01-28

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