CN104700971A - Varistor adopting novel base pin design method - Google Patents
Varistor adopting novel base pin design method Download PDFInfo
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- CN104700971A CN104700971A CN201310643067.2A CN201310643067A CN104700971A CN 104700971 A CN104700971 A CN 104700971A CN 201310643067 A CN201310643067 A CN 201310643067A CN 104700971 A CN104700971 A CN 104700971A
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Abstract
The invention relates to a varistor adopting a novel base pin design method. The varistor is characterized in that it has multiple base pins, the positions and quantity of the base pins can be obtained through calculation and electric current density simulation, when the input end and output end have more than one base pin, they can be connected by an electrode slice. With the design, without changing the area and volume of an original varistor substrate, electric current fully flows through the filling substance in the varistor, thus enhancing the varistor flow capacity, impact resistance and other characteristics, and improving the varistor service life and protection grade.
Description
Technical field
The invention belongs to electric electronic element field.Mainly for piezo-resistance, change its pin configuration, make through-flow performance better.
Background technology
Piezo-resistance is a kind of non-linear overvoltage protection semiconductor element to voltage-sensitive; number of different types can be divided into according to its structure, manufacture process, use material, voltage-current characteristic etc.; common varistor device is metal oxide piezo-resistance, especially Zinc-oxide piezoresistor.Piezo-resistance is different from conventional resistor, and it is made according to the nonlinear characteristic of semi-conducting material, and conventional resistor observes Ohm's law, and the voltage of varistor and electric current are then in special non-linear relation.When varistor two ends institute making alive is lower than nominal rated voltage value, the resistance value of varistor is close to infinity, and inside does not almost have electric current to flow through, and is equivalent to open circuit in circuit; When varistor both end voltage is a little more than nominal rated voltage, varistor will puncture conducting rapidly, and becomes low resistance state from high-impedance state, and operating current sharply increases; When its both end voltage returns to lower than nominal rated voltage, pressure-sensitive electronics device reverts to high-impedance state again; But when exceeding to piezo-resistance both end voltage the maximum deboost that it can bear, piezo-resistance will be punctured and is damaged completely, also cannot recover even if voltage drop is got off.
According to this nonlinear characteristic of piezo-resistance, it is widely used in, in household electrical appliance and other electronic product, playing the effects such as overvoltage protection, lightning protection, surge current suppression, absorbing peak pulse, amplitude limit, high pressure arc extinguishing, de-noising, protection semiconductor components and devices.Lightning current is different from interference in common line, noise, switching overvoltage, and lightning current is the large pulse of a kind of moment, and in tens microseconds, electric current can reach kiloampere up to a hundred; The Lightning Electromagnetic Pulse produced in the line by electromagnetic induction also can reach tens of kiloampere.Piezo-resistance is as the main devices of electric and electronic system carrying out surge protection; so large lightning current or Lightning Electromagnetic Pulse must released into ground by instantaneously; ensure the safe handling of its protected equipment below, this through-current capability to piezo-resistance, the isoparametric requirement of impact resistance are especially high.
The packaged type of the piezo-resistance on present domestic and international market, there is SMD, pin, but be all two contact poles, namely for the filler (common is zinc oxide grain and grain boundary layer) of its inside, the path that electric current flows through them is the single-pathway of " one-in-and-one-out ", and electric current must be select the minimum path of resistance to pass through, so this single path is very short, that is the inside stuffing matter of one piece of complete piezo-resistance, only has sub-fraction to be used to resist rush of current thus leakage current.Two pin design of " one-in-and-one-out " of existing piezo-resistance, through-flow and shock-resistant on have some defects, macroscopically reflect that the useful life of piezo-resistance is short, it is not enough to resist larger lightning current and impacts on lightning protection, is difficult to the requirement be up to state standards.
Summary of the invention
In order to effectively solve the above prior-art problems, the present invention proposes a kind of piezo-resistance adopting novel pin method for designing, carry out the problem of poor, the shock-resistant ability of through-current capability that major tuneup existing pressure-sensitive pin " one-in-and-one-out " single-pathway causes, effectively can be extended the useful life of same piezo-resistance substrate by this novel pin design mode.The piezo-resistance of the novel pin method for designing of this employing, can be an invention achievement with novelty, can be applied in better in various lightning protection component, thus bring huge economic benefit in piezo-resistance manufacturing industry; Promote the superiority of the sector in international competition simultaneously.
The present invention is by the following technical solutions: the present invention is a kind of piezo-resistance adopting novel pin method for designing; under the prerequisite not increasing or change piezo-resistance substrate volume; the quantity of pin and position are by calculate and current density emulates and determines, to the maximum result of inner filler utilance; thus promote piezo-resistance through-current capability, shock-resistant ability characteristics, improve useful life and the protection class of piezo-resistance.The present invention mainly comprises piezo-resistance substrate, electrode slice, pin.
The invention is characterized in:
1. this adopts pin positions and the quantity of the piezo-resistance of novel pin method for designing, determine according to calculating and current density emulation, such design can make electric current sufficiently flow through inside stuffing matter, improve the utilance of inner material, thus under the prerequisite not increasing or change piezo-resistance substrate volume, improve the through-current capability of whole piezo-resistance and shock-resistant ability.
2. this adopts the piezo-resistance of novel pin method for designing can be designed to the typical structure of " two enter goes out ", and electric current inflow direction is two pins, connects with a cube electrode sheet; Outflow of bus current direction is a pin.
3. this adopts the piezo-resistance of novel pin method for designing can be designed to the typical structure of " enters scene 2 ", and electric current inflow direction is a pin; Outflow of bus current direction is two pins, connects with a cube electrode sheet.
4. this adopts the piezo-resistance of novel pin method for designing can be designed to the typical structure of " two enter scene 2 ", and electric current inflow direction is two pins, connects with a cube electrode sheet; Outflow of bus current direction is also two pins, connects with a cube electrode sheet.
5. this adopts the design of the piezo-resistance of novel pin method for designing, also comprises the form such as " entering to go out ", " enters many places ", " enter more and have more " more, is greater than end of incoming cables or the leading-out terminal of a pin, connects with electrode slice.
Accompanying drawing explanation
Fig. 1 is the principle schematic of the present invention first exemplary embodiments.
Fig. 2 is the principle schematic of the present invention second exemplary embodiments.
Fig. 3 is the principle schematic of the present invention the 3rd exemplary embodiments.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further described:
If Fig. 1 is the first exemplary embodiments of the present invention, electric current " two enter one goes out " type, 1-1 is current input electrode sheet, and 1-2a is current input pin 1,1-2b be current input pin 2,1-3 is electric current output pin, and 1-4 is piezo-resistance substrate.
If Fig. 2 is the second exemplary embodiments of the present invention, electric current " one enters scene 2 " type, 2-1 is current input pin, and 2-2 is piezo-resistance substrate, and 2-3a is electric current output pin 1,2-3b be electric current output pin 2,2-4 is electric current output electrode sheet.
If Fig. 3 is the 3rd exemplary embodiments of the present invention, electric current " two enter scene 2 " type, 3-1 is current input electrode sheet, 3-2a is current input pin 1,3-2b is current input pin 2,3-3a be electric current output pin 1,3-3b is electric current output pin 2,3-4 is electric current output electrode sheet, and 3-5 is piezo-resistance substrate.
Except three exemplary embodiments shown in Fig. 1,2,3, the present invention can also be other embodiment that electric current " enters to go out " type, " one enters to have more " type, " enter more and have more " type more.
The input of electric current, the quantity of output pin, obtain according to calculating and current density emulation, the position of pin and the quantity path of decision electric current in piezo-resistance filler and density.
Be greater than end of incoming cables or the leading-out terminal of a pin, connect with electrode slice.Electrode slice can be used as piezo-resistance in use, connects the stiff end of wire.
This novel pin method for designing is the improvement to original piezo-resistance substrate and lifting, does not change area and the volume of original piezo-resistance substrate.
Utilize technical scheme of the present invention, reach corresponding technique effect, or not departing from the technical scheme equivalents under design philosophy of the present invention, all within protection scope of the present invention.
Claims (6)
1. adopt the piezo-resistance of novel pin method for designing, it is characterized in that: piezo-resistance has multiple pin, the position of pin and quantity are by calculate and emulation draws, input, output more than one pin avaivable electrode sheet connect; Be made up of piezo-resistance substrate, pin, electrode slice.
2. a kind of piezo-resistance adopting novel pin method for designing according to claim 1, is characterized in that: the area and the volume that do not change original piezo-resistance substrate.
3. a kind of piezo-resistance adopting novel pin method for designing according to claim 1, is characterized in that: the input and output pin of piezo-resistance adopts the design of " two enter one goes out " type.
4. a kind of piezo-resistance adopting novel pin method for designing according to claim 1, is characterized in that: the input and output pin of piezo-resistance adopts the design of " one enters scene 2 " type.
5. a kind of piezo-resistance adopting novel pin method for designing according to claim 1, is characterized in that: the input and output pin of piezo-resistance adopts the design of " two enter scene 2 " type.
6. a kind of piezo-resistance adopting novel pin method for designing according to claim 1, is characterized in that: the input and output pin of piezo-resistance also can adopt " entering one to go out ", " one enters many places ", the design of " enter more and have more " type more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310643067.2A CN104700971A (en) | 2013-11-12 | 2013-11-12 | Varistor adopting novel base pin design method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310643067.2A CN104700971A (en) | 2013-11-12 | 2013-11-12 | Varistor adopting novel base pin design method |
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| Publication Number | Publication Date |
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| CN104700971A true CN104700971A (en) | 2015-06-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310643067.2A Pending CN104700971A (en) | 2013-11-12 | 2013-11-12 | Varistor adopting novel base pin design method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733143A (en) * | 2013-12-18 | 2015-06-24 | 孙巍巍 | Piezoresistor based on novel pin design method |
| CN104753053A (en) * | 2013-12-31 | 2015-07-01 | 孙巍巍 | Novel surge protector |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2133033Y (en) * | 1992-07-06 | 1993-05-12 | 夏维东 | Piezoresistire resistor |
| GB2345187A (en) * | 1998-12-24 | 2000-06-28 | Telematic Ltd | Metal oxide varistors |
| CN2864932Y (en) * | 2005-08-30 | 2007-01-31 | 广东省佛山科星电子有限公司 | Pressure sensitive resistance type over-pressure safety device |
-
2013
- 2013-11-12 CN CN201310643067.2A patent/CN104700971A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2133033Y (en) * | 1992-07-06 | 1993-05-12 | 夏维东 | Piezoresistire resistor |
| GB2345187A (en) * | 1998-12-24 | 2000-06-28 | Telematic Ltd | Metal oxide varistors |
| CN2864932Y (en) * | 2005-08-30 | 2007-01-31 | 广东省佛山科星电子有限公司 | Pressure sensitive resistance type over-pressure safety device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733143A (en) * | 2013-12-18 | 2015-06-24 | 孙巍巍 | Piezoresistor based on novel pin design method |
| CN104753053A (en) * | 2013-12-31 | 2015-07-01 | 孙巍巍 | Novel surge protector |
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Application publication date: 20150610 |