CN104299905B - Junctionless transistor and manufacturing method thereof - Google Patents
Junctionless transistor and manufacturing method thereof Download PDFInfo
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- CN104299905B CN104299905B CN201310299418.2A CN201310299418A CN104299905B CN 104299905 B CN104299905 B CN 104299905B CN 201310299418 A CN201310299418 A CN 201310299418A CN 104299905 B CN104299905 B CN 104299905B
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- nodeless mesh
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- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000009499 grossing Methods 0.000 claims abstract description 4
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- 238000010276 construction Methods 0.000 claims description 9
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- 239000010703 silicon Substances 0.000 claims description 9
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- 238000002955 isolation Methods 0.000 claims description 5
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- 238000001039 wet etching Methods 0.000 claims description 5
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 239000000945 filler Substances 0.000 claims description 3
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- 238000010586 diagram Methods 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 230000005669 field effect Effects 0.000 description 6
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- 229910052732 germanium Inorganic materials 0.000 description 3
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- 239000002071 nanotube Substances 0.000 description 3
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- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
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- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 2
- 229910001928 zirconium oxide Inorganic materials 0.000 description 2
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- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/105—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with vertical doping variation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/775—Field effect transistors with one dimensional charge carrier gas channel, e.g. quantum wire FET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a junctionless transistor and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a substrate, wherein the substrate comprises a dielectric layer, and a first semiconductor layer arranged on the dielectric layer; imaging the first semiconductor layer to form a source region, a drain region, and a fin between the source region and the drain region; removing partial dielectric layer below the fin so that the fin is suspended on the residual dielectric layer; smoothing the surface of the fin to form a nanowire; performing channel ion doping on the nanowire so that the ion doping concentration is gradually decreased from the nanowire surface to the nanowire center; forming a ring fence structure on the doped nanowire; and performing the source-drain doping which is similar to the nanowire channel ion doping on the source region and the drain region to form a source electrode and a drain electrode. The performance of the junctionless transistor is optimized through the adoption of the method disclosed by the invention.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of nodeless mesh body pipe and its manufacture method.
Background technology
In order to keep up with the step of Moore's Law, people constantly reduce semiconductor device（For example：Field-effect transistor）'s
Characteristic size.As the problem of short-channel effect and grid leakage current under small size makes the switch performance of transistor degenerate, therefore
Performance is improved by the physical size of diminution conventional field effect transistor and has faced some difficulties.
In order to suppress short-channel effect, prior art to develop nano-wire field effect transistor (Nanowire Field-
Effect Transistor, NWFET) technology.
NWFET has 1-dimention nano wire channel, due to quantum limitation effect, raceway groove carriers principle surface distributed, because
This carrier transport is affected less by surface scattering and channel laterally electric field, it is hereby achieved that higher electron mobility.
Further, since NWFET has the raceway groove of reduced size and generally using enclosing structure, grid can be from multiple sides
To being modulated to the raceway groove, so as to the modulation capability of grid, improvement threshold characteristic can be strengthened.
As can be seen here, NWFET can suppress short-channel effect, field effect transistor pipe size is further reduced；
The enclosing structure of NWFET improves grid ability of regulation and control, so as to alleviate the demand of thinning grid medium thickness, and then can be with
Reduce the leakage current of grid.
However, existing NWFET has that driving current is less, how to protect while short-channel effect is suppressed
It is one of those skilled in the art's technical problem urgently to be resolved hurrily that card transistor has larger driving current.
The content of the invention
The problem that the present invention is solved is to provide a kind of nodeless mesh body pipe and its manufacture method, is suppressing the same of short-channel effect
Shi Tigao driving currents, so as to optimize the performance of nodeless mesh body pipe.
To solve the above problems, the present invention provides a kind of manufacture method of nodeless mesh body pipe, including：Substrate is provided, it is described
Substrate includes dielectric layer, the first semiconductor layer on the dielectric layer；
Graphical first semiconductor layer, forms source region, drain region and is located at the source region and leakage
Fin between polar region domain；
The certain media layer material below the fin is removed, the fin is suspended on remaining media layer；
The surface smoothing of the fin is made, nano wire is formed；
Ion doping is carried out to the nano wire, ion doping concentration is gradually passed to nano wire center from nanowire surface
Subtract；
Enclosing structure is formed on the nano wire after doping；
Source and drain doping with the ion doping same type is carried out to the source region, drain region, to form source electrode
And drain electrode.
Alternatively, the step of carrying out ion doping to the nano wire includes：Doping is covered on the surface of the nano wire
Material；Ion in the dopant material in the nano wire from surface to center spread, in nano wire formed doping from
Sub- Concentraton gradient；Remove the dopant material.
Correspondingly, the present invention also provides a kind of nodeless mesh body pipe, including：
Substrate, the substrate include dielectric layer, the first semiconductor layer on the dielectric layer；
Form fluted in first semiconductor layer and certain media layer, positioned at described the first the half of the groove both sides
Conductor layer is source electrode and drain electrode；
The nano wire contacted with the source electrode and drain electrode between the source electrode and drain electrode, the ditch as transistor
Road；
In nanowire channel doped with the source electrode and drain electrode same type dopant ion, and ion doping concentration from
Nanowire surface is gradually successively decreased to nano wire center；
It is filled in the groove and covers the enclosing structure of the nano wire.
Alternatively, the nodeless mesh body pipe is p-type nodeless mesh body pipe, and the potential energy of source electrode is higher than the potential energy for draining.
Alternatively, the nodeless mesh body pipe is N-type nodeless mesh body pipe, and the potential energy of source electrode is less than the potential energy for draining.
Compared with prior art, technical scheme has advantages below：
The nano wire with dopant ion is formed, and dopant ion concentration is gradually successively decreased from nanowire surface to center, institute
State nano thread structure and can suppress short-channel effect, while the ion doping concentration of nanowire surface is larger can to make nodeless mesh body
Pipe has larger driving current, so as to improve the performance of nodeless mesh body pipe.
Additionally, covering dopant material on the surface of the nano wire；By diffusion way formed in nano wire doping from
Sub- Concentraton gradient, method is fairly simple and is easily controlled.
Description of the drawings
Fig. 1 to Fig. 8 is the schematic diagram of one embodiment of nodeless mesh body pipe manufacturing method of the present invention；
Fig. 9 is schematic diagrams of the Fig. 8 along AA ' hatching lines；
Figure 10 is schematic diagrams of the Fig. 8 along BB ' hatching lines.
Specific embodiment
Although the nano-wire field effect transistor of prior art inhibits short-channel effect, but driving current is less, property
Can be not excellent enough.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
In order to solve problem of the prior art, the present invention provides a kind of nodeless mesh body pipe and its manufacture method, and formation has
The nano wire of dopant ion is used as the channel region of nodeless mesh body pipe, and in the nano wire, the concentration of channel doping ion is from nano wire
Gradually successively decrease to center on surface.Nano thread structure can suppress short-channel effect, and the ion doping concentration of nanowire surface compared with
Can make greatly nodeless mesh body pipe that there is larger driving current, so as to optimize the performance of nodeless mesh body pipe.
Referring to figs. 1 to Fig. 8, the schematic diagram of one embodiment of manufacture method of nodeless mesh body pipe of the present invention is shown.The nothing
The manufacture method of junction transistors generally comprises following steps：
As shown in Figure 1, there is provided substrate.In the present embodiment, the substrate includes substrate 100, on the substrate 100
Dielectric layer 101, the first semiconductor layer 102 on the dielectric layer 101.
Specifically, the material of the substrate 100 can be silicon, germanium, SiGe or other III-V race's materials.The dielectric layer
101 material can be for silicon oxide.The material of first semiconductor layer 102 for surface is（100）The silicon of crystal face.
As shown in Fig. 2 graphical first semiconductor layer 102, forms source region 1031, drain region 1032, position
Fin 1033 between the source region 1031, drain region 1032.
Specifically, first semiconductor layer 102 forms a dies, wherein parallel two parts are used as source area
Domain 1031, drain region 1032, the part between parallel two parts are fin 1033.
In the present embodiment, it is foursquare rectangular structure that the fin 1033 is cross section.The fin 1033 includes two
（100）The surface of crystal face and two（110）The surface of crystal face.
Alternatively, also include the step of graphical first semiconductor layer 102, in first semiconductor layer 102
Form the groove between nodeless mesh body pipe（It is not shown）.
As shown in figure 3, the graphical dielectric layer 101, in the passage formed below 106 of the fin 1033, so that institute
State fin 1033 to be suspended on remaining media layer 101, make the fin 1033 not contact with remaining media layer 101.
Specifically, the material of the dielectric layer 101 is silicon dioxide, can pass through the Fluohydric acid. of dilution（Dilute HF,
DHF）Certain media layer 101 is removed, or can be etched by buffer oxide layer（Buffered Oxide Etchant, BOE）
Mode remove certain media layer 101.
With reference to Fig. 4 is referred to, the second semiconductor layer 1034 is formed on the surface of the fin 1033, the fin 1033 and described
It is octagonal column construction 103 that second semiconductor layer 1034 constitutes cross section.
Specifically, the material of second semiconductor layer 1034 can be silicon, germanium, SiGe or other III-V race's materials.Can
, by the way of selective epitaxial growth, to form second semiconductor layer 1034 on the surface of the fin 1033.
In the present embodiment, the octagonal column construction 103 includes two（100）The surface of crystal face, two（110）It is brilliant
The surface in face and four（111）The surface of crystal face.
As shown in figure 5, the column construction 103 is annealed, to form nano wire 1035.
The smoothness on 103 surface of column construction can be improved by annealing process, so as to the nano wire 1035 for being formed has
The surface of arc surface is close to, and then completes sphering process.
Specifically, the annealing steps include：In the gaseous environment of helium, hydrogen or deuterium, temperature is more than 900 DEG C
Under the conditions of annealed, sphering process is carried out to the surface of the column construction 103 with octagonal cross-section, to form cylinder
Nano wire 1035, the nano wire 1035 of cylinder has circular cross section.The nano wire 1035 of the cylinder is used as ditch
On the one hand leakage current can be reduced during road, on the other hand can also improves electron mobility.
The octagonal column construction 103 is shape of the foursquare fin 1033 closer to circular arc relative to cross section,
Thus the annealing time is shorter, so as to simplify processing procedure.
It should be noted that the nano wire 1035 can also be aoxidized at least one times after the anneal step with it is wet
The step of method is etched, further to obtain the nano wire 1035 that cross section is close to circular ideal or ellipse.
Oxidation and wet etching the reason for can obtaining circular cross section are, in oxidizing process, the octagonal top
Contact angle of the contact angle of angle and oxygen more than octagonal side and oxygen, thus the area being exposed at corner position in oxygen
It is larger, then the thickness that drift angle is oxidized is larger, and the part being oxidized during wet etching can be removed, thus, top
Angle Position is removed more in etching, so that gradually sphering at original octagonal corner position, and then make nanometer
1035 cross section of line is more nearly circle or ellipse.
Specifically, the material of second semiconductor layer 1034 is silicon, and silicon oxide is formed after thermal oxide.Afterwards, using dilute
The Fluohydric acid. released carries out wet etching, and the Fluohydric acid. of dilution is to the removal rate of the silicon oxide much larger than the removal to silicon materials
Speed, so that the cross section convergence of nano wire 1035 is circular.
As shown in fig. 6, channel ion doping is carried out to the nano wire 1035, make ion doping concentration from nano wire 1035
Gradually successively decrease to 1035 center of nano wire on surface.
In the present embodiment, dopant material 104 is covered on the surface of the nano wire 1035.In making the dopant material 104
Ion in the nano wire 1035 from surface to center spread, so as to formed in nano wire 1035 from a surface to center by
Decrescence little Concentraton gradient.Dopant ion Concentraton gradient is formed in nano wire 1035 by diffusion way, method is fairly simple
And be easily controlled.
Specifically, if the nodeless mesh body pipe is p-type nodeless mesh body pipe, the dopant material 104 is Pyrex；If
The nodeless mesh body pipe is N-type nodeless mesh body pipe, and the dopant material is phosphorosilicate glass, but the present invention is to dopant material 104
It is not restricted.
The dopant material can be formed by the method for chemical vapor deposition, physical vapour deposition (PVD) or ald
104。
As shown in fig. 7, removing the dopant material 104, nano wire 1035 after doping is formed.
Specifically, the dopant material can be removed using to the preferable wet etching solution of 104 selectivity of dopant material.
The removal technique is same as the prior art, will not be described here.
With reference to reference to Fig. 8 to Figure 10, enclosing structure 105 on nano wire 1035, is formed after doping.Nanometer after the doping
Channel region of the line 1035 for nodeless mesh body pipe.After the doping, nano wire 1035 can suppress short-channel effect, additionally, described mix
The dopant ion concentration on miscellaneous 1035 surface of rear nano wire is higher, can increase the driving current of nodeless mesh body pipe.
In order to ensure that nodeless mesh body pipe has sufficiently large driving current, optionally, after doping 1035 surface of nano wire from
Sub- doping content is more than or equal to 2 × 1019Atoms per cubic centimeter.
The step of forming enclosing structure 105 includes：After doping, 1035 surface of nano wire forms high-K dielectric layer 1051.Institute
State the surface of nano wire 1035 after 1051 coating-doping of high-K dielectric layer.In the present embodiment, the high-K dielectric layer 1051 is oxidation
The materials such as hafnium, zirconium oxide, can form the high-K dielectric layer 1051 by way of chemical vapor deposition or ald.
It should be noted that during high-K dielectric layer 1051 is formed, being additionally included in the source region 1031 and leakage
Polar region domain 1032 forms insulating barrier towards the direction of the passage 106, for source region 1031 and the grid being subsequently formed of insulating
Pole, is additionally operable to insulate drain region 1032 and the grid being subsequently formed.
The filler metal material in the region that source region 1031, drain region 1032 and remaining media layer 101 are surrounded,
The metal material is made to flush with 101 surface of the first semiconductor layer, to form metal gates 1052.
Specifically, the metal material can be the materials such as titanium nitride, can pass through physical vapor deposition, ald
Or the mode of vapor phase epitaxial growth forms the metal material.
After filler metal material, also include chemical mechanical milling tech being carried out to the metal material, make metal gate
Pole 1052 is flushed with 101 surface of the first semiconductor layer.
With continued reference to Fig. 8, the source region 1031 and drain region 1032 are carried out and nanowire channel ion doping
The doping of same type, to form source electrode and drain electrode, and then forms without knot（junctionless）Transistor.
The nodeless mesh body pipe that the present embodiment is formed is p-type nodeless mesh body pipe, and the potential energy of source and drain doping guarantee source electrode is higher than leakage
The potential energy of pole.
If the nodeless mesh body pipe is N-type nodeless mesh body pipe, the potential energy of source and drain doping source electrode is less than the potential energy for draining.
Nodeless mesh body pipe, can better control over doping content, and be conducive to reducing the size of nodeless mesh body pipe.
Alternatively, the manufacture method of the nodeless mesh body pipe is additionally included in source electrode and drain electrode and forms metal silicide layer,
And on the metal silicide layer the step of formation attachment plug, it is same as the prior art, will not be described here.
It should be noted that formed metal silicide layer the step of after, formed attachment plug the step of before, it is described
Manufacturer can also include the step of forming interlayer dielectric layer, and the interlayer dielectric layer can be filled between nodeless mesh body pipe
, the groove being formed between first semiconductor layer（It is not shown）, to form isolation structure.
Also, it should be noted that in the above-described embodiments, it is by forming dopant material on the nanotube, by the material that adulterates
The mode of material intermediate ion diffusion forms Concentraton gradient in nanotube, but the invention is not limited in this regard, implement at other
In example, can also be formed in the nanotube by way of multiple ion implanting etc. from it is outer to it is interior be sequentially reduced mix
Heteroion Concentraton gradient.
Also, it should be noted that in the above-described embodiments, enclosing structure includes high-K dielectric layer and metal gates, but this
Invention is not restricted to the material of enclosing structure, and in other embodiments, the enclosing structure can also include gate dielectric layer
And polysilicon gate.
Correspondingly, the present invention also provides a kind of nodeless mesh body pipe, please continue to refer to Fig. 8 to Figure 10, respectively illustrates this
The schematic diagram of bright one embodiment of nodeless mesh body pipe, along Fig. 8 the schematic diagram of AA ' hatching lines, along Fig. 8 BB ' hatching lines schematic diagram.Institute
Stating nodeless mesh body pipe includes：
Substrate, substrate described in the present embodiment include substrate 100, the dielectric layer 101 on the substrate 100, are located at
The first semiconductor layer 102 on the dielectric layer 101.It is formed with 101 layers of first semiconductor layer 102 and certain media recessed
Groove, first semiconductor layer 102 positioned at the groove both sides are source electrode and drain electrode.
Specifically, the material of the substrate 100 can be silicon, germanium, SiGe or other III-V race's materials.The dielectric layer
101 material is silicon oxide.The material of first semiconductor layer 102 for surface is（100）The silicon of crystal face.
The present embodiment is N-type nodeless mesh body pipe, and the potential energy of source electrode is higher than the potential energy for draining.
If the nodeless mesh body pipe is p-type nodeless mesh body pipe, the potential energy of source electrode is less than the potential energy for draining.
Nodeless mesh body pipe is easy to better control over the doping content of source and drain, and is conducive to reducing the chi of nodeless mesh body pipe
It is very little, so as to improve the integrated level of semiconductor device.
The nodeless mesh body pipe also include positioned at the source electrode and drain electrode between with the source electrode and drain contact receive
Rice noodle 1035, the nano wire 1035 are used as the raceway groove of transistor.In 1035 raceway groove of the nano wire doped with the source electrode
Gradually pass to nano wire center 1035 from 1035 surface of nano wire with the dopant ion of drain electrode same type, and ion doping concentration
Subtract.
The nano wire 1035 can suppress short-channel effect, additionally, the dopant ion on 1035 surface of the nano wire is dense
Degree is higher, can increase the driving current of nodeless mesh body pipe.
Alternatively, the cross section of nano wire 1035 described in the present embodiment is circular or oval（As shown in Figure 9）.
It should be noted that in order to ensure that nodeless mesh body pipe has sufficiently large driving current, optionally, nano wire after doping
The ion doping concentration on 1035 surfaces is more than or equal to 2 × 1019Atoms per cubic centimeter.
The nodeless mesh body pipe also includes：It is filled in the groove and covers the enclosing structure 105 of the nano wire 1035.
In the present embodiment, the enclosing structure 105 includes the high-K dielectric layer for being formed at 1035 surface of the nano wire
1051, and in the groove, cover the metal gates 1052 of the high-K dielectric layer 1051.
The material of the high-K dielectric layer 1051 can be hafnium oxide, zirconium oxide etc., and the material of the metal gates 1052 can
Being titanium nitride etc..
As shown in Figure 10, the nodeless mesh body pipe also includes：The first insulation between metal gates 1052 and source electrode
Layer 1071, the second insulating barrier 1072 between the metal gates 1052 and drain electrode.First insulating barrier 1071 and institute
The material for stating the second insulating barrier 1072 can be silicon oxide.Can also be it is identical with the material of the high-K dielectric layer 1051, can be with
Formed using identical technique is synchronous with the high-K dielectric layer 1051.
It should be noted that being also formed with isolation structure in first semiconductor layer 102（It is not shown）, the isolation junction
Structure is located between nodeless mesh body pipe, for realizing the isolation between nodeless mesh body pipe.
The nodeless mesh body pipe that the present invention is provided can pass through the manufacture method shape of the nodeless mesh body pipe that the present invention is provided
Into.Can also be formed using other manufacture methods, the invention is not limited in this regard.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (21)
1. a kind of manufacture method of nodeless mesh body pipe, it is characterised in that include：
Substrate is provided, the substrate includes dielectric layer, the first semiconductor layer on the dielectric layer；
Graphical first semiconductor layer, forms source region, drain region and is located at the source region and drain region
Fin between domain；
The certain media layer below the fin is removed, the fin is suspended on remaining media layer；
The surface smoothing of the fin is made, nano wire is formed；
Channel ion doping is carried out to the nano wire, ion doping concentration is gradually passed to nano wire center from nanowire surface
Subtract；
Enclosing structure is formed on the nano wire after doping；
Source and drain doping with nanowire channel ion doping same type is carried out to the source region, drain region, to form source
Pole and drain electrode.
2. the manufacture method of nodeless mesh body pipe as claimed in claim 1, it is characterised in that channel ion is carried out to the nano wire
The step of doping, includes：
Dopant material is covered on the surface of the nano wire；
Ion in the dopant material is spread from surface to center in the nano wire, forms dopant ion dense in nano wire
Degree gradient；
Remove the dopant material.
3. the manufacture method of nodeless mesh body pipe as claimed in claim 2, it is characterised in that the nodeless mesh body pipe is p-type without knot
Transistor, the dopant material are Pyrex.
4. the manufacture method of nodeless mesh body pipe as claimed in claim 2, it is characterised in that the nodeless mesh body pipe is N-type without knot
Transistor, the dopant material are phosphorosilicate glass.
5. as described in claim 3 or 4 nodeless mesh body pipe manufacture method, it is characterised in that cover on the surface of the nano wire
The step of lid dopant material, includes：The dopant material is formed by the method for chemical vapor deposition or physical vapour deposition (PVD).
6. as described in claim 3 or 4 nodeless mesh body pipe manufacture method, it is characterised in that cover on the surface of the nano wire
The step of lid dopant material, includes：The dopant material is formed by the method for ald.
7. as described in claim 3 or 4 nodeless mesh body pipe manufacture method, it is characterised in that remove the step of the dopant material
Suddenly include：The dopant material is removed by wet etching.
8. the manufacture method of nodeless mesh body pipe as claimed in claim 1, it is characterised in that the fin is rectangular structure, makes institute
The step of stating the surface smoothing of fin, formation nano wire includes：
The second semiconductor layer is formed on the surface of the fin, the fin and second semiconductor layer constitute cross section for eight sides
The column construction of shape；
The column construction is aoxidized, Chemical cleaning is carried out to the part after oxidation, to form nano wire.
9. the manufacture method of nodeless mesh body pipe as claimed in claim 8, it is characterised in that the material of first semiconductor layer is
Silicon of the surface for (100), the fin of the rectangular structure have the surface of (100) and (110) crystal face.
10. the manufacture method of nodeless mesh body pipe as claimed in claim 9, it is characterised in that by epitaxially grown mode in institute
The surface for stating fin forms second semiconductor layer, and the material of second semiconductor layer is silicon or SiGe, described octagonal
Column construction includes the surface on the surface of two (100) crystal faces, the surface of two (110) crystal faces and four (111) crystal faces.
The manufacture method of 11. nodeless mesh body pipes as claimed in claim 1, it is characterised in that the step of forming enclosing structure includes：
Nanowire surface after doping forms high-K dielectric layer；
The filler metal material in the region that source region, drain region and remaining media layer are surrounded, makes the metal material
Flush with first semiconductor layer surface, to form metal gates.
12. a kind of nodeless mesh body pipes, it is characterised in that include：
Substrate, the substrate include dielectric layer, the first semiconductor layer on the dielectric layer；
Form fluted in first semiconductor layer and certain media layer, positioned at first quasiconductor of the groove both sides
Layer includes source electrode and drain electrode；
The nano wire contacted with the source electrode and drain electrode between the source electrode and drain electrode, is used as the raceway groove of transistor；
Doped with the dopant ion with the source electrode and drain electrode same type in the raceway groove, and ion doping concentration is from nano wire
Gradually successively decrease to nano wire center on surface；
It is filled in the groove and covers the enclosing structure of the nano wire.
13. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the material of first semiconductor layer is that surface is
(100) silicon.
14. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the enclosing structure includes being formed at the nano wire
The high-K dielectric layer on surface, and the metal gates in the groove.
15. nodeless mesh body pipes as claimed in claim 14, it is characterised in that the nodeless mesh body pipe also includes：Positioned at metal gate
The first insulating barrier between pole and source electrode, the second insulating barrier between the metal gates and drain electrode.
16. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the ion doping concentration in the nanowire surface region
More than or equal to 2 × 1019Atoms per cubic centimeter.
17. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the nodeless mesh body pipe be p-type nodeless mesh body pipe, source
Potential energy of the potential energy of pole higher than drain electrode.
18. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the nodeless mesh body pipe be N-type nodeless mesh body pipe, source
Potential energy of the potential energy of pole less than drain electrode.
19. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the cross section of the nano wire is circular or oval
Shape.
20. nodeless mesh body pipes as claimed in claim 12, it is characterised in that be also formed with isolation junction in first semiconductor layer
Structure.
21. nodeless mesh body pipes as claimed in claim 12, it is characterised in that the nodeless mesh body Gutron cross as claim 1~
Described in 11 any claims, the manufacture method of nodeless mesh body pipe is formed.
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| CN104425607B (en) * | 2013-09-05 | 2017-07-14 | 中芯国际集成电路制造(上海)有限公司 | Nodeless mesh body pipe and preparation method thereof |
| US9559284B2 (en) * | 2015-03-17 | 2017-01-31 | Globalfoundries Inc. | Silicided nanowires for nanobridge weak links |
| CN105185823A (en) * | 2015-08-11 | 2015-12-23 | 中国科学院半导体研究所 | Manufacturing method of ring-fence non-junction nanowire transistor |
| CN107887425B (en) * | 2016-09-30 | 2020-05-12 | 中芯国际集成电路制造(北京)有限公司 | Method for manufacturing semiconductor device |
| CN107331611B (en) * | 2017-06-23 | 2021-06-04 | 江苏鲁汶仪器有限公司 | Method for three-dimensional self-limiting accurate manufacturing of silicon nanowire column |
| CN110034015B (en) | 2019-04-19 | 2021-07-23 | 中国科学院微电子研究所 | Method for forming nanowire fence device |
| CN114256148B (en) * | 2020-09-22 | 2022-10-28 | 荣耀终端有限公司 | Semiconductor structure preparation method |
| CN116190424B (en) * | 2022-10-25 | 2024-03-15 | 北京超弦存储器研究院 | Semiconductor device and manufacturing method thereof |
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| US7087920B1 (en) * | 2005-01-21 | 2006-08-08 | Hewlett-Packard Development Company, L.P. | Nanowire, circuit incorporating nanowire, and methods of selecting conductance of the nanowire and configuring the circuit |
| CN102983171A (en) * | 2012-12-11 | 2013-03-20 | 哈尔滨工程大学 | Structure and manufacturing method of vertical junctionless gate-all-round MOSFET device |
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| US8722492B2 (en) * | 2010-01-08 | 2014-05-13 | International Business Machines Corporation | Nanowire pin tunnel field effect devices |
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| US7087920B1 (en) * | 2005-01-21 | 2006-08-08 | Hewlett-Packard Development Company, L.P. | Nanowire, circuit incorporating nanowire, and methods of selecting conductance of the nanowire and configuring the circuit |
| CN102983171A (en) * | 2012-12-11 | 2013-03-20 | 哈尔滨工程大学 | Structure and manufacturing method of vertical junctionless gate-all-round MOSFET device |
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