CN104198923B - Linear analog circuit fault diagnosis method - Google Patents
Linear analog circuit fault diagnosis method Download PDFInfo
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- CN104198923B CN104198923B CN201410436919.5A CN201410436919A CN104198923B CN 104198923 B CN104198923 B CN 104198923B CN 201410436919 A CN201410436919 A CN 201410436919A CN 104198923 B CN104198923 B CN 104198923B
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Abstract
The invention discloses a linear analog circuit fault diagnosis method. The linear analog circuit fault diagnosis method comprises the steps of firstly simulating an analog circuit to obtain fault feature column vectors corresponding to fault source elements, dividing the corresponding fault source elements into an ambiguity set when the fault feature column vectors are identical within an error range, selecting a representative fault source element from each ambiguity set, respectively performing Q-time simulation on each representative fault source element to obtain Q fault feature column vectors, using each representative fault source element as a category, obtaining classification model data according to the corresponding fault feature column vectors, obtaining fault column vectors according to normally-operating output voltage phasor quantity vectors and fault output voltage phasor quantity vectors when the analog circuit breaks down, and classifying the fault column vectors according to the classification model data and corresponding classification methods to obtain fault diagnosis results. The linear analog circuit fault diagnosis method is simple and easy to operate and is based on multiple-time simulation, and the influence of tolerance on fault diagnosis can be effectively reduced.
Description
Technical field
The invention belongs to Analog Circuit Fault Diagnosis Technology field, more specifically, it is related to a kind of In Linear Analog Circuits
Method for diagnosing faults.
Background technology
In current Analog Circuit Fault Diagnosis Technology field, two emphasis and difficulties are had to need to solve.
(1) analog element continuous parameters sex chromosome mosaicism
The solution route of this problem is to carry out unified Modeling to component parameters consecutive variations (from the zero to infinity).But it is aobvious
The open circuit so commonly used at present and short trouble model, and preset parameter fault type (as parameter drifts about 50% up and down) and fault
Segmented model (if Parameters variation is ± 5% to ± 10%) all cannot be competent at this task.And in system transfer function model theory
Soft fault in energy diagnostic network, but due to needing write through system transfer function to carry out fault diagnosis, so there is complicated electricity
Road is difficult to write out transfer function, and equation is difficult the shortcomings of solve, and component tolerance may cover fault-signal.
(2) the impact problem to fault diagnosis for the tolerance
Even if the element fault-free in analog circuit, its parameter be likely to change within the specific limits (be normally defined ±
Within 5%), this is referred to as tolerance problem.Tolerance problem also results in fault output to be changed near standard failure output, impact
Fault diagnosis accuracy.
Content of the invention
It is an object of the invention to overcoming the deficiencies in the prior art, provide a kind of Diagnosis for Linear Analog Circuit method,
Make fault diagnosis simple, and the impact to fault diagnosis for the tolerance can be reduced.
For achieving the above object, the present invention by theory analysis it was demonstrated that can be carried out using fault signature column vector
Analog circuit fault characterizes, and proposes Diagnosis for Linear Analog Circuit method based on this, comprises the following steps:
S1:Analog circuit is emulated, obtains the corresponding fault signature column vector of each fault source element, work as fault signature
Column vector is identical in range of error, then corresponding fault source element is divided into an ambiguity group, selects in each ambiguity group
One representing fault source element, representing fault source element quantity is designated as F;Emulation obtains the concrete steps bag of fault signature column vector
Include:
S1.1:Fault-free emulation is carried out to analog circuit, obtains the voltage phasor of each measuring point of analog circuit, constitute fault-free
Voltage phasor column vectorM represents measuring point quantity, and subscript T represents transposition;
S1.2:It is sequentially adjusted in the parameter of each fault source element, re-starts emulation, obtain the fault of each measuring point of analog circuit
Voltage phasor, constitutes false voltage phasor vectorThe span of j is j=1,2 ..., N, N
Represent source of trouble number of elements;
S1.3:Calculate the voltage increment column vector of each fault source element
S1.4:The voltage increment calculating each fault source element is than column vector kj=[k1j,k2j,…,kMj]T, computing formula is:
S1.5:According to voltage increment than column vector kj, obtain fault signature column vector Wherein RekrjRepresent krjReal part, ImkrjRepresent krj's
Imaginary part, the span of r is r=2,3 ..., M;
S2:The F representing fault source element selected for step S1, is carried out Q time to each representing fault source element respectively
Emulation, obtains Q fault signature column vectorThe span of q is q=1,2 ..., Q;
S3:Using each representing fault source element as a classification, according to each representing fault source element in step S2
Fault signature column vectorObtain disaggregated model data;
S4:When analog circuit normally runs, record the 1st measuring point and fault signature column vector in advanceMiddle element pair
Answer the output voltage of measuring point, composition faultless voltage phasor vectorWhen analog circuit breaks down, record the 1st measuring point
With fault signature column vectorThe output voltage of the corresponding measuring point of middle element, constitutes false voltage phasor column vectorCalculate electricity
Pressure incremental raio column vector kf, corresponding fault column vector is obtained according to the constructive method of fault signature column vector
S5:The disaggregated model data being obtained according to step S3 and corresponding sorting technique are to fault column vectorReturned
Class, obtains fault diagnosis result.
Further, in addition it is also necessary to fault signature column vector in step S2Simplified, compressing method is:Only retain
By combining the element value that each ambiguity group can be made a distinction, other elements value is deleted.
Further, the method obtaining disaggregated model data in step S3 is:For each representing fault source element, ask for
Q fault signature column vectorMeansigma methodss, obtain center column vectorIn step s 5, corresponding sorting technique is:Point
Do not calculateTo each center column vectorDistance, the corresponding ambiguity group of representing fault source element of minimum range is fault
Diagnostic result.
Further, the method obtaining disaggregated model data in step S3 is:In F representing fault source element, each two
Q fault signature column vector of representing fault source elementAs one group of training data, instructed using Support Vector Machines
Get 2 graders of D=F (F-1);In step s 5, corresponding sorting technique is:By fault column vectorInput each point
Class device, the number of votes obtained of each representing fault source element in D classification results of statistics, the most representing fault source element of poll is corresponding
Ambiguity group is fault diagnosis result.
Diagnosis for Linear Analog Circuit method of the present invention, emulates to analog circuit first, obtains each source of trouble unit
Part corresponding fault signature column vector, when fault signature column vector is identical in range of error, then by corresponding fault source element
It is divided into an ambiguity group, select a representing fault source element in each ambiguity group, then respectively to each representing fault source
Element carries out Q emulation, obtains Q fault signature column vector, using each representing fault source element as a classification, according to right
Fault signature column vector is answered to obtain disaggregated model data, when analog circuit breaks down, according to the normal output voltage running
Phasor vector sum fault output voltage phasor vector obtains fault column vector, according to disaggregated model data and corresponding sorting technique
Fault column vector is sorted out, obtains fault diagnosis result.
It is relatively simple that the present invention carries out fault diagnosis, calculating process by fault signature column vector, and complexity is little.And
The present invention obtains disaggregated model data based on the fault signature column vector of Multi simulation running, can effectively reduce tolerance and fault is examined
Disconnected impact, makes fault diagnosis result more accurate.
Brief description
Fig. 1 is analog circuit schematic diagram;
Fig. 2 is analog circuit fault schematic diagram shown in Fig. 1;
Fig. 3 is analog circuit fault equivalent schematic shown in Fig. 1;
Fig. 4 is equivalent current sourceIndependent role schematic diagram;
Fig. 5 is the workflow schematic diagram of Diagnosis for Linear Analog Circuit method of the present invention;
Fig. 6 is the acquisition schematic flow sheet of fault signature column vector;
Fig. 7 is second order Thomas's circuit diagram;
Fig. 8 is the simulation result scattergram of 100 fault signatures.
Specific embodiment
Below in conjunction with the accompanying drawings the specific embodiment of the present invention is described, so that those skilled in the art is preferably
Understand the present invention.Requiring particular attention is that, in the following description, when known function and design detailed description perhaps
Can desalinate the present invention main contents when, these descriptions will be ignored here.
In order to the technology contents of the present invention are better described, first the theoretical derivation process of the present invention is illustrated.
Fig. 1 is analog circuit schematic diagram.As shown in figure 1, this analog circuit is a linear time invariant circuit, element xj's
Admittance is designated as yj.It is by the i-th=1,2 ..., the column vector that the voltage phasor of M measuring point output is constituted.It is independent source.Fig. 2
It is analog circuit fault schematic diagram shown in Fig. 1.As shown in Fig. 2 without loss of generality it is assumed that working as element xjFault when breaking down
Admittance is yj+Δyj.The false voltage phasor vector now recording on M measuring point isIt is assumed that fault admittance Δ yjOn
Electric current beAccording to Substitution Theoren, element Δ yjIndependent current can be usedSubstitute.Fig. 3 is simulation electricity shown in Fig. 1
Road fault equivalence schematic diagram.According to superposition theorem, the false voltage phasor vector in Fig. 3 isWithCoefficient algebraically
With.Fig. 1 isThe schematic diagram of independent role.Fig. 4 is equivalent current sourceIndependent role schematic diagram.
Analyzed according to above, the voltage phasor increment column vector under fault can be obtained
Wherein ZjIt is the transfger impedance column vector from fault end to test port.It can be seen that ZjIndependent of equivalent fault sourceTherefore it is also independent from the parameter value Δ y of fault elementj.In fact ZjIt is by circuit-under-test structure and source of trouble position
Determine.Due to a total of M can and measuring point, therefore column vectorCan be represented by the formula:
Use column vectorIn first elementRemoveObtain voltage increment than column vector kj:
Obviously, kjBy ZjUnique determination, therefore it is also by circuit structure and fault source element xjPosition determined.And
Independent of element xjParameter value.That is, no matter element xjThere is great parameter drift, kjAll constant, therefore, it is a system
One fault signature method.
If circuit-under-test has N number of fault source element, that is, the span of j is j=1,2 ..., N, then fault signature
Have N number of.So the voltage increment according to each fault source element is than column vector kjVoltage increment can be obtained than matrix K, represent
For:
This matrix column representing fault source element, row represents measuring point, i.e. kijRepresent j-th fault source element to survey at i-th
The voltage increment ratio of point.Identical row represent different faults identical feature, and these faults can not be distinguished, and constitutes fuzzy
Group.Understand k from formula (3)1j=1.Therefore, voltage increment is 1 than the first row all elements of matrix K.Cannot distinguish between any event
Barrier, can not consider.Again due to impedance ZjFor complex vector, therefore kijIt is also plural number, remember that its real part and imaginary part are respectively Rekij
And Imkij, then knowledge base can be obtained from KFor:
WhereinIt is row phasor, knowledge baseFor 2 (M-1) × N matrix, each of which row expression one
Fault signature column vector.
When analog circuit breaks down, with emulation under identical independent source input condition, obtain the event of M measuring point
Barrier voltage phasor column vectorThen obtain voltage increment than column vector kf, then obtained according to the principle of compositionality of formula (5)
Fault column vectorSo meet formulaJ give the source of trouble, wherein ejIt is j-th fault signature column vector pair
The standard base vector answered.That is, working as fault column vectorWith knowledge baseCertain fault signature column vector identical
When, then the current fault element of analog circuit is this corresponding element of fault signature column vector.But because side circuit is subject to
To Effect of Tolerance, when fault source element xjWhen breaking down, the fault column vector that recordsNot necessarily just it is equal to its standard event
Barrier feature column vectorSo fault diagnosis becomes a classification problem, and number to be sorted is exactly the number of defects.
Diagnosis for Linear Analog Circuit method that the present invention based on above theoretical derivation proposed is described below.
Fig. 5 is the workflow schematic diagram of Diagnosis for Linear Analog Circuit method of the present invention.As shown in figure 5, the present invention
Diagnosis for Linear Analog Circuit method comprises the following steps:
S501:Analog circuit is emulated, obtains the corresponding fault signature column vector of each fault source element, when fault is special
Levy column vector identical in range of error, then corresponding fault source element is divided into an ambiguity group, select in each ambiguity group
Select a representing fault source element, representing fault source element quantity is designated as F.
Fig. 6 is the acquisition schematic flow sheet of fault signature column vector.As shown in figure 5, fault signature row are obtained by emulation
Vectorial concretely comprises the following steps:
S601:Fault-free emulation is carried out to analog circuit, obtains the voltage phasor of each measuring point of analog circuit, constitute fault-free
Voltage phasor column vectorM represents measuring point quantity, and subscript T represents transposition.
S602:It is sequentially adjusted in the parameter of each fault source element, re-starts emulation, obtain the fault of each measuring point of analog circuit
Voltage phasor, constitutes false voltage phasor vectorJ=1,2 ..., N, N represent fault source element
Quantity.
S603:Calculate the voltage increment column vector of each fault source element
S604:The voltage increment calculating each fault source element is than column vector kj=[k1j,k2j,…,kMj]T, computing formula is:
S605:According to voltage increment than column vector kj, obtain fault signature column vector Wherein RekrjRepresent krjReal part, ImkrjRepresent krj's
Imaginary part, the span of r is r=2,3 ..., M.
S502:The F representing fault source element selected for step S1, carries out Q to each representing fault source element respectively
Secondary emulation, Q >=1, arrange according to actual needs, obtain Q fault signature column vectorThe span of q is q=1,2 ...,
Q.
In actual applications, in order to reduce complexity, fault signature column vector can be simplified, only retain and pass through group
The element value that each ambiguity group can be made a distinction by conjunction, other elements value is deleted, is equivalent to and picks out optimum measuring point scheme.
This measuring point optimal way is similar with the measuring point selection mode in integer coding table technology.When there is multiple combination scheme, can
To be selected as needed, generally select the scheme of element value minimum number.In fact, deleting k in step S6051j=1
It is that fault signature column vector is simplified.It can be seen that, the fault signature column vector after simplifyingG table
Show the element number simplifying rear fault signature column vector.It is possible to only special to the 1st measuring point and fault when so in this step
Levy column vectorThe output voltage of the corresponding measuring point of middle element is emulated and is calculated.
S503:Using each representing fault source element as a classification, divided according to Q emulation data in step S2
Class model data.
Above step is properly termed as the fault modeling stage, that is, obtain (the mould of namely classifying of the fault model in analog circuit
Type), then fault diagnosis is carried out using fault model.
S504:When analog circuit normally runs, record the 1st measuring point and fault signature column vector in advanceMiddle element
The output voltage of corresponding measuring point, composition faultless voltage phasor vectorWhen analog circuit breaks down, record the 1st survey
Point and fault signature column vectorThe output voltage of the corresponding measuring point of middle element, constitutes false voltage phasor column vectorCalculate
Voltage increment is than column vector kf, corresponding fault column vector is obtained according to the constructive method of fault signature column vector
In actual applications, without the faultless voltage phasor vector recording in advanceCan also use and emulate
To this data, it is however noted that, simulated conditions should be as far as possible identical with actual motion condition.
S505:The disaggregated model data being obtained according to step S3, according to corresponding sorting technique to fault column vectorEnter
Row is sorted out, and obtains fault diagnosis result.
In actual applications, can selection sort model building method as needed.In the present embodiment, provide two kinds of classification
Model data acquisition methods and corresponding sorting technique.
Method one:For each representing fault source element, ask for Q fault signature column vectorMeansigma methodss, in obtaining
Heart column vectorObviously, when simulation times are only 1, center column vectorCorresponding sorting technique is:Calculate respectivelyTo each center column vectorDistance, the corresponding ambiguity group of representing fault source element of minimum range is fault diagnosis knot
Really.
Method two:In F representing fault source element, Q fault signature column vector of each two representing fault source element
As one group of training data, it is trained obtaining D=C (F, 2)=F (F-1)/2 grader using Support Vector Machines.
SVM is a kind of conventional sorting technique, and its principle is:Both sides in the separately hyperplane of two class data
Have two hyperplane parallel to each other, set up the suitable separating hyperplane in direction make between two hyperplane parallel with it away from
From maximization.In the present invention, because each representing fault source element has one group of fault signature column vector it is therefore desirable to set up D
=C (F, 2)=F (F-1)/2 grader is being classified.
Remember that one group of training data is { αt,βt, t=1,2 ..., 2Q, βt∈{-1,1},αt∈RG, wherein, G represents that fault is special
Levy column vectorMiddle element number, αtRepresent Q fault signature column vector of two representing fault source elements for trainingAmount to 2Q fault signature column vector, βt=-1 and βt=1 represents positive and negative two class data respectively.The differentiation of two classes is to pass through
Define hyperplane H (x)=w α+b=0 to realize, wherein w=[w1,w2,…,wg]TRepresent weight vectors, b is side-play amount.
The process of data training is to find the suitable weight vectors factor w distance of two class samples is maximized.Mathematically it is simply that
Following formula meet in the case of so that overhead functions wTW minimizes.
βt(wTαt+b)≥1 (7)
The solution of this optimal problem by defining Lagrangian, and can be converted into dual problem.
The weight vectors w of therefore optimization is as follows.
Support phasor grader can be represented with following formula.
F (x)=sign [wTα+b] (10)
Wherein, sign [] represents sign function.
In the present invention, fault diagnosis is classification problem more than (number to be sorted is ambiguity group number), and the present invention adopts
One-against-one method, for the diagnosis of F fault ambiguity group, fault ambiguity group is a class fault it is therefore desirable to F
(F-1)/2 graders.
Wherein wmnAnd bmnIt is m class fault respectively and weight vectors that the n-th class fault is classified and side-play amount, m takes
Value scope is m=1, and the span of 2 ..., F, n is n=1, and 2 ..., F, m ≠ n, α are fault column vector to be diagnosed.
Corresponding sorting technique is:By fault column vectorInput each grader, in D classification results of statistics
The number of votes obtained of each fault source element, the most fault source element of poll is fault diagnosis result.If i.e.The result being given is m class fault, then such Jia 1, otherwise the n-th class adds 1, final obtains
Many ballots are exactly the source of trouble.
Embodiment
In order to the practical work process of the present invention is described, carry out experimental verification from second order Thomas's circuit.The appearance of experiment
Difference and measurement error are defined as:Resistance tolerance scope aR=± 5%, capacitance tolerance scope aC=± 10%, measurement error scope e
=± 5%.Fig. 7 is second order Thomas's circuit diagram.As shown in fig. 7, in the present embodiment, the outfan of each amplifier is as survey
Point, is from left to right designated as n1, n2 and n3 respectively.The fault modeling stage, resistance RjParameter adjustment be 2Rj, capacity cell CjAdjustment
For 2Cj.Pumping signal is the sinusoidal signal of 1kHz, 1V.Table 1 is the emulation voltage obtaining under each fault condition of the present embodiment.This
In embodiment, voltage unit is V.
Table 1
Table 2 is calculated voltage phasor increment.
Table 2
Table 3 is calculated voltage phasor incremental raio.
Table 3
In table 3, R1, R2, R3 and C1 have identical voltage phasor incremental raio, i.e. k1=k2=k3=k7=[1,
1.5915i,-1.5915i]T, it is consequently belonging to same ambiguity group, R1 is elected to be the representing fault source of ambiguity group { R1, R2, R3, C1 }
Element.Equally, R4 and C2 is an ambiguity group, R4 is elected to be the representing fault source element of ambiguity group { R4, C2 }, R5 is elected to be fuzzy
The representing fault source element of group { R5, R6 }.The corresponding fuzzy group # of R1, R4, R5 is respectively 1,2,3.Measuring point n1 is all above
Fault signature is identical, does not consider.Table 4 is the fault signature table of the present embodiment.
Table 4
From table 4 it can be seen that the real part of the imaginary part of measuring point n2 and measuring point n3 pass through combination enough to distinguish all represents former
Barrier source element, therefore only retains this two data in fault signature column vector, realizes fault signature column vector is simplified.
For each representing fault source element, carry out 100 Monte Carlo simulations respectively, other faults are in its tolerance simultaneously
In the range of random value.Fig. 8 is the simulation result scattergram of 100 fault signatures.
If disaggregated model data is obtained using method one, can obtain in Three Representss fault source element according to calculating
Heart column vector is respectively:
If disaggregated model data is obtained using method two, using 100 simulation results, SVM is instructed
Practice.Table 5 is the SVM training result of the present embodiment.
Table 5
Also marked the corresponding straight line of training result in fig. 8.For example, Fig. 8 cathetus R1-R4 is used for distinguishing R1 and R4,
Its weight vectors is w12=[0.9293,1.5120]T.
The fault diagnosis stage, four faults of the present embodiment analogue simulation:C2=1pF, C2=9nF, C2=11nF and C2
=100 μ F, and add random meausrement error.Table 6 is fault simulation output voltage result.
Table 6
Because in the present embodiment, fault signature column vector only remains the imaginary part of measuring point n2 and the real part of measuring point n3.So exist
In the fault diagnosis stage, need to obtain the output voltage of measuring point 1,2,3, in calculated voltage increment than column vector kfIn, only
The imaginary part of measuring point n2 and the corresponding element value of measuring point n3 is needed to constitute fault column vector
Taking fault C2=1pF as a example, its voltage increment is:
Voltage increment can be calculated than column vector kfFor:
The imaginary part of measuring point n2 and the real part of measuring point n3 is selected to constitute fault column vectorI.e.
Table 7 is the fault column vector that each simulated failure of the present embodiment obtains.
Table 7
If fault diagnosis is carried out using method one, then directly calculate fault column vector to Three Representss source of trouble unit
The distance of the center column vector of part.WithAs a example, it is computed obtaining,With central series to
AmountDistance minimum, therefore fault diagnosis result belongs to the 2nd ambiguity group for this fault, that is,
{ R4, C2 }, diagnostic result is correct.
If fault diagnosis is carried out using method two, equally withAs a example, three classification
The classification results of device be respectively the 2nd ambiguity group, the 3rd ambiguity group, the 2nd ambiguity group it is seen that the gained vote of the 2nd ambiguity group
Many, therefore fault diagnosis result belongs to the 2nd ambiguity group for this fault, and i.e. { R4, C2 }, diagnostic result is correct.
To the present invention, illustrative specific embodiment is described above, in order to those skilled in the art
Understand the present invention, the ordinary skill people it should be apparent that the invention is not restricted to the scope of specific embodiment, to the art
For member, as long as various change is in the spirit and scope of the present invention of appended claim restriction and determination, these changes
It is it will be apparent that all utilize the innovation and creation of present inventive concept all in the row of protection.
Claims (4)
1. a kind of Diagnosis for Linear Analog Circuit method is it is characterised in that comprise the following steps:
S1:Analog circuit is emulated, obtains the corresponding fault signature column vector of each fault source element, when fault signature arrange to
Amount is identical in range of error, then corresponding fault source element is divided into an ambiguity group, selects one in each ambiguity group
Representing fault source element, representing fault source element quantity is designated as F;The concrete steps that emulation obtains fault signature column vector include:
S1.1:Fault-free emulation is carried out to analog circuit, obtains the voltage phasor of each measuring point of analog circuit, constitute faultless voltage
Phasor column vectorM represents measuring point quantity, and subscript T represents transposition;
S1.2:It is sequentially adjusted in the parameter of each fault source element, re-starts emulation, obtain the false voltage of each measuring point of analog circuit
Phasor, constitutes false voltage phasor vectorThe span of j is j=1, and 2 ..., N, N represent event
Barrier source element quantity;
S1.3:Calculate the voltage increment column vector of each fault source element
S1.4:The voltage increment calculating each fault source element is than column vector kj=[k1j,k2j,…,kMj]T, computing formula is:
S1.5:According to voltage increment than column vector kj, obtain fault signature column vectorWherein RekrjRepresent krjReal part, ImkrjRepresent krj's
Imaginary part, the span of r is r=2,3 ..., M;
S2:The F representing fault source element selected for step S1, carries out Q emulation respectively to each representing fault source element,
Obtain Q fault signature column vectorThe span of q is q=1,2 ..., Q;
S3:Using each representing fault source element as a classification, according to Q event of each representing fault source element in step S2
Barrier feature column vectorObtain disaggregated model data;
S4:When analog circuit normally runs, record the 1st measuring point and center column vector in advanceMiddle element corresponds to the defeated of measuring point
Go out voltage, composition faultless voltage phasor vectorWhen analog circuit breaks down, record the 1st measuring point and fault signature
Column vectorThe output voltage of the corresponding measuring point of middle element, constitutes false voltage phasor column vectorCalculate voltage increment than row to
Amount kf, corresponding fault column vector is obtained according to the constructive method of fault signature column vector
S5:The disaggregated model data being obtained according to step S3 and corresponding sorting technique are to fault column vectorSorted out, obtained
To fault diagnosis result.
2. Diagnosis for Linear Analog Circuit method according to claim 1 is it is characterised in that in described step S2, go back
Need to fault signature column vectorSimplified, compressing method is:Only retain and each ambiguity group can be carried out by area by combination
The element value dividing, other element values are deleted.
3. Diagnosis for Linear Analog Circuit method according to claim 1 is it is characterised in that obtain in described step S3
The method of disaggregated model data is:For each representing fault source element, ask for Q fault signature column vectorMeansigma methodss,
Obtain center column vector
In step s 5, corresponding sorting technique is:Calculate respectivelyTo each center column vectorDistance, the generation of minimum range
The corresponding ambiguity group of table fault source element is fault diagnosis result.
4. Diagnosis for Linear Analog Circuit method according to claim 1 is it is characterised in that obtain in described step S3
The method of disaggregated model data is:In F representing fault source element, Q fault signature row of each two representing fault source element
VectorAs one group of training data, it is trained obtaining D=F (F-1)/2 grader using Support Vector Machines;
In step s 5, corresponding sorting technique is:By fault column vectorInput each grader, count D classification results
In each representing fault source element number of votes obtained, the most corresponding ambiguity group of representing fault source element of poll be fault diagnosis knot
Really.
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