CA2010265A1 - Appareil a boucle a phase asservie - Google Patents
Appareil a boucle a phase asservieInfo
- Publication number
- CA2010265A1 CA2010265A1 CA2010265A CA2010265A CA2010265A1 CA 2010265 A1 CA2010265 A1 CA 2010265A1 CA 2010265 A CA2010265 A CA 2010265A CA 2010265 A CA2010265 A CA 2010265A CA 2010265 A1 CA2010265 A1 CA 2010265A1
- Authority
- CA
- Canada
- Prior art keywords
- phase
- circuit
- phase lock
- output
- detector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000035945 sensitivity Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
- H03L7/146—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal
- H03L7/148—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by using digital means for generating the oscillator control signal said digital means comprising a counter or a divider
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/08—Modifications of the phase-locked loop for ensuring constant frequency when the power supply fails or is interrupted, e.g. for saving power
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S331/00—Oscillators
- Y10S331/02—Phase locked loop having lock indicating or detecting means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3796889 | 1989-02-17 | ||
JP1-37968 | 1989-02-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2010265A1 true CA2010265A1 (fr) | 1990-08-17 |
CA2010265C CA2010265C (fr) | 1994-03-08 |
Family
ID=12512367
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002010265A Expired - Fee Related CA2010265C (fr) | 1989-02-17 | 1990-02-16 | Appareil a boucle a phase asservie |
Country Status (2)
Country | Link |
---|---|
US (1) | US4988955A (fr) |
CA (1) | CA2010265C (fr) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5594735A (en) * | 1992-04-10 | 1997-01-14 | Nec Corporation | TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots |
CA2093834C (fr) * | 1992-04-10 | 1998-08-18 | Jun Jokura | Synthetiseur de frequence d'unite mobile amrt a mode d'economie d'energie durant les tranches d'emission et de reception |
JPH06112817A (ja) * | 1992-09-25 | 1994-04-22 | Fujitsu Ltd | Pll 周波数シンセサイザ回路 |
US5394444A (en) * | 1993-07-12 | 1995-02-28 | Motorola, Inc. | Lock detect circuit for detecting a lock condition in a phase locked loop and method therefor |
JPH0774671A (ja) * | 1993-09-03 | 1995-03-17 | Alps Electric Co Ltd | 送受信機の発振回路及びpllic |
US5559473A (en) * | 1994-06-23 | 1996-09-24 | At&T Global Information Solutions Company | Multi-range voltage controlled oscillator |
US5477198A (en) * | 1994-06-23 | 1995-12-19 | At&T Global Information Solutions Company | Extendible-range voltage controlled oscillator |
US5436597A (en) * | 1994-07-11 | 1995-07-25 | Sierra Semiconductor Corporation | Pro-capture circuit for phase locked loop circuits |
EP0711041A1 (fr) * | 1994-11-03 | 1996-05-08 | STMicroelectronics S.r.l. | Circuit de synchronisation de phase |
TW337054B (en) | 1995-09-28 | 1998-07-21 | Toshiba Co Ltd | Horizontal synchronous signal oscillation circuit |
JP3695819B2 (ja) | 1996-01-16 | 2005-09-14 | 株式会社東芝 | 信号処理回路及びこれを用いた再生装置 |
US5748050A (en) | 1996-03-29 | 1998-05-05 | Symbios Logic Inc. | Linearization method and apparatus for voltage controlled oscillator |
JP4319259B2 (ja) * | 1996-07-02 | 2009-08-26 | 株式会社東芝 | アクティブ・ワイドレンジpll装置、位相ロックループ方法及びディスク再生装置 |
EP0838900A1 (fr) * | 1996-10-25 | 1998-04-29 | Siemens Aktiengesellschaft | Boucle à verrouillage de phase avec contrÔle de frequence pour aider l'accrochage |
KR100215889B1 (ko) * | 1997-05-06 | 1999-08-16 | 구본준 | 클럭 동기 회로 |
SE9701805L (sv) * | 1997-05-15 | 1998-11-16 | Ericsson Telefon Ab L M | Fasadetektoranordning |
US5952853A (en) * | 1997-12-23 | 1999-09-14 | Hewlett-Packard Company | Method for extending the output range of pulse-width based phase detectors |
KR200176429Y1 (ko) * | 1997-12-30 | 2000-04-15 | 윤종용 | 입력되는 표시 모드에 대응하여 위상 동기 루프 회로의 입력 전압을 제어하는 디스플레이 장치 |
US20020087904A1 (en) * | 2000-12-28 | 2002-07-04 | Zhong-Ning (George) Cai | Method and apparatus for thermal sensitivity based dynamic power control |
US7630698B2 (en) * | 2005-07-26 | 2009-12-08 | Agere Systems Inc. | Fast switching, dual frequency phase locked loop |
US9509490B1 (en) * | 2015-09-21 | 2016-11-29 | Apple Inc. | Reference clock sharing |
KR20180033960A (ko) * | 2016-09-27 | 2018-04-04 | 삼성전자주식회사 | 클럭 스위치 장치 및 이를 포함하는 시스템-온-칩 |
CN111082436B (zh) * | 2019-12-27 | 2023-04-07 | 华北电力大学 | 一种基于锁相一致的直驱风电场振荡抑制方法及系统 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5835428B2 (ja) * | 1978-12-27 | 1983-08-02 | 日本電気株式会社 | 搬送波再生回路 |
-
1990
- 1990-02-16 CA CA002010265A patent/CA2010265C/fr not_active Expired - Fee Related
- 1990-02-16 US US07/480,927 patent/US4988955A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2010265C (fr) | 1994-03-08 |
US4988955A (en) | 1991-01-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |