CA1133144A - Dot matrix character printer with variable speed control - Google Patents

Abstract

Abstract of the Disclosure A dot matrix character printer having the capability of printing characters at variable speeds and with variable pitches. Variable pitch is provided through the use of programmable radix counters which control actuation of the printing solenoids. Solenoid actuation is based on print head position, with the actuation position being varied with print head velocity, to compensate for the distance travelled by the print head during the time between solenoid actuation and print wire impact; this permits operation at variable printing rates. Printing rate is limited by the cyclic rate of the print head, with an additional limitation based on dot printing density which prevents excessive heating of the printing solenoids.

Description

~3~

This application is a divisional of copending Canadian Ratent Application Serial No. 338,503 filed October 26, 1979 by Digital Equipment Corporation.
This invention relates to the field of electronically controlled character printers, particularly dot matrix printers which form characters as an array of dots at available locations. More specifically, this invention relates to a control system for such printers to permit the printing, at vari-able speeds, of characters having different pitch, with the capability of printing characters of different pitch on the same line.
Dot matrix character printers are well known in the art, particular-ly for use as output devices for computers and other electronic devices. These printers are used to produce printed character output on a paper medium in response to receiving electronic signals which correspond to the characters of the available character sets. Individual characters are formed from an approp-riate combination of dots selected from an array of available dot locations.
~enerally, these dot locations are arranged in an n-column by m-row matrix. A
printing head contains a solenoid-operated print rod for each location in the matrix. I~hen the printing of a character requires that a dot be written in a particular location, the corresponding solenoid in the printing head is activat-ed; this causes the associated prin~ing rod to be flung ~or "fired"~ in the direction of thP paper (i.e., "target"). An inked printing ribbon is interposed between the printing head and the paper. Thus, the fired printing rod impacts the ribbon and prints an irnpression of its end surface on the paper. The print-ing rod is actually a thin wire-shaped element with a flat end having a round cross section. It is this end which forms a dot on the paper.
TypicallyJ the printing head oE a dot matrix printer contains print-ing solenoids. These are assembled into close proximity with each other. The activation of these printing solenoids causes them to heat up. Dissipation of ~L~3;~4 solenoid heat is normally no-t a problem in slow speed character printers. How-ever, it has been observed to sometimes become a problem in high speed dot mat-rix character printers. ~hen the print head is activated for a substantial time and the characters to be generated in a relatively short interval require the printing of a somewhat higher than average number of dots during that interval, solenoid heat may be inadequately dissipated. When that happens, solenoid response characteristics may be altered due to parametric variations, and one or more of the printing rods may cause a dot to be printed slightly earlier or later than intended, or even not at all. This degrades the appearance of dots and characters printed under such conditions and may, under severe conditionsJ
even lead to the printing of unrecogni~able or incorrect characters. Solenoid power supply failure or degraded performance may also result, as a greater load is imposed thereon. And excessive heat may cause permanent damage to the sole-noids or other components. Gonsiderable efficiency is lost if the character printing rate is significantly reduced in order to avoid the solenoid heat dis-sipation problem, since high reliability would require a substantial reduction in speed.
ypically, in the prior art, in order to change the pitch of printèd characters9 it has been necessary to provide additional tracks on the ; 20 encoder at different pitches or to physically change the encoder-to-carriage "gear" ratio. These approaches have typically been cumbersome and not conducive to changing pitch on a character to character basis.
It should alsG be noted that the printing heads of prior art printers generally have their print rods all arrayed in a sin~le vertical column.
Unless the print head is capable o~ vertical motion, this means that dots formed by adjacent print wires (or rods~ cannot overlap; some dot spread caused by the ribbon may, however, allow some blending together of adjacent dots, but resolu-tion is ultimately limited to that provided by tangentially touching dots.

~L~33~

The present invention is designed to permit the printing of dot-matrix characters of different pitches (i.c., hori~ontal widths). Character pitch is selectable and variable on a character by character basis, if desired. Electronic signals under the user's control provide for pitch selection. Provision is also made to control the printing speed electroni-cally, to achieve smooth starting and stopping of the carriage while maxi-mi~ing the character printing rate. The maximum printing speed is limited by the speed at which the print head solenoids can operate. However, if the text to be printcd requires a dot printing rate which would result in over-heating of the print solenoids or their power supply, the printing speed is reduced until a safe dot printing rate is achieved. The maximum permissible dot printing rate is a system parameter empirically derivedr Variable rate character printing requires that the printing head carriage traverse the paper at a variable rate. Because the rate of carriage travel is appreciable with respect to the time between a solenoid actuation command and the time the associated printing rod strikes the paper~ it is necessary to compensate for variations in the carriage motion in order to always have the printing rods strike the paper in a desired position; this position is, of course, intended to be insensitive to the character printing rate. The situation is analagous to the case of a hunter shooting at a moving duck from a fixed location. In order to allow for the motion of the duck during the time his bullet is in flight, the hunter must aim ahead of the duck; this character printer merely presents the converse situation since the target is fixed and the projcctile is fired from a moving platform, although thc rel~tive motion problcm is the samc. Means are therefore provided for deriving a correction factor for actuating the solenoids at the proper times to compensate for the instantaneous rate of carriagc motion relative to the paper.

~ ~3~

Additionally, in the preferred embodiment of the invention, the print rods are arranged in two columns such that the print rods in one of the columns are vertically displaced with respect to the print rods in the other column. This permits a higher resolution (i.e., density~ dot printing and allows dots to be overlapped a significant amount, so that ths dot matrix char-acters more clearly approximate conventionally printed characters. Separate solenoid firing time signals are required for each column of print rods, to account for their different horiæontal positions at any given time.
The present invention also provides such features as the capability of allowing the user to change type fonts and pitch from character to character within the line.
According to a broad aspect of the present invention there is pro-vided a dot matrix character printer for printing characters of a pitch select-; able from among a plurality of available pitches~ comprising: a print head;
means for moving the print head; transition generator means for providing print head motion signals responsive to movement of the print head, each basic unit ofprint head displacement defining a transition; ~ransition counter means for providing print head actuation signals responsive to the print head motion sig-nals, the distance travelled by the print head between successive print head actuation signals defining an increment; increment counter means for providing intercharacter space signals responsive to print head actuation signals; said transition counter means and said increment counter means being variable radix counters; means for accepting signals representing the number of increments per ; character, the number of transitions per increment and the number of transitions per intercharacter space; means for setting the radix of the increment counte-r means to the number of increments per character represented by said signals;
means for setting the radix of the transition counter means, such radix setting ~33~

means being adapted to set the radix of the transition counter means to the number of transitions per intercharacter space during the intercharacter space and to the number of transitions per increment at all other times; and the increment counter means and the transition counter means being adapted to accept as their radices any values within their respective counting ranges.
According to another aspect of the present invention, there is provided a printer control circuit for use in a dot matrix character printer for printing characters of a pitch selectable from among a plurality of available pitches, said printer being of the type having a print head which includes dot printing means for generating dots, means for moving the print head, and encoder means for generating signals indicative of relative print head position, the signals generated by the encoder being referred to as tran-sition signals and the smallest unit of print head displacement resolved by the transition signals being referred to as a transition, the control circuit comprising: transition counter means for counting transitions to provide print head actuation signals in response to the transition signals, the distrance travelled by the print head between successive print head actuation signals defining an increment; increment counter means for counting increments to pro-vide intercharacter space signals during the intercharacter space, which is defined as a buffer zone following a character and during which printing of - another character is prohibited; said transition counter means and said in-crement counter means comprising variable radix counters; means for accepting a signal representing the number of increments per character, the number of transitions per increment and the number of transitions per intercharacter space; means for initializing the transition counter means and the increment counter means; means responsive to said intercharacter space signals for setting the radix of the transition counter means to the number of transitions per - 4a -~3L33~

intercharacter space in the intercharacter space and to the number of tran-sitions per increment at all other times, to generate an intercharacter space having at least one transition independent of the number of transitions per character; the increment counter means and the transition counter means being adapted ~o accep~ as their radices any values within their respective counting ranges; and means for setting the radix of the increment counter means to the number of transitions per increment; means for controlling the position where the printing of a character is to start, including means responsive to the state of a two-state character print signal for inhibiting the provision of print head actuation signals to the print head until such character print signal occurs in a first state, establishing a window during which printing may start, and simultaneously the generation of an intercharacter space is completed, as signified by the intercharacter space signal.
The invention will now be described in greater detail with refer-~-~ ence to the accompanying drawings in which:
Figure 1 is a high level functional block diagram of a dot matrix character printer according to the present invention;
Figure 2 is a diagrammatic illustration of a seven-wire printing head, further depicting one possible mapping of dot buffer output lines to solenoids;
Figure 3 is a diagrammatic illustration of an eleven-wire printing head, further depicting one possible mapping of dot buffer output lines to :~ solenoids;
Figure 4 is a functional block diagram of the Printer Control Circuit (PCC) of Figure l;
;~ Figure 5 is a state transition diagram of the Print Enable Circuit of Figure 4;
Figure 6 is a state table for the Print Enable Circuit;
- 4b -~33~

Figure 7 is an overall functional block diagram of the encoder signal processor of ~igure 4;
~ igure 8 is a detailed block diagram of the signal filters of Figure 7;
~ igure 9 is a detailed block diagram of the transition detector of F'igure 7;
Figure 10 is a detailed block diagram of the direction detector of Figure 7;
Figure 11 is a detailed block diagram of the transition and incre-ment counter of Figure 4;
Figure 12 is a detailed block diagram of the pulse stretcher of Figure 4; and Figure 13 is a diagram of the method steps involved in computing the flight time cornpensation count and for controlling the transition adder.
Referring now to Figure 1, there is shown a high-level functional block diagram of a dot matrix character printer according to the present invention. Paper 12 is the output medium on which the printing is performed.
The paper is normally carried on sprockets 14A, 14B passed a print bar not shown, according to conventional practice. The print har serves the same basic purpose as a platen ~i.e., acts as a hard backing surface to print against) except that it does not move the paper. The edges of the paper con-; tain evenly spaced vertical holes which mate with the teeth of drive sproc-kets 14A and 14B for vertically feeding the paper. Images are formed on the paper by a ribbon 16 which may be carried between a pair of ribbon reels 18A
and 18B or may be a cartridge type ribbon wownd on one reel or spool. The print rods or wires from print head 20 force the inked ribbon 16 onto the paper 12 and against the print bar, to cause an image of the print rod to be formed on the paper. Print head 20 is carried on a carriage which traverses the paper for positioning the print head in the proper location as each col-~33~

umn of dots is printed. Printing mechanism 22 comprises a mechanical assem-hly whicll includes the carriage and the necessary linkages and so forth for moving the carriage, together with a ribbon advancement mechanism for winding the ribbon (e.g., onto ree] 18B) as it is used. The printer mechanism also includes conventional mechanical linkages for connecting the line feed step-per motor 24 to the tractors or drive sprockets 14B and for connecting the carriage motor 26A to the carriag,e motion mechanism.
A printer control circuit (PCC) 30 provides the ac-tual control signals which cause the carriage to move to the proper location and the appropriate print solenoids to be energized. PCC 30 provides basically three types of control signals as outputs. A line feed control signal is provided as the first output on line 32 to line feed amplifier 34. In turn, line feed amplifier 34 provides the required drive signal to the line feed stepper ., ~; .
motor 24, to cause the line feed advance mechanism to move the drive sproc-kets an appropriate distance to advance the paper one line space. A carriage drive control signal is the second PCC output; it is provided on line 36 to carriage motor amplifier 38. The carriage motor amplifier, in turn, provides the drive signal to carriage motor 26A, for controlling the motion of the carriage. Tlle carriage motor is also equipped with an incremental shaft position encoder ~6B for providing an output signal on line 42, to the PCC, representative of the change in angular position of the motor shaft. Since the rotational position of the carriagc motor shaft directly corresponds to the positioll of tlle carriage and, in particular, the print head, the signal on line 42 represents the position and position changes of the print head.
T!le third output of the PCC is a print head control signal provided on line 44 to the print head driver 46. The print head driver 46, responsive to signals providcd on line 44, provides an actuation sigllal to appropriate solenoids in the print head 20 to cause the associated dots to he printed at a desired location.
For use with a computer, or other similar source of data to be printed, the printer is provided with an input interface 48. This interface provides appropriate input buffering for capturing the data to be printed.
A table of character-to-do~ patterns stored in RO~ 56 of sequential control-ler 50 is used to convert the character information provided by the input data source into dot matrix information representing each character to be printed. By varying the character-to-dot pattern mapping, different fonts (such as different typefaces or typefaces for different alphabets - e.g., Cyrillic, Creek, etc.) may be printed. Characters having the same basic font ~i.e., typeface~ may be spread or compressed in the horizontal dimen-sion by altering the spaces between dots and the blank spaces between char-acters, thereby altering the pitch of the characters. And, since the map-ping must be done on a character-by-character basis, it is possible to cllange character si2e and font on the same basis. There is no provision for changing the size of printed characters in the vertical dimension if the number of vertical print rod positions wou:Ld thereby be exceeded, but various character widths can be accommodated and vertically compressed or stretche~ characters can be generated using less than, or at mos~, the ~ull number of vertically available print rod positions.
A sequential controller 50 for generating PCC control or command signals and provided character-to-dot mapping comprises a processor unit 52, random access memory (RAM) 54 and a read only memory (ROM) 5G. Interface 48, processor 52, RAM 54, RO~1 56 and PCC 30 are all interconnected via a bus or communication link 58.
Character information to be printed is fed from the input inter-face ~18, via bus 58, to 1~M 54, where it is temporarily stored. ROM 56 controls thc operation of t1le processor 52 and the data paths be~ween the ~133~

various elements connected to the bus 58. Using the character-dot mapping provided by the ROM, processor 52 provides instructions to PCC 30 regarding the dot pattern to be printed. In turn, PCC 30 determines the appropriate times, as a function of carriage position, for activating the print head driver to fire the print head solenoids.
hile various components may be used to fabricate the box de-scribed above, it is particularly noted that the models 8080A and 8085 microprocessors manufactured by Intel Corporation have been found suitable for the processor 52. Accordingly, the particular embodiment disclosed in detail herein is described with reference to the use of the aforesaid Model 8080A. The printer control circuit 30 could also be implemented in a number of ways. ~lowever, in order to minimize cost and number of inter-; connections, we have implemented it as a single large scale integrated circuit using metal oxide semiconductor technology, l~ith a design architec ture suitable for control by a microprocessor.
The printer control circuit is capable of operating in two modes for generating characters of different pitches. The first mode permits the use of a conventional seve~ wire print head containing seven print rods arranged in a single vertical column. The second mode is unique to this invention and permits use of two, horizontally displaced columns of print ; rods. The specific illustration of this mode, described below, shows the use of an eleven wire print head having a first vertical column of six print rods and a second vertical column of five print rods. The embodiment illustrated further shows the rod positions in the second row vertically spaced from tlle rod positions in the first row so as to achieve a vertical intcrleaving of positions and permit the printed dots formed by vertically adjaccnt rods in the two rows to overlap. Figure 2 illustrates the print rod positions in a seven wire head and Figure 3 illustrates the print rod , ~133~l~4 positions in an eleven wire head.
A functional block diagram for the printer control circuit ~PCC) 30 is shown in Figure 4, to which reference will now be made. Character data to be printed and supervisory commands to the PCC are received via the bus 5S which enables the PCC to communicate with the sequential controller and input interface, as required. Information received by the PCC upon the bus 58 is captured by an input buffer 62. The input buffer 62 feeds this information to the various functional elements of the PCC via a parallel bus 64. In the drawing, bus 64 is indicated separately at the appropriate functional blocks (by an arrow comprising two spaced, short parallel lines terminated by an arrowhead at one end and broken off at the ~pposite end);
it should be understood that the bus interconnects all of the indicated blocks even though the full interconnection is not illustrated.
One of the elements connected to bus 64 is a command decoder 66.
This command decoder is also connected via lines 6S to the various other elements of the PCC; such connections are not explicitly shol~n, ho~1ever, in order to maintain clarity in the drawing. Command decoder 66 detects and decodes the commands provided by the se~uential controller and through the use of appropriate steering logic activates, d~activates and controls the v.
; 20 functional blocks shown in Figure 4 to achieve the operation directed by the commands.
As briefly stated above, the function of the PCC is to supply appropriate signals to drive the line feed amplifier 34, carriage motor amplifier 3S and print head driver 46. The dominant function of the PCC
is to implement the required control of the print head driver 46 for prin~-ing, witll variable pitch and performing the "duc~ shootin~" operation involved in printing with a variable carriage speed. The desired carriage speed is a function of carriage position in the line, with the objective _ g _ ~3~4~

being to maintain maximum throughput of characters with the limits imposed by available acceleration, start/stop dynamics of the print head, and sole-noid actuation rates lYhich avoid excessive heating. The processor 52 determines the appropriate carriage speed and the PCC actuates the print head driver accordingly. Thus, the basic information required by the pro-cessor 52 is the position and velocity of the print head. This information is obtained from encoder 26B which is driven ~y the carriage motor 26A.
Encoder 26B is an incremental two-channel encoder which provides a digital output. A short up-down position counter 72 receives the output of the ` :
incremental encoder 26B via an encoder signal processor 74 which suitably =~ conditions and formats the output of the encoder. Thus, the position ;~ counter 72 keeps track of the relative position of the print head, modulo its radix. The output of position counter 72 is supplied to the output . ~
-~ buffer 78 on demand~ and, from the output buffer, to bus 58 and processor 52. Processor 52 periodlcally examines t}lé position information provided by the position counter 72 and calculates print head velocity from the change in position during the inter-sample time. In the particular embodiment heretofore implemented, the processor 5~ samples the output of the position counter approximately once every 2.5 ms. The change in position observed at each sample time is summed in a position register (i.e., address loca-tion) in RA~I 54. A~solute position information is obtained by initiali-zing the position register to a kno~Yn value ~Yhen the carriage is forced against a fixed stop.
The initialization procedure of the printer requires that the carriage motor be commanded to drive the carriage in the direction of the stop. IYhen the processor detects no change in the position counter's output during a predetermineclllumber of sample times in wllicil the carriage is ~eing commandc?d to move to~Yard tlle stop, it "knolYs" that the carriage .

~33~

has already reached the stop; the position register is then initialized.
All relative motion can then be compared against this initial position, to be transformed to absolute position.
l~'hile various encoder designs well suited to this application will be apparent to those skilled in the art, this system has been successfully implemented Wit.71 an encoder of the type which uses two tracks to provide a pair of (phase) quadrature output signals; these encoder signals are supplied to the PCC encoder signal processor (ESP) 74 via lines ~2A and 42B (which are collectively shown as line 42 in Figure l). Encoder signal processor 74 is used to give "clean" position decoding and insure that only valid state changes on lines 42A and 42B are interpreted by the PCC as indicative of carriage motion. ESP 74 may, for example, comprise a so-called "majority vote" circuit which uses a high sampling rate to distinguish between valid and invalid state changes in the encoder's quadrature output signals.
At this point it would be helpful to the further understanding of the operation of the PCC to digress brief]y for an explanation of character "cell" structure. All printing of characters by this system takes place within programmable character cells whose fundamental units are encoder "transitions" (i.e., logic state changes in the encoder quadrature output signals). As successfully implemented, for example, each encoder may correspond to print head or carriage motion of l/660 o~ an inch. A char-actcr cell consists of two sections, the first ~from the left) is the increment field in which dots may be printed; the second is the inter-character SpclCC. lYithin the increme1lt field, two or more incremcnts are equally spaced. Their spacing is a programmable parameter called "tra1lsitionS per increme71t," TPI. TPI is often also referred to as the radix of the character and is a f~mction of character width or pitch. The number of increments per character, IPC, is also programmable. Since an " ,. .

3~

increment occurs at both the beginning and end of the increment field, the width of the increment field ~in transitions) is given by TPI x (IPC - 1).
The inter-character space has no fine structure and is direc~ly programmed as transitions per space, TPS. As the name implies, dot printing is inhib-ited (i.e., no increments occur) in the inter-character space~ A character cell's width is equal to the sum of the widths of the increment field and ~ the inter-character space, so that total width is given by:
- WIDTH = TPI x (IPC - 1) + TPS.
The diagram below illustrates a single cell of width 40, IPC = 13, TPI = 3, and TPS = 4:
I..I..I..I..I..I..I..I..I..I..I..I..Isss where I represents an increment, s represents a space, and the "." symbol represents any other transition.
E&ch of the parameters mentioned above - TPI, IPC and TPS - can be programmed into the PCC from the processor 52 to select a particular font compression or pitch. While printing, the PCC counts transitions and incre-ments so that it knows when a character boundary, increment or space is occurring.
When the printing of a character is begun, tl-e transition counter uses the value of TPI as a radix. Every time the transition counter overflows~
an increment is generated which, among other things, causes the increment counter to change its count. When the increment counter reaches a count equal -to IPC, the radix of the transition counter is changed to TPS, so that the proper inter-character space is generated. Whell the next increment is reccivcd, the increment counter goes to a value less than IPC ~either 0 or I~C - 1, depending on direction). At this time a character boundary signal is gener~tccl and thc radix of the increment counter again becomes TPI.
It can be seen that thc transitions per space could be any non-- 12 _ zero nunlber. i~owever, the fact that the timers operate on every increment ma~es it desirable for TPC to be at least equal to the value of TPI. The counters involved can be initialized by a command from the sequential controller 50. Table 1, below lists several character pitches and the par-ameters that generate them.

CPI TPC IPC TPI TPS

13.2 50 10 5 5 16.5 40 10 4 4 6 110 11 10 lO
6.6 100 lO 10 10 ~.~5 80 lO 8 8 IYhere CPI means characters per inch and TPC means transitions per character (i.e., pitch). The first four rows represent normal pitches and the second four rows represent double width pitches.
Encoder signal processor 74 provides three output signals derived from the quadrature signals received from the shaft encoder. The first of tllese signals is a direction signal, on line 82, indicative of the direction of carriage motion. The direction signal is provided to position counter 72 in order to cause it to either count up or down, as appropriate. Carriage motion in a first direction will cause the position counter to count up and carriage rnotion in the other direction will cause the positiol- counter to count down. A second output of the ~SP, provided on line 84, is an encoder transition pulse signal. The latter signal comprises a pulse each time one of the two quadrature encoder signals on lines 42A and 42B changes state, : .. - ,.

3~

indicating that the carriage has moved ore transition distance from its prior position. The pulses in the er:coder transition pulse sigral on line 84 are supplied to and counted ~y tlle position co~ter 7~ for keeping track of changes in carriage positionO Lines 82 and 8a are also connected to trar.sition and incremerlt counter (T~IC) 85 and line 82 is further connected to a pulse stretcher 88~ The third output signal from the ESP 74 is a speed transition pulse sigral on line 92; this signal cornprises the secord ir.put signal to the pulse stretcher 88.
To implement the above-described performance capabilities, print commards must be given to tke solenoids at varying (i.e~, not fixed) positions relative tc the "target" location at which printing is desired;
the solenoid act~lation (i.e., I'firing") poi~;itions are functionally rel~ted to print head velocity, since the distance travelled b~ the print wires is fi~ed. Sequential controller 50 computes the rec~ired solenoid firirg position and PCC 30 generates the actual signals which control solenoid actuation in accordance with the calculations of the sequertial controller.
The transition and increment co~mter 8~ is the starting point within the PCC
for the generation of the necessary cortrol signals, T~IC 86, as it~ râme ilr.plies, comprises a pair of counter~s for respectively trackirlg transitions and increments. Sigral inpllts for the T~IC 86 are the direction signal on ]ire 82 and tke ercoder trarsition pulse signal on line 84. Since tke carriage is mo~ing while the printing operation takes p]ace, the print rods must be "fired" from the moving print head before tbe carriage reaches tl;e impact location. Nomirally, tlle mean ~alue of this lead "time" is knowr for an average carriage speed, one of the system desigl parameters. However~
carriage speed is Yariable in this invcrition arld other, non-average speeds il] require a greater or sra:ller lead (i.e., positional displacement) betwecr ~rint wile firing ard impact, dependiLg UpOII ~!hether the speed is ~3~

belol~ or abo~e a~erage. Translating the le2d into position urits, there is a r.ominally Icr;own displaeemert (in trarsitions) bet~reen the impact positior on the paper and the position of the print head when the solenoids are actuated. ~ppropriate eircuitry is pro~i.ded for reading the "posi.tion"
indiea.ted by the T~IC and triggerirg the firing of t.he solenoids ~Ihen. the position of the carriage indicated b~ the T~IC is the correct distanee from the target position on the paper~ for th.e tken eurrert earriage veloeity.
Tbus, a preselected transition Cour!t (e.g., a eount equal to the transition counter radi~3 in the T~IC comprises 2 trigger signal for the prirtirg solenoic,s. The solenoids are a,etuated in response to the appearanee of this eount. Precessor 52 supplies a transition add/subtract eo~ar..d to tke IE~IC
via bus 64 to cause tke transition court stored therein to be either inerea-sed or decreasedO This creates a false or ~seudo-trarsition reading in the T~IC; this reading may be used to actuate t~e printing solenoids by- forcing the "triggering" CO~ t to appear at the posi.tion suggesteo by pri.nt head ~eloeity. Thus, the transiti.on eo~t indieated in tlle T~IC ta is shifted from the eount registered in position courter ~2 by an amount representing a flight time eompensation count. That is, this differenee represents the dis~lacement~ in transitions, be~een the point of soleroid aetuation and the point of impcet.
The transition eo~mter portion of the T~IC 86 comprises a eounter h.aving tlvo progrannnable radices eorresponding to the TPI and TPS parametersO
TIle increment co-~ter portion of the T~IC comprises a coun.ter having a single progranuIlable radi~ correspondir.g to the parameter IPC. The radiees are supplied from the sequential eor.troller 5~ via bus ~4.
The transi.tion ancl incremen.t eown-ter 86 provides three output signals~ TI-e first of these is a eharacter boundar~- sigi~al pro~-ided on line 9~ to the prir.t enable eire~it (PL,(:) 96. The eharacter boundar;r ~L~L33~

signal merel~- defers the execution of tlle print-start comr.1and lxltil the print ~Yire input position enters the cell of the ch.aracter to be pri.nted.
The second signal provided by the T~IC, on ]ine 98, is a net transition s:ignal. Line 9~ is connected to ircremer.t skift register lC0 for supplying the net transition signal t~.ereto. The tbird output si.gnal pro~idecl by the T~IC, on line 102, i.s a primar-T increr~!ent signalO Tbe prirl~.a.ry increment signal is supplied to ir.crement shift register lC0 and to incremer.t steering circuit 104.
The f~mctior of print en~hle circuit 96 i5 to provide internal PCC control (i.e., enablement and disablement) of the elemcnts used to trigger the solenoids. Basically, the prirt enable circuit is a finite state r,.achine the operation of ~!hlc~: is defined in Fig~xes 5 and 6. Remain-ing briefly with Figure 4, ho~ever, it l~ill be seer that the PEC 96 l~as three signal inpllts and or.e signal output. The ~irst signal in~ut is the ckaracter boundary signal on line 94. The secor.~d sigral input is a printing done signal on line lC~ from ~lffer monitor circuit 108. Seciuential ~ controller 50 provides the tkird input sigr.al, a print start signal, via : b~ls 64. The out.put of PEC' 96 is a print er.able signal on line 112. The print er~ble signal is supplied to incre~ellt shift register lOn and to ircrcment steerirg circuit. 104c The pri.rt enable signal l~ill assunle c first logic state ~hen prin.ting is to be enabled and will ass~le a second logic state wken printing is to be disabled. ReferIing no~ to Figure 5, there is sho~n a state transition diagram illustrati.ng the norr.lal operati.onal sequence of the print enable circuit. The P~C ~.âS three states, labeled respect.ively, 11.4, 1].5, ancl llG. I'rintir.g is disabled in states 114 and 115; only in st~ate in ].lG is printing enabled. ~ssumir,g initially that the PEC is in statc 11~, as it ~ould be after prirting has preYiously been terr,inated or at a ti~le followirg initiali3ation but prior to the start of any printir.g, ~33~

a print start con~and from the sequence contrcller received via bus 64, willcause a charlge to state 115, at this point tl~e PEC assumes contrcl over the printing operation. ~rce the PEC is in state 115~ it monitors the character bo~ldary signal on line 94; when that signal irdicates that the leading edge of the ckaracter cell boundary has beer crossed, the PEC advances to its third state, 116, and provides the print enable signal on line 112 in the state which permits printing. The printing operation will continue until buffer monitor circuit 108 provides a printing done signal on line 106 to indicate tkat there is no more infor~ation to be printed Upon receipt o the printing done signal, the PEC will return to state 114 and disable printing by changing the s~ate of ~he print enable signal on lir.~e 112.
Printing will not reswne ur.til another print start com~.and is received from the sequence controller. Thus, the state 114 ma3 be called an idle state, state 115 corresporlds to a state of waiting for a character cell bo~dal~
and state 11~ corresponds to the active printirg state. The state transition table sho~n in Fi~ure 6 proYides anoth.er description of the PEC, asst~ling a particular implementation in which the printing disabled condition corres-pcnds to a logical "0" prir.t enable si.gnal and a logical "1" print er~ble signal perm~ts prirting to be perforr.led~ Corresponding assumptiolls are made ~;ith respect to the logic values of the PEC inp~lt signals. The symbol "X"
is used in Figure 6 to irdicate, with respect to input, that either logic level may exist and, with respect to states, that any state satifies the : condition.
It is noted that in the a~ovc description the term "character boundar~-" corresponds to the ir.cremellt which ma~es the incremeLIt counter in thc ~&IC e.Yit the interch2racter space. m e term '!increment" refers to tlat transition whicll ma};es the transition courlter in tlle ~IC overfl.o-/; that iS7 colm~ up from n^.axin:~m~ to ~ero or down from ~ero to maximum. And :~13~

"intercharacter sFace" is that interval during which the incremes)t countervallle is equal to its radic, (i.eO, its ma~-imum v,alue).
Two dot buffer ard timer circuits, 120A and l OB are provided.
llhen 2 t~io-column (e.g., eleven-wire~ print head is employed, one of the dot ~uffer and timers is associated with a first of the col~ s and the other dot buffer and timer is associated with the otller of the columns.
These might correspond, respectively~ to five ar.d six dot columns, respectively. When only one col~l~n of print rods is provided in the print head, such as for a seven-wire head, ~oth dot buffer and timer circuits are operated in parallel. Ihe dot buffer 2nd timer circuits recei~e chzracter dot data from the processor and fire the corresponding print solenoids at appropriate times. Each dot buffer and timer circuit includes a plurality of registers, a register controller, an output buffer and a timer. The registers are preferable arranged as a first-in~first-out ~or fifo) stack buffer. One of the registers in tlie stack is an in~ut règister ~/hich is lDaded by the processor; another register comprises an output register. Data propagates throu~h each register, beginnir.g with the input register, until it eventually reaches the final, output register. The output of 1-he output register is gated to tke print head a~.plifiers at a precise point in the heac' travel and is held for a precise anlount of time7 as controlled ~r a timer in the dot buffer and timer circuit. Tbe pllZ`pOSe of the dot ~uffer ,~rd timer circuits is to allow th.e processor 52 to suppl5~ dot data for the print head asynchronously witk respect to the time that such data is needecl for actuation of the solenc)ids~ The cortroller iD the dot buf`fer 2nd timer circl,its collsists of a memo~ which tracks the presence, in eaell register, of clata to be printed together ~-itl1 logic which causes all data to ad~ance

2~ fclr as possible thirough the fifo staclc Ihe controller detects when the ti~er l-as ce2sed act~latjng tle ol~tput b~ffer and thereupon ,adv2nces the data ~33~

ir the registers. This creates ;pace at the input of the stac~. ~ buffer status signal is supplied on lin.e; 122A a.nd 122B to buffer monitor circuit 108. When a predetermined number of spaces exist in the fifo stack(s), as indicated b~r the buffer stack signa.ls to tke buffer monitor, the buffer mol~tor generates a dot data request sigr.al to th.e processor, on line 124.
Ike processor tken stlpplies more data into the dot buffer input register.
When both buffer staclcs are completel~r empt~-, the buffer monitor generates a printing done signal on line 106, to reset the PEC 9~
Th.e timer in each of the dot buffer ard timer circuits is used to : 10 cause th.e dot data to be presented to the printing element (i.e., solenoid) for a progran~nable amount of tin.e determined by the characteristics of the ele~er,t being controlled. The timer consists of ~ binar~ counter ~rhich counts a programmable nun~ber of clock cJ-cles~ It starts counting on cor.~and of the increm.ent steerirg circuit 104, urlless alread~ running~ ~ach time the timeI halts, it supplies a signal to the stack cont;roller to allow r.ew data to be presented to the o~tput bufferr The output buffer in the dot buffer and timer circ~it allows the output of` the stack to propagate to the print head ~henever the timer is rur~ing~
Each register in the fifo stack in the dot buffer and timer circvits 12~A and 120B contains storage sufficient for or.e verti.cal colu~r.D of dots.
In the F~rticular imple~entation sho~rQ in the dra-~ings and discussed ~.erein, ore of the d.ot buffers contains five-bit registers and the other contains six-bit registers, thus pro~iding for the contro]. of a ma~imum of eleven printing solenoids in the pri.nt head. It is readily possible, of course, if onl~ a si.ngle colwnn prirt head is to be ernployed, to use but one dot buffer and ti~,cr circuit having the same number of bits per register as the n~unber of print ~ires. The increment s}:if~ register 1~0 ~nd i.ncrenlent steering ~33~

circuit 104 also become unnecessary in the latter aFplication, as the single dot buffer and timer circuit is directly controlla.~le by the pri~ar~
increment signal, explained below.
With a t~to colu~n printing head, solenoid control is con~ icated by the fact that the t~!o col~arns of wires are physically displaced in the horison~al directionO Therefore, in order to ~rint a single vertical lire of dots, the trailing set (i.eO, column) of ~!ires must be tïred a number of transitions later than the leading set - the number of tran.sitions corres~
por.ding to the displa.cement bet~een the two columns of ~ires, measured in transitions. Tkus, the t~10 col~lmns of wires are pro~ided with t~o different firing control signals~ These are referred to as primary and secondar~y increnler.t signals. The primary increment signal fires the leadin.g set of wires and the secondary increment sigr..al fires the trailing set of ~!ires.
Wben printing, the secondary incremen.t repeats the pri.mary incremeIIt pattern, only delayed by the necessary number of trarsitionsO It should further be noted that printing may be done either left to right or right to left. In one direction, one of the colun^ns will ~e the leadin~ set and t~'e other ~
trail; ~ut the situatioL ~rill be reversed in the opposite direction, witk the -other column bei.ng the leadi1~g set The primary incremel~t signal is generæted by thc. tra~lsiti.on and increment cou11ter 86 and is provided on ]ine 102 to the incrcment shift register lO0 ar1d increment steering circuit lC4. Incre111e1lt shift register lO0 perfor~s the transition delay function for generatirlg the secondary incren.ent signal therefron;. The secondary incren.e11t signal is ~rovided on line 126 to ircrement steeri.ng circ1it 104. Net transition signal 98 is essentially used as a clocl~irlg signal for i1~crement sllift registel lnC.
Wi?CIl tlle pri.nter iS Opel`atCd in the t~ro c.ol11nl1 pri.r.t head mode, thc i.ncremer.t steering circuit directs the pri.ma.ry incre1nent sigral to the ~33~L4iL4 dot buffer and timer for the lea.dirg set of print wires and the secnrdar~
increment signal to the dot buffer cand timer for the trailing set of print wires. When the printer is operated i.n tl:e single collmin print wire mocle, increment steerirg circuit 104 clirects the primary incremer.t signal to both dot buffer and timer circuits, as the secordal~J i.ncrement signal is r.ot IIS ed.
The PCC also drives the czrriage amplifier in the carriage servomotor system, for controlling carriage motor speed. Carriage motor speed control is accomplished b~r a ser~o s~-stem. Processor 52 determines the ma~imum possible carriage speed based upon the higL~est solenoid actuatior rate at which the print solenoids will operate properly and wi~ich may be maintained witllout causing overheating. It provides a speed com~arld sigral via bus 64 to bit rate m~lltip~ier (E~l) 132~ The BRM is of con~7ertioral desigr. and provides two output signals. Tbe first of these is a command SigI1 signal, on line 134, to ir.dicate the direction in WlliC~. the motor is : beir.g col~landed to operate; the second of the BRM output sigra]s is a comLland pulse signal on line 136, ~hich provides the actnal motor ~-elocity information. The speed transition pu].se sigral on line 92 and the direction ~i.gna]. on line 82 cor~ri~e corresFondirlg signals indicati~-e of the actual 20 IllO iOIl of the carriage motor~ These L~.tter ~o signals are received by pulse stretcher 88 whic~l, i,n turn, supplies t.he feedback signals required in the Sel~Vo loopO ~ feedback sign signal is provided on lire 138 and a feedbacl; pulse signal is provi.ded on line 139~ T~e speed steerlng circuit 142 connccts lines 136 and 139 to the appropriate output pirs 144 and 146 in accordance with the associated sign signals carrled on lines 134 and 138 rcspectivel~. These pul~e trains are rcceived ~y the C~rriage l~mplifier 38 which integrates these ptls~ signals to obtain their avere.ge ~c~l~les. Tke C..rric.ge A~.plifier is the "error" amplif'ieJ of the carri.age motor servo; it ~33~

determires the difference bet~een the commanded speed and directior and theactual speed ard direction of the motor ard provides a drive si~nal to tbe carriage motor to drive the carriage motor toward the commarlded speed.
The comn!and given to the servo n2echanism by the B~ ccnsists of a stream of narro~ pulses. The speed transition pulse signal on line 92 containing the motor speed information used for feedback, have the same .-idth as the BRM cor~arld pulses; ho~ever, there are se~eral e.g., eight com~.and p~lses for every speed transition pulse provided on ~ines 920 The servo mechanism i5 designed, typically~ to respor.d to the average value of the corn~ar,d pl~lse and feedback pulse signals; thus, it becom.es necessary to "stretch" the speed transition pulses a con~ensurate anol~t. This is done by prod~cing a feedback pulse on line 139, for every speed transition pulse on line 92, ~hich is eight tines as lon~ thereasO For e~ample, if the com~ard pulses are each 6.5 ms in width, the feedback pulses are approxi-n~ately 52 ms in width.
Ir Fig~lres 7 - 12, there is a further breakdo~n, still on the -~ bloc}; diagram level, of some rnore of the blocks sho~n in Figure 4. Figures 7 - 1~ provide ~ breakdown of the enGoder sigral processor 74~ An overall block diagram of the encoder signal proce~s~r is shown in ~igure 7. The purpose of the encoder signal processor is to con~rert quadrat~lre encoded s~uarewave positior signals, recei~ed on lines 42A and 42B from the ~!0 encoder tracks, into transition event and direction signals that can be counted in up/do~m counters and nsed to trigger transition-related events.
The encod~r signal processor ~vhich performs these functions consists of a direction detector 202 and, for each of the two channels of encoder sigral inpllt, a signal filter, 204l~ or 204D, and an associated trarsition ~etector 206~ and 206B. The outputs of the transition detectors on lines 208A and 2Q8B, respcctivel~-5 are combined together by OR gate 210 to provide t~.e 31 ~33~

encoded trarlsition pulse signal which is sllpplied to the position couIIter 72 and I~IC 86 on line 84. The speed -transition pulse signal is provided on ~ine 92 by ~MD gate 212 wl~ch receives as i.ts inputs the transition detector output signal on line 2~8~ from one of the channels and the input of the transi.tion detector 2C6B of the other channel, on line 214. Direction detector 202 receives the outputs of the two signal filters on lines 214 and 216 to provide tke direc~ion signal on line 182~ It wil~ thus be seen that the er.coder trarsition pulse signal provides a pulse each time there is a state transition in either of the two signals provided by the encoder, and that the speed transition pulse signal provides a pulse when there is a transition on one of the channels while the other cha~nel is in the "1"
state. In steady state operation, a speed transition pulse will appear on line 92 every fourth transition. In the specific implementation disculssed hereir., the widtk of these pulse signals corresponds to one clock period of the system clock.
The ot~tput of the direction c1etector is, by contrast, a level whicll represents the sign (+ or - ) of the transition and identifies which : of the two qlladrature signals is ahead of the other in phaseO

e purpose of signal filters 204A and 2Q4B is to remove short duration noise pulses from the signals on line 42A and 42B so that they do r.ot cause false outputs and false responses by the transition detectors and direction detectorO It has been found particularly desirab].e to implement the sig~al filters as majority vote circ~ts which compare two new samples of thcir input witll the previous output The outputs of the signal filters are allowed to change sta~e only if the two new samples agrce with each otherO
For further rcliabili~y, an even greater r.~nber of samples c.ou].d be tlsed.

The t~o samples of the input of the sirrnal filter are taken at a normal system c]ocl; rate but approximatel~r 180 ollt of phase with eacll other, 'P ~33 ~

thereby yielding a net sampling rate which is twice the norma] clock rate.

; An appropriate bloc~ diagran) for each of the signal filter elements 2Q4A, 204B is shown in Figure 8. While the example is described in terms of signal filter 204A, it is equally applicakle to signal filter 204n, of course. Four corventional sample-and-hold (S ~ H) circuits and a majority vote circuit are employed in each signal filter. The sample-and hold-circuit 222 provides the output of the signal filter which represents the signal provided by the majority vote circuit 224 at sampling time Tl.
The two signal samples are taken at times T2 and T3, respectively, by S ~ H
circuits 226 and 228. The fourth sample and hold circuit 232, samples the prior output which is present on lire 216 at time T2, as well. As explained above, sample and times T2 and T3 are displaced from each other by approximately 180 b~t occur at the same rate, beir.g derived from the same clock. Majority vote circuit 224 reads the outputs of S ~ H circuits 226, 228 and 232 appearing on lines 227, 229, and 231, respectively, and provides an output on line 225 corresponding to the state of the majority of its irputs. The signal input on line 42A is preferably synchrollized so as to be stable at the T2 and T3 sample times. A clocked D-type flip-flop, Sch~itt trigger or similar device (not shown) may be used for this purpose.
Tlle purpose of the transition detectors 206A and 206~ is to producc an even~ pulse each time their input signals change state. This is easily accomplished with the arrangement shown in Figure 9. As shown therein, the transition detector 206~, for example, cor~sists of a delay element 236 and an exclusive - OR gate 238. The output of the delay element, on line 237 and tle input, on line 216, provide two irputs of the excl-lsive OR gate 238. This prod~ces at the output of the exclusive OR gate, on line 208A, a stream of ~u]ses each of ~hose widtll is equal to the delay time of the delay element. The delay time of onc clock period of the system clock is 1~33~L44 satisfactory for this purpose. Thus, delay element 236 is showr. as also receiving the system clock on lire 239.
The output of the direction detector 202 in the encoder signal processor accompanies each of the transition event signals (i.eO, the speed transition pulse signal and the encoder transition pulse signal) to their des-tinations. The purpose of the direction detector is to decode the quadrature encoded direction inform~tion in the t~-o input signals on lines 42A and 42B, producing an output signal ~hose states correspond to the directions associated with the transition event pulses. One satisfactory e~emplary implementation of the direction detector is shown in Figure 10.
~s illustrated therein, the direction detector 202 consists of a delay element 242 and then e~clusive-OR gate 244. One of the ir.puts, e.g. the one on line 216, is delayed by the delay element 242 and the delayed signal is pro~-ided on line 243 to or.e of the ir.puts of the exclusive-OR gate 244. The other input, e.g. the one on line 14, is supplied directly to tke other input of the e~clusive-OR gate. The output on line 82, if observed orly during the periods ~lhen the encoder transition event signal is asserted, ~
(at those times) be in one state ~Yhen the transition was in one direction and then the other state when the transition was in the op~osite direction.
Delay element 242~ like delay element 236 provides a single clock period delay and receives a system clock as an input on line 246. It will be observed tha-t if the clocking signals on lines 246 and 239 are the same, the outputs of the delay elements 236 and 242 are the same. Hence, a sin~le delay elemcnt may be shared between the direction detector and or.e of the transition detectors.
~cfcrring to FiOure 11, there is shown a b~ock diagram breal~do~n of the T~IC 86. Tl-e IranSitiOn and increment cour.ter 86 has three component clcmcLts: transition adder 252, transition counter 254 and increment counter 256. The transition courter and increment counter h~ve already been alluded to above. The transition adder 52 basically operates under the control of the sequential cor.troller ~0 to provide the required offset in the court maintained in the transition counter from the court maintaired in the position counter (i.e., the flight time compensation count) so as to cause the transition counter to produce the solenoid-actuating count at the appropriate location. When a t~ro-column print head is used, the transition adder also "moves" the prinary increment ~hen the direction of printing changes, to accourt for the displacement between the two col~!mns of print wires. Additionally, the transition adder serves to eliminate single trars itions having opposite signs (i.e., direction) from the immediately preceding and following transitions, such as are produced by the operation of the transition add/subtract circuit. Otl;er such signal transitions should not and would not occur but for the presence of "noise" and sampling inaccuracies.
Included within the transition adder 252 is a net trar.sition generator 252A which actually provides the t~o trarsition adder output si~nals, the net transition signal (on line 98) and the net direction signal (on line 253). In addition to eliminating single transitions of opposite sign, the net transition generator 252A operates under the comn!and of the sequential controller 50 to either add transitions on line 98 ~ihich are in additioll to those pro-vided on line 84, or prevents pulses on line 84 from reaching line 98, in order to force the transition counter 254 to FroFerly reflect the positional correction required for actuatinO the solenoids at the proper time. The net direction si~nal on line 253 is simply the direction signal whicll corresponds to the net trarsition signal on line ~8; it is the dircction sigllal on line 82 as modified by thc operation of the net transi-tion generator 252~ in addirg, subtracting or eliminating pulses~
Transition counter 254 comprises a progranmable radi~ counter :~IL3:3~.~

having two progrc~rmable radices, correspondir.g to TPI and TPS, ~hich are set by ~he sequential controller 50 via the bus 64. Trarlsition cour.l.ter 254 is an llp/do~.~r. counter ~l^.i.ch receives co~lntir:g direction control from the net direction signal on line 253 and which cour!ts the pulses in the net transition signal on line 98. The OUtpllt of the up/dowr cour.ter is decoded to provide as the output of the transition counter a signal, termed tke primar~r incremer.t sigral, on line lQ2 when the transition court of the up/down counter corresponds to tke position at which the printing solenoicls should be actuatedO Increment counter 256 recei~es the primary increment 10 signal and the net direction signal as inputs and provides the character boundary signal as an output, on line 94. The incre~nent cour:ter is a : simple, programmable radi~Y counter l~hose radix~ corresponding to the parameter IPC, i.s set by the sequential controller via the bus.
The third block sho-~n on Figure 4 to be brokerl dol~Tr for further explanation of its structure is the pulse stretcher 88, shown in Figure 12 The pulse stretcher comprises two components: speed transition processor (STP) 262 and pulse generator 264. The speed transition processor receives the direction signal on line 82 and the speed transition signal on line 92 as well as a 19.2 IcH~ pulse on line 266, its outputs are the feedback sign signal on line 138 and a feedkack per.dirg signal on line 268. The feedback pending signal comprises ore of the inputs to p~l]se generator 264, The 19.2 kH~ pulse signal on line 266 is the otker irput to the pulse generator, and the feedback pulse signal on line 139 is i.ts output. The STP contains a one-bit mem.ory of feedbaclc sign and or.e-bit memory of feed~ack pending.
If a s~eed trarsition occurs ~ith a clirection (i.e., sign) l~hich matches the prcvionsly established feedbac];; si.gn, the feedkack pellding sitnal i.s then asserted. Tl~c fccdback pending signal is deasserted imn~tdiately after tl)c ne.~t occurence of the 19.2 kH~ pulse. If the direction of the speed - .

~33~

transition pulse cloes not match the feedbclck sign, the feedback sign is changed, but no feedback per~ci.ng signal is gencrated. Tbe p~llse generator 2~4 samples the fee~back pending signal on line ~68 each time a l9. kH~
pulse occurs and asserts a feedback pulse on lire l39 approp~-ic!tely, thus prodl.ci.llg pulses ~pproximateI5~ 52 microsecorcls ~ii.de, eight times the widtl of th.e con~mar.d pulses on lire l3~ from the bit rate multiplier 132.
As stated above, the sequential control.ler 50 is the conln!ar.ldir,~
agent, or "brain," drl~ing the PCC 30. A~ong otl.er things, the seqlential ~ contre].ler deterrni.Les flight time compensation COUIlt wkich is necessary and ;; lO provides traJlsitior. add~/subject commalds to the transi.tion adder to cause the net transition gerera.tor to feed a lesser or grea.ter n~beI cf puls~s to ~he ~ransition coul~ter, to produce the eorreet fligl~t ti~le comper.satlor.
count. The sequential controllel drives the carria~e riotor to tbe higkest availa~le speed consistent rith satisfactor~ accelc:ratior and sol.eroid epelation.. The upper lirr.it on carriage motor speed is parti.ally a f~r.ction of the dot del!Sit~ of ckalacters to be printed ~ver ~ preselecte~ tilre interval, so that tlle soleroi~ actu2tior. rate does not exceed errlpilica.lly deli~ d l,cnnds for sati.sfacto~r operation.~ Accordi.r.gly, the ca.rri.age speed is ~reater in ~lark regions, as the solenoid actuation. rate does n~t imFose a linit at all in those areas.
In the present implementation, the system elock speed of 2~z has been selected because it allows operation of the model 8080A micro~
processor at nearly its maximum speed and when divided by 13, yieldin~
153.6 kH3, provide the 6.5 microsecond sampling interval used by the encoder signal processor 74. It also provides the elock signal needed by input intcrface 48 for serial data comnlunication; in partieular, it permits ; the use of many standard signaling ratcs such as 9600 bits per seeond and deriv:itives thcreof. The sarne 153.6 ~}l3 signal drives BRM l32~ As a .

, ~L33~

byproduct, the BR~I provides a signal at 1/128 this frequency which when divided by 3, provides the 2.5 ms sampling interval used by sequential ; controller 50 to process the readings of position counter 72.
~ hile the method employed by the sequential controller for flight time compensation ~ay be generalized to the extent illustrated in Figure 13, the flight time compensation count needed by a particular embodiment of this invention is a function of carriage velocity; if carriage acceleration is not kept low enough, the compensation function must depend on that parameter too, of course. The compensation available is limited by the velocity range resolved by minimally incrementing or decrementing the flight time compen-sation count. Since the compensation required is dependent on the mechanical parameters of the printer (i.e., the goal is to compensate for the finite flight time of print wires and other dynamically induced positional offsets), the actual compensation function needed is characteristic of the particular printer. The appropriate printer parameters may be obtained either by modeling or by empirical evaluation.
An illustration of the sequential method steps required for flight time compensation count derivation is shown in Figure 13. The first step, 310, is to measure the positional change of the carriage which occurred during tha previous inter-sample interval, tllis is labelled DELTAX~ D~LT~
is obtained by sampling the output of pOSitiOll counter 72 at each sample time (i.e., at the beginning and end of that interval). D~LTAX is a signed variable and its sign indicates the direction of carriage motion during the interval timeO Next, if required by the nature of the printer mechanism, an appropriate offset ~nay be added to DELT~Y, in step 320. The purpose of the offsct is to compensate for mechanical "play" in the printer drive or ot~ler sucll factors wllich are f~mctions primarily of dircction and not velocity. In some systems, such offsets may not be needed for acceptable ~133~

registration of printed dots. The ne~t step, 330, is to compute the change in FTC required by virtue of the change in the offset-adjusted DELT~X observed during tlle last sampling period. The required value of FTC
may generally be expressed as a f~mction of offset-adjusted DELTAX. In the particular implementation using a printer mechanism similar to that employed in the model LA36 terminal manufactured by Digital Equipment Corporation, Maynard~ ~, it has been found that this function may be expressed as a proportionality constant whose value is primarily determined by print wire flight time and secondarily determined by velocity-related mechanism variations, such as elasticity Oqf the carriage driving lir~ageO Thus, the FIC connection function may be obtained from an expression in the form:
desired FTC = I~FTC (DELT.~X ~ OFFSET ADJUSTMENT), where I~FTC represents the proportionality constantO
Since the transition counter can only resolve integer multiples of a transition and the above calculation may lead to the computation of a desired FTC which differs from the position count by a non-integral number of transitions, the desired FTC can only be approached on a greatest integer basis. Specifically, the resolution obtained in the above calculation is equal to one transition divided by KFTC. Thus, in step 340, an add/subtract command is sent to the T~IC 86 to cause the net transition generator to add or subtract a number of transitions corresponding to the greatest integer in the difference between the prior FTC and the desired FTC~ to cause the greatest integer in the desired FTC to become the new FTC. l~hile it may be possible to complete the above updatinO of FIC in its entirety dilring one inter-s~lple period, it has also been found that if acceleration is low enou~h, the updating may be donc at a slo~er rate, even as slow as one transition add or subtract per samplc interval.

Claims (18)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A dot matrix character printer for printing characters of a pitch selectable from among a plurality of available pitches, comprising: a print head; means for moving the print head; transition generator means for providing print head motion signals responsive to movement of the print head, each basic unit of print head displacement defining a transition; transition counter means for providing print head actuation signals responsive to the print head motion signals, the distance travelled by the print head between successive print head actuation signals defining an increment; increment counter means for providing intercharacter space signals responsive to print head actuation signals; said transition counter means and said increment counter means being variable radix counters; means for accepting signals representing the number of increments per character, the number of transitions per increment and the number of tran-sitions per intercharacter space; means for setting the radix of the increment counter means to the number of increments per character represented by said signals; means for setting the radix of the transition counter means; such radix setting means being adapted to set the radix of the transition counter means to the number of transitions per intercharacter space during the intercharacter space and to the number of transitions per increment at all other times; and the increment counter means and the transition counter means being adapted to accept as their radices any values within their respective counting ranges.

2. The dot matrix character printer of claim 1 further including means for setting the radix of the increment counter means to the number of increments per character.

3. The dot matrix character printer of claim 1 further including means for storing a representation of the number of increments per character, the number of transitions per increments and the number of transitions per intercharacter space, responsive to the means for accepting, and the radix setting means further being adapted to selectively provide such stored re-presentations of the number of transitions per increment and transitions per intercharacter space to the transition counter for setting its radix.

4. The dot matrix character printer of claim 2 further including means for storing a representation of the number of increments per character, the number of transitions per increments and the number of transitions per intercharacter space, responsive to the means for accepting, and the radix set-ting means further being adapted to selectively provide such stored representa-tions of the number of transitions per increment and transitions per inter-character space to the transition counter for setting its radix.

5. The dot matrix character printer of claim 2, claim 3 or claim 4 wherein the means for setting the radix of the transition counter and the means for setting the radix of the increment counter are adapted to permit the number of increments per character, the number of transitions per increment and the number of transitions per intercharacter space to vary from character to char-acter, thereby permitting character pitch to be altered on a character by character basis.

6. The dot matrix character printer of claim 2, claim 3 or claim 4 wherein the print head may move in two directions, such as left-to-right and right-to-left, and further including: means for signalling in which of said two directions the print head is moving; and responsive to the means for signalling, the first column of a character being set to be the left-most column of the character for printing from left-to-right and being set to be the rightmost column of the character for printing from right-to-left.

7. The dot matrix character printer of claim 2, claim 3 or claim 4 wherein the print head may move in two directions, such as left-to-right and right-to-left, and further including: means for signalling in which of said two directions the print head is moving; and responsive to the means for signalling, the first column of a character being set to be the left-most column of the character for printing from left-to-right and being set to be the right-most column of the character for printing from right-to-left, the dot matrix character printer further being adapted to permit the number of increments per character, the number of transitions per increment and the num-ber of transitions per intercharacter space to vary from character to character, thereby permitting character pitch to be altered on a character by character basis.

8. A dot matrix character printer for printing characters of a pitch selectable from among a plurality of available pitches, comprising: a print head including dot printing means for printing dots to form characters; means for moving the print head; transition generator means for providing print head motion signals in response to movement of the print head, the basic unit of print head displacement resolved by the print head motion signals defining a transition; transition counter means for counting transitions to provide print head actuation signals in response to the print head motion signals, the distance travelled by the print head between successive print head actuation signals defining an increment; increment counter means for counting increments to provide intercharacter space signals; said transition counter means and said increment counter means comprising variable radix counters; means for accepting signals representing the number of transitions per increment and the number of transitions per intercharacter space; means responsive to said inter-character space signals for setting the radix of the transition counter means to the number of transitions per intercharacter space during the intercharacter space and to the number of transitions per increment at all other times, to generate an intercharacter space having at least one transition independent of the number of transitions per increment; means for setting the radix of the increment counter means to the number of increments per character; the increment counter means and the transition counter means being adapted to accept as their radices any values within their respective counting ranges; and the provision of print head actuation signals being inhibited at selected times, so that characters are printed on an increment by increment basis, with selected pitch.

9. The dot matrix character printer of claim 8 further including:
transition counter control means for causing the transition count in the transition counter means to be incremented or decremented responsive to a transition add/subtract signal, whereby the print head actuation position may be controlled by the transition add/subtract signal to compensate for move-ment of the print head during the response time of the dot printing means in the print head and permitting accurate registration of printed characters while printing at variable rates.

10. The dot matrix character printer of either claim 8 or claim 9 further including: net transition generator means associated with the tran-sition counter for preventing the transition counter from responding to pairs of consecutive single transitions of opposite directions, such net transition generator means including: means for comparing a subject transition with the next preceding transition; inhibiting means responsive to the means for com-paring, for preventing the transition counter from responding to the subject transition if it represents a reversal of direction from the next preceding transition; means responsive to the inhibiting means, for storing the direc-tion of the subject transition and the fact that the transition counter was prevented from responding to it; second comparison means for comparing the next succeeding transition with the subject transition; and means responsive to the second comparison means, for preventing the transition counter from responding to such next succeeding transition if the directions of the subject transition and the next succeeding transition are different and for providing both transitions to the transition counter if such directions are the same.

11. The dot matrix character printer of claim 8 wherein the print head includes two sets of dot printing means, the dot printing means of each set being actuable in response to print head actuation signals supplied to the dot printing means, the print head actuation signals provided by the transition counter means defining primary increment signals, and further including:
primary increment signal storage means responsive to the primary increment signals for producing secondary increment signals, each of said secondary increment signals being displaced with respect to a corresponding primary increment signal by an amount corresponding to the displacement between sets of dot printing means; and a first one of said sets of dot printing means being actuated by the primary increment signals and the other, second set of dot printing means being actuated by the secondary increment signals.

12. The dot matrix character printer of claim 11 wherein the print head may travel in two directions; and according to the direction of travel of the print head, one set of dot printing means is designated the leading set and the other set of dot printing means is designated the trailing set, the leading set being that set of dot printing means which leads in the direction of travel of the print head; and further including: means for providing a direction signal representative of the direction of print head travel; and means responsive to the direction signal for providing the primary increment signal to the leading set of dot printing means and the secondary increment signal to the trailing set of dot printing means; whereby characters may be printed with selectable and varying pitches and at variable print head velocities with a print head having two sets of dot printing means while the print head moves in each of said two directions.

13. The dot matrix character printer of claim 11 or claim 12 wherein the primary increment signal storage means for producing secondary increment signals comprises a shift register clocked by print head motion signals and receiving as its signal input the primary increment signals, such shift register producing as its output signal the secondary increment signals, the shift register length in bits being equal to the displacement in transitions between the sets of dot printing means, whereby each secondary increment signal is a displaced counterpart of a primary increment signal, the displace-ment between them corresponding to the displacement between sets of dot printing means.

14. The dot matrix character printer of any of claims 8, 11 or 12 wherein the dot printing means comprise solenoid driven print wires for im-pact printing, and the response time of the dot printing means includes the flight time of such print wires.

15. A printer control circuit for use in a dot matrix character printer for printing characters of a pitch selectable from among a plurality of available pitches, said printer being of the type having a print head which includes dot printing means for generating dots, means for moving the print head, and encoder means for generating signals indicative of relative print head position, the signals generated by the encoder being referred to as tran-sition signals and the smallest unit of print head displacement resolved by the transition signals being referred to as a transition, the control circuit comprising: transition counter means for counting transitions to provide print head actuation signals in response to the transition signals, the distance travelled by the print head between successive print head actuation signals defining an increment; increment counter means for counting increments to pro-vide intercharacter space signals during the intercharacter space, which is defined as a buffer zone following a character and during which printing of another character is prohibited; said transition counter means and said in-crement counter means comprising variable radix counters; means for accepting a signal representing the number of increments per character, the number of transitions per increment and the number of transitions per intercharacter space; means for initializing the transition counter means and the increment counter means; means responsive to said intercharacter space signals for setting the radix of the transition counter means to the number of transitions per intercharacter space in the intercharacter space and to the number of tran-sitions per increment at ali other times, to generate an intercharacter space having at least one transition independent of the number of transitions per character; the increment counter means and the transition counter means being adapted to accept as their radices any values within their respective counting ranges; and means for setting the radix of the increment counter means to the number of transitions per increment; means for controlling the position where the printing of a character is to start, including means responsive to the state of a two-state character print signal for inhibiting the provision of print head actuation signals to the print head until such character print signal occurs in a first state, establishing a window during which printing may start, and simultaneously the generation of an intercharacter space is completed, as signified by the intercharacter space signal.

16. The dot matrix character printer control circuit of claim 15 further including: transition counter control means for causing the transition count in the transition counter means to be incremented or decremented respon-sive to a transition add/subtract signal, whereby the print head actuation position may be controlled by the transition add/subtract signal to compensate for movement of the print head during the response time of the dot printing means in the print head and permitting accurate registration of printed characters while printing at variable rates.

17. The dot matrix character printer control circuit of either claim 15 or 16 further including: net transition generator means associated with the transition counter for preventing the transition counter from responding to pairs of consecutive single transitions of opposite directions, such net transition generator means including: means for comparing a subject tran-sition with the next preceding transition, inhibiting means responsive to the means for comparing, for preventing the transition counter from responding to the subject transition if it represents a reversal of direction from the next preceding transition; means responsive to the inhibiting means, for storing the direction of the subject transition and the fact that the transition counter was prevented from responding to it; second comparison means for comparing the next succeeding transition with the subject transition; and means responsive to the second comparison means, for preventing the transition counter from responding to such next succeeding transition if the directions of the subject transition and the next succeeding transition are different and for providing both transitions to the transition counter if such directions are the same.

18. The dot matrix character printer control circuit of claim 16 wherein the dot printing means comprise solenoid driven print wires and the response time of the dot printing means includes the flight time of such print wires.