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CA1190315A - Electronic noise reducing apparatus and method - Google Patents

Electronic noise reducing apparatus and method

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Publication number
CA1190315A
CA1190315A CA000463917A CA463917A CA1190315A CA 1190315 A CA1190315 A CA 1190315A CA 000463917 A CA000463917 A CA 000463917A CA 463917 A CA463917 A CA 463917A CA 1190315 A CA1190315 A CA 1190315A
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noise
signal
signals
input
comparison
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CA000463917A
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French (fr)
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J. Carl Cooper
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Priority claimed from CA000381667A external-priority patent/CA1180440A/en
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Abstract

ELECTRONIC NOISE REDUCING APPARATUS AND METHOD

Abstract of the Disclosure The present disclosure teaches a method and apparatus for reducing noise in an electronic signal. These inventive conceptions include a means for delaying the electronic signal and a comparison means for comparing the delayed signal to the signal in its undelayed condition. Means are provided for pro-cessing the signal in response to the comparison means to remove at least part of the noise.

Description

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ELECTRON3:C NOISE REDUCING APPARAl~S AND METHOD

Electronic Noise is a physi~al property which is at times most tro~lesome to electronir circuitry. In practical applications, unwanted noise is added or increased in a wanted electronic signal every time that signal passes through any resistance. Since all electronic devices contain some resist-ance, they are noise producers, and when amplification is added to these devices, the noise is amplified along with the wanted signalsO While it is possible to design electronic circuitry to minimize the effects of noise on the wanted electronic sig-nal, it is impossible to completely eliminate these effects~ As the wanted signal passes through more and more stages of cir-cuitry, the unwanted noise will always increase, i.e. the sig-nal to noise ratio (S/N) will decrease until at some point, no matter how well designed the circuitry, the signal will become unacceptable becau~e of the noise. In order to improve bn this situation, it is obvious that the noise on the electronic signal must be removed at some stage in order to prevent the eventual destruction of the signal. In order to demonstrate the problem and its solution/ I have selected television video signals.
Other objects and a fuller understanding of this in-vention may be had by referring to the following description and claims, taken in conjunction with the accompanying drawings, in which:
Figure 1 is a typical steady state D.C. electronic signal graph with cLetail 31;

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1 Figure 2 is a typical steady state D.C. signal 32 with detail 33 ~s in Figure 1, after noise has been impressed on said signal and detail;
Figure 3 is a t.ypical electronic linear ramp signal 34 with detail 35;
Figure 4 is a typical electronic linear ramp signal 36 with detail 37 as in Figure 3 after noise has been impressed on said signal and detail;
Figure 5 is a typical sinusoidal electronic signal 38 with detail 39;
Figure 6 is a typical sinusoidal electronic signal 40 wi~h detail 41 as in ~igure 5 after noise has been impressed on said signal and detail;
Figure 7 is a typical D.C. elec~ronic signal with noise of even power distribution throughout frequency domain (white noise). Refer to Motchenbacher and Fitchen "Low Noise Electronic Design" ~ 1973 John Wiley ~ Sons/ Inc., N.Y., N.Y.
for further explanation~
Figure B is a typical D.C~ electronic signal wi~h noise having an inverse power distribution with respect to frequency (1/f noise). Refer to Motchenbacher and Fitchen "Low Noise Electronic Design" for further explanation.
Figure 9 is a graph of a typical video signal 42 with detail 29 with said signal and detail having noise impressed on them;
Figure 3A is a graph of a typical video signal as in Figure 9 with noise removed from signal areas 28 whi.ch do not contain detail;
Figure 9B is an indication of timP durations during which processing is turned on, and limited, in noise removal f~3~

1 circuitry. No~e that ~igure 9, 9A and 9B share a common time axis;
Figure 10 is a graph of a typical si~nal containing a linear ramp 43 and a sinusoid wave 44, including typical sample points in sPquence 45-50 used by an A-D converter and 8 bit binary data words 51-56 which are the output of the A D
which correspond to the voltage of the analog signal at the s~mple points 45-50 in sequence.
Figure 11 is a block diagram of a typical 8 binary hit analog ~o dir~ital to analog conversion set. The set is composed of an input 57 for the analog signal which is to be converted, the analog to digital converter 58, the output of the A-D
comprised of 8 binary data lines 59-66 inclusive, the clock output 67, the digital to analog (D-A) converter 6B, which converts the series of digital data woxds vn lines 59-66, utilizing the clock on line 67, to an analog ou~put 69. The analog output 69 will corrèspond to the analog input 57 if the digital data on lines 59-66 is not changed or modified;
Figure 12 is a block diagram of a typical digital noise reducer unit which utilizes an A-D, D-A conversion set for ease of operation. The reducer is composed of analog input 70 which coxresponds ~o 57. Figure 11, data lines and clock line 72 which correspond to 59-67 of Figure 11, the actual noise reduction circuitry 73, data and clock outputs 74 from the noise reduction circuitry, similar to 59-67 of Figure 11, D-A unit 75, which corresponds to 68 of E'igure 11, and a~alog output 76 which corresponds to 69 of Figure 11.
Figure 13 is a block diagram of noise reduction unit with the circuit input 77, the data delay block 78, the compar-ison block 79, the processing block 80 and the circuit ou put 8L

3_ 1 Dashed line RX indicates the recursive input connection and NRI ~he nonrecursive connection for the delay block 78. For a nonrecursive system NRI is connected and RI is removed. For a recursive system NRI is disconnected and RI is connected.
Figure 14 is a graph of a typical sinusoidal color subcarrier such as that in the National Television Standards Committee (NTSC) Color Television System, with A-D sample points 50-58 labeled 82-gO re~pectively;
Figure 15 is a block diagram of prototype noise reduc tion unit having components grouped into 3 blocks, comparison block 91, including components 96, 97, 98~ 99, 100, delay block 32 including components 101, 102, 103, 104, pxocessing block 93 including components 105, 106, and outp~t register 95 and input register 94 shown for clarity. Parts listed are:
Number 96 identifies a binaxy number also known as the detail threshold, which may be set by a series of switches.
Number 97 identiies an arithmetic lo~ic unit similar to that in Figure 23 set to determine if one input number is larger ~han another.
Number 98 identifies a storage circuit fox the output of 97, having a storage of time of 3 clock pulses, similar to that described in Figure 21.
Number 99 identifies a shift register for the output of 100 similar to that in Figure 22.
Number 100 identifies an arithmetic logic unit, set to subtract one number from another simil~r to that described in Figure 23.
Numbers 101-104 identify shift registers similar to that described in Figure 22.

1 Number 105 identifies an a~ithmetic logic unit set to add or subtract two numbers depending on a command from one of its inputs, similar to that described in Figure 23.
Number 106 identifiec; an eigh. pole double throw electronic switch also known as a line selector similar to that described in Figure 20.
Figure 16 is the same block diagram as Figure lS t showing the location of data words and internal calculations 7 at points 107-117, in a specific exampl~;
Figure 17 is a schematic symbol for a digital inverter 118 and an explanation of its functionO For further details consult manufacturers information for a type 7404 Integrated Circuit ~I.C.);
Figure 18 is a schematic symbol 119 for a digital Nand gate and an explanation of its function. For urther details consult manufacturers infoxmation for a type 7400 I.C.;
Figure 19 is a schematic symbol 120 for a digital exclusive or gate with a brief expianation of its function.
For further detail consult manufacturers information for a type 7486 I.C.;
Figure 20 is a schematic symbol 121 for a digital line selector with a brief explanation of its fllnction. For further details consult manufacturers information for a type 74157 I.C.;
Figure 21 is a schematic symbol 122 for a digital D
type flip flop with a bri~f explanation of its use. For further details consult manufacturers information for a type 7474 I.C.;
Figure 22 is a schematic diagram 123 for a digital shift register (SR) with a brief explanation of its function.

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1 For further details refer t~ manufacturers specifications for a type 74198 I.C.;
Figur~ 23 is a schematic cliagram 129 for a digital arithmetic logic unit (ALU) with a brief explanation of its functloll. For further details refer to manufacturers specifications for a type 74181 I.C~;
Figure 24 is a schematic diagram for prototype noise reduction cixcuit composed of comparison block 125 including ALU-l components 130, 131, 132t 133, register C 1369 ~LU~2, 134, 135, number set switches 137, 3 clock delay 138, 139, 140 process hlock 126 composed of ALU-3 141t 142, 143, 144, 145, 146, and SPST switch 147, 148, delay block 127, composed of shift registers 149, 150, 151, 152, input register 12e and output register 129, and clock inverter 153. Components are:
Numbers 128, 136, 129, 149, 150, 1~1, 152 identify a 7419~ shift register. See Figure 22.
Numbers 130, 131, 134, 135, 141, 142 identify a 74181 ALU. See Figure 23.
Numbers 153, 146 identify an inverter. See ~igure 17.
Numbers 132, 133, 143, 144 identify an Exclusive Or. See Figure 19.
Numb~rs 147, 148 identify an SPST switch. See Figure 20.
Number 145 identifies a NAND gate. See Figure 18.
Nu~bers 138, 139, 140 i.dentify a flip flop.
See Figure 21.
Figure 25 is a ~epresentation of five scan lines taken at any point in a television raster and as viewed on a television CRT; and 3:~

1 ~igure 26 is a representation of the video wave~orms which correspond to the scan lines of Figur~ 25.
NOISE ESSAY
A study of noise which is prevalent in a video signal is necessary before one may attempt to reduce this noise. A
great many engineers have devoted much time to the design of low noise circuitry in television cameras, video tape recorders, and video processing equipment; however, relatively few engineers have devoted their work to removing noise which has 10 already been generated. It i5 believed that this lack of attention is primarily due to -the conu[lon belief that once noise is generated, it cannot be removed, except by bandwidth limiting, which in its simple form eliminates or reduces resolution or detail. The present invention has come about after an in depth study and analysis of noise in video and audio signals ov~r the past several years utilizing several different approaches.
Among the methods used are spectrum analysis, waveform analysis, vector analysis (for phase encoded color signals~ and observa-tion of CRT displays. Most observations confirm the standard noise models which are discussed by Motchenbacher and Fitchen in their book Low Noise Electronic Desi~n~ Observation of noise on a video wavefoxm which has been recorded, and replayed in a frozen ti-ne mode reveals a property of noise in the detail in that signal that is not commonly known. This property will be discussed laterO
A steady state D~Co signal is shown in Figures 1, 2, 7 and 8 of the drawinys, which exhibit normal noise, in white and l/f domains. Bandwidth reduction will effectively decrease this noise, and if the reduction is severe enough) the noise will be virtually eliminated. See Low Noise Electronic Desi~n for further details~

1 Noise on a linear or approximately linear ramp can be treated approximately the same as that of a steady state D.C. signal, except that bandwidth limiting cannot be as severe since it is necessary to pass the D.C. shift. Se~ Figures 3 and 4. Noise analysis of a sine wave is somewhat more complex.
See Figures 5 and 6. Most high fre~uency noise (primarily white and popcorn noise) can be effectively removecl by band limiting above the fxequency of the signal sine wave; however, l/f noise can be especially txoublesome in this mode. If the bandwidth is lowered further to suppress l/f noise, then the signal will also be suppressed. Since color information in a National Television Standards Committee (NTSC) video signal is a sine wave which is phase and amplitude modulated/ variations will be subjectively observed as color hue and saturation variations. These variations are very annoying to most observ-ers; ~herefore, it is especially critical to preserve this sine wave information. The mechanism for reducing noise on this si~nal must therefore be an averaging process, coupled with a band limiting process. The average would sample the sine wave in different spots, compute an average amplitude and phase and then correct the sine wave to these average values.
Bandwidth limiting would redu~e noise above the frequency of the sine wave. The averaging process also works well on low frequency noise and linear ramp signals, which could be treated as sinusoidal waves having no sinusoidal amplitude.
Analysis of xecorded noise reveals that the subjective or visual noise in the color subcarrier is primarily dominated by noise of those frequencies near and far below subcarrier.
The noise above subcarxier ~requency is not seen as color noise ~ 33 ~ ~

1 because of the band pass effects of all state-of-the art color demodulatvrs; this high frequency noise is observed as luminance noise. This luminanc~ noi.se (with the cclor sub-carrier spectrum removed) appears to be the same as the linear ramp noise of Figure 4 and may be remo~ed by band limiting or averaging.
E'or video signals, analysi.s and observa~ion of all three signal rases in Fiyures 1-6 reveals that noise i5 visually most noticeable on low bandwidth portions (horizontal waveform portions of a video si~nal)~ This implies once again an averaying process is needed to remove ~he noise, since averaging works better than bandlimiting at low frequencies.
Noise which has been impressed on ~ fast signal risetime such as in Figure 6~ component 41, tends only to modify the rise time and phase of the signal and are not readily visually apparent to the ~iewer.
While these statements appear at first glance to be relatively unimportant, careul thought reveals that in the pro-cess of noise reduction, it is relatively unimportant to try to correct the noise in fast risetimes, such as Figure 2,33, Figure 6,41. ~herefore, noise in high frequency video components is not as .umportant as that in low frequency components.
Noise in the 510w risetime components such as in Figure 4, item 36, tend to modify the amplitude of the signal causing readily apparent visual annoyance, therefore, this noise should he of prime concern to a designer who is involved in reduciny visual noise effects. Since color information is both phase and amplitude encoded in an NTSC system, phase variations of the color subcarrier are also of concern. With an averaging tech~i.que this would be corrected.

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1 THEORY OF NOISE ~F,D~CTI~N
First, ~ plan for noise reduction of steady s~ate D.C. and lineax ramps is disclosed. Processing such as, but not limited to, averaginy and bandwi~th limiting to a low frequency for these waveforms will give a proportional decrease in white noise and a restricted decrease in excess, l/f and other types of noise for these signals. The amount of recluc-tion can be rather dramatic since virtually all of the noise can be limited if the upper frequency of the bandwidth is severely limitedO In video, any noise below 15khz would appear as a line to ~ine brightness change and any noise above 15khz would be eliminated with sufficient processing. Obviously, with flat 15khz filt ring, there would he no signal data or informatio~ passed, so it is necessary to determine when high frequency signal information is present and remove~ restrict, or turn off the processing during the time this inf~rmation is present. As discussed previously, noise has a small visual effect on high frequen~y signal infor~ation, so that xestrict-ing the processing during this time to presexve the high frequency sîgnal will have li tle vi.sual effect on this portion of the signal. A graphic example of the abov~ is given in Figures 9, 9A,and 9B.
In oxder to process the video wavefo~m, it is easiest to first convert the analog wavefoxm to a digital representative of the waveform. This will make it easier to perform the mathematical averaging functi.on. The conversion equipment/
~See Figures 10 ancl 11)~ known as an analog to digital conver~r or A-D is commercially available and will not be discussed extensively. A representative input waveform to the A~D with 30 a linear ramp 43 (Figure 10) and a sinusoidal waveform 44 is ~3~ 5 1 shown. The A-D samples, 45~50, occur on the waveform at a frequency which is exa~tly 3 times the fxequency of the color subcarrier. The output of the A-D is a series of 8 bit binary data words lFigure 10, items 51-56) which occur at a rate which is exactly 3 times (3x) the colo.r subcarrier requency of the NTSC ~ideo signal. The individual data word is a binary number whose magnitude is directly related to the magnitude (voltage) of the incoming vi.deo wavefox~ which it xepresents. In addi~ion to these 8 bi$s of data, ~Figure 11, items 5~-66), there is also available a square wave clock pulse ~Figure 11,67) whose negative to positive transition corresponds to the time when the 8 data bits may be stored or trans~erred with the assurance that they are valid and stableO This clock is provided because between sample points there is a period of uncertainty whPn the data is changing.
There will be one clock pulse for Pach data word. A-D
conversion techniques are by no means limited to 8 bits or 3x subcarrier nor is processing limited to NTSC video signalsu Arithmetic operations such as addition which change the binary data, will change the analog waveform correspondingly, when the binary data is converted back to analog, in a digital to analog converter ~D-A~ Figure 11,6~. For example, if all the data words are multiplied by 2, the analog output will be doubled. In order to utilize the diyital domain to do the noise reduction, the actual digital circuitry to perform the arithmetic unctions, such as comparing and averaging, is inserted in the binary data line between the A-D and D-A as in Figure 12. The continual stream o 8 bit data words from the A-D is fed via a transmission line 72 to ~he noise unit 73 where the noise unit stores~ compares and processes the data, 3~

1 then the data which has been processed i5 fed via a trans-mission line 74 to the D-A 75 where the digital data is converted back to analog data and applied to the output 76.
A further discussion and detailed de.scription of an analog ~o digital and digital to analog conversion may be found by referring to U.S. Patenk No~ 3,860,9!;2. This patent covers the Consolidated Video Corp. Model No. 504A. Digital Time-base Corrector, utilizes the A-D to D-A process to facilitate timebase correction of a ~ideo signal. ThP A-D con~erter of this device was utilized to implement the invention herein disclosed .
T~EORY OF OPER~TION FOR COLOR P~OTOTYPE
In order to process color properly in the NTSC system, care must be taken to ensure that comparisvns and computations are made only on samples of successive corresponding parts of the color subcarrier wavefonm (S.C.~. Refer to Figure 14 where a sine wave subcaxrier is shown with A-D sample spoks (S0-S8 82-90 indicated occurring at a 3 time S.C. rate. If comparisons are made between successive s~mples or data bits S~
Sl, S2, etc., the difference in the value of these bits w~uld be affected by both noise on the signal and the ncrmal displace-ment due to the sinusoidal waveform. Ohviously, it would be difficult to compute the amount of noise present by first coxrecting the bits to remove, or compensate or, the amount of color subcarrier pxesent. Now consider the case where every bit is compared to the one 3 bits before i.e. Sl and S4, S2 and S5, etc. Clearly, in a steady signal, these bits will difer only the noise difference between the two bits being compared. It is possi~le to average these samples to deter~
mine the average ~alue of the samples and correct these subcax-3:~

1 rier samples accordingly to remove the vari~tion. Refer to Figures 15, 16 and Figure ?4 (Figures 15 and 16 are block diagrams of Figure 24).
In order to analyze the operation of ~he noise reduction circuitry first ass~me that data word 1 (Dl) (Refer specifically to Figure 15) which corresponds to sample 1 (Sl) is present at the input register when the first clock pulse arrives. Data word 1 (Dl~ will be transferred to the inputs of register A,101 and ALUl,100. The input register 94 is not 1.0 nece~sary to the operation of the unit but does serve to mini-mize reflections on interconnecting lines. In a similar manner, at the next clock pulseO data word 1 will pass through Register B, 102, and with successive clock pulses, will pass through Register E~ 103 and Register D, 104 and it will then appear at the input of ALU-3,105. In a similar manner, data words 2,3~ and 4 will also propa~ate through ~his string.

Registers A, B, E~and D make up the delay block of the circuit.

Now consider the time period just after clock pulse 4 when we have the situation shown in Figure 16. We earlier assumed the output of register 94, point 108 is applied to the input of ALU 1,100, ALV-l performs a subtraction function~ subtracting Data Word 1 from Data Word 4~ An output ~f ALV-l~ point 109 gives the result of the subtraction and a second output from ALU-l indicates whether the answer is positive or negative.
This information is stored in kegister C, 99 at the next clock pulse. We may ssume that Register C already has stored the difference of the prev.i~us subtraction which was D3-D0. We may also assume tha.t Register D has Data DO already stored.
ALU-3,1D5 averayes DO with the difference of D3 and DO from Register C according to the formula X - DO - (D3-DO). The 1 previously stored sign (~ or -) information for the ~uantity (D3 DO) is used by the ALU-3 in order to perform the plus or minus function s~ that if D3 is greater than DO, D3-DO is added tc DO and if D3 is smaller, D3-DO is subtracted from DOv Since the diff~rence between D3 and DO is the low frequency noise impressed on the wavefo~m, the output of ALU-3 will be DO with 1/2 of the noise removed by this averaging process.
This noise averaging process will continue indefinitel.y~
- processing every bit of information in the waveform. NGW
assume the case where ~he subcarrier has a long term D.C.
shift in either a positive or neyative direction. Since the difference in data is only corrected by a factor o~ ~50, 3 clock pulses after the shift appeared at input point 108, the shift will appear at the output of ~LU-3, 116, offset by 1/~
of the D~C. shift over the 3 clock period, but having the same slope as the input. For most applications, this shift is not noticeable to a viewer watching a picture monitor; if it were, further circuitry could compensate for it. Next assume the case wher~ there is a step function or a large D.C.
shift in the input waveform. This is where ALU-2,97 and the switch 106 come into operation. As soon as the new level and old level are subtracted by AL~ 1, and subsequently clocked through Register C, the difference at point 114 is presented to the input of A~U-2. ALU-2 compares this difference to a fixed number X,96 which is set by a series of switches. If this difference is greater than the number X (detail threshold~
ALU-2 sends a signal via point 115 to the switch, which switches it f~om the averaged output of ALU-3 to the uncorrected output of Register D. This effectively bypasses ~he processing action for the duration of the large level shift and preserves the detail of s 1 the risetime~ The delay 98 between AL~-2 and the switch passes a switch off command instantly and delays the following switch on command for 3 clock pulses. This allows the detail to clock through the Register chain 101~-104 to the output. ALU-l, REG C, ALV-2, X, the 3 CLK hold their associated components make up the comparison block of the circuit. ALU-3 and the SPDT switch make up the processing block of the circuit. The output register 95 is not necessary to ~he operations but was included in order to minimi~e transmission line reflections in the prototype. The net effect of these three actions ls that the noise vn color subcarrier will ~e reduced by a factor of l/Z
for both steady state subcarrier and for slowly shifting color subcarrier, this wîll give an improvement of the signal in these areas. Those axeas which are of fast risetime or high detail are bypassed. This preserves the de~ail, but no noise limiting will take place. Since noise is not as noticeable on these high detail areas, there would be little visual improvement of the signal anyway.
The overall effect of ~he processing, as viewed on 20 the picture monitor will be that of a much more pleasing image which still has its original detail but has lost much of the objectionable graininess. The foregoing circuit was designed primarily to demonstrate the principle of noise reduction of an electronic signal. With a little study one sees that by adding more delay to increase the time between compared pulses to a single or one horizontal line, the net effect is to compare successive vertical picture elements. Also, it would be advantageous to compare several different adjacent picture elements so that comparisons could be made in a plane and make the bandwid~h limiting and averaging more exacting. These 1 methods would, of course, require much more circuitry to implement but can be accomplished under the teachings of the pxesent invention.
The above analysis may be expanded to include proc~
essing of a television video signal. It wil~ be seen that the comparison ~f adjacent picture elèments, as described above, will be most useful. Referring to Fig. ~5, one sees a representation of five ~can lines which may be taken rom any point in the television raster, as viewed on a television CRT~
The scan lines are adjacent in location on the CRT but will not necessarily be sequential in time, depending on the type of television system used~
The lines in Fig~ 25 are broken into se~ments A
through ~, A', B'p Ct, F7, G', ~'~ and X which represent picture elements and may be equated to the digital s~mples which were previously discussed. By ~nvisioning the picture elements of Fig. 25 as being segments or pixels of an actual display of a television scene~ one may understand that elements ~ and E
will be very similar to element X. The video waveforms which correspond to these scan lines might look like those in Fig. 26 where pixel A corresponds to voltage ~, A' to a~ etc. As previously discussed, .in a noisy signal, by averaging pixels D and X a bet~er approximation of the true noise free value of the waveform in the area around pixel X is obtained~
Statistically, it can be shown that the greater number of pixels which are compared to pixel X, and used to determine a new approximated value for the true value of pixel X before noise was added, the better that approximation will beO
This process of approximating or predicting the true value for a series of pixels, which have nois~ impressed on 1 them, is called noise reduction. In a simple low cost form the circuitry used to accomplish noise reduction would compare pixel X to pixel D or E and if these pixels were approximately the same, the two would be averaged, giv.ing a new value for pixel X. If the pixels were very different, no average would take place. The next pixel would then undergo the same process thus making the system continuous. This is the theory of operation of the device which has been previously described.
An improvement to this system would be to weig~t the averaglng so that as the pixels get farther and farther apart in magni~ude, the comparison pixel (D) would affect the prediction less and less. A for~ula which would accomplish this is ~l-Z~ x D + Z x X where Z is the weighting factor and z = .5 for D - X and increa~es as the magnitude of D - X increases until Z - 1 where D - -X.
Another logical improvement on this system is to use several adjacent pixels with each pixel being compared to X
and then averaged wi~h X according to some weighted averaging process. Of course, instead of an actual sum and divide type of average the hardware would operate more efficiently if a prediction of the amount of noi~e on pixel X were computed by inspecting the adjacent pixels with respect to pixel X, and thi~
amount of noise subtracted from pixel X.
In the actual hardware implementation of a scheme where several adjacent pixels are compared to an input pixel, there are many considerations to be made. ~eferring again to Fig. 25 and assuming a ~TSC system, those pixels which are truly ad~acent to pixel X are A', Bl, C'l D, E~ F~, G' and H'.
Since pixels D and :E are very close to pixel X in time, there is a good probability that any low frequency noise on pixel X

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1 will also be spread over pixels D and ~. An avera~e of pixels D and E to provide a reference for determining an estimate of the true value of X will be of limited use for low frequency noise. Pixels A', B', C', F', G' and H' are physically adjacent to X but in time are quite separate :Erom X and therefore both low frequency and high fre~uency noise impressed on these adjacent pixels would be very random wi~h respect ko X~ One may assume that pixels A', B' and C' may however contain different amounts of high frequency picture information or detail, so it would be wise to select only the one vf the three that is closest in magnitude to X or to average all 3 of these pixels to remove or reduce this high frequency detail before computing a reference. A similar technigue may be used for pixels F', G' and H', to provide another reference for comparison to pixel X.
In the NTSC system 7 in order to have the adjacent pixels A', B', C', F', G~ ~ and H' available for comparison at the same time as pixel X, h large delay or memory of approximately 1 field must be used. LargP delays, with current techniques, are very costly. In order to reduce this cost, it would be possible to use pixels A, B, C, F, ~ and H, which are taken from the same field as X, in place of ~hose truly adjacent pixels which would come from the previous field. These pixels from the same field would still be relatively similar to pixel X and would have ralldom noise impressed on them. A very good cost/performance tradeoff can be expec~ed by using pi.xels which are not adjacent to ~he input pixel X, but are close to it, such as those pixels to the left and right of pixels D and E respectively.

3~5 1 In the previous discussion, no mention has been made of the order of processing the variou~ pixels with respect to time. One variation of note relates to pixels which happened in time before the pixel wh:ich is currently being input to the system. Referring to F:igure 25, in the NTSC
system, pixels A, B, C and D as well as A', B', Ci~ F', Gl, and H' would ha~e happened before input pixel X, if one assumes pixel X is in ~he second field. It should be obvious that it would be quite easy to derive a recursive type o~
system so that those pixels which are used for a reference for estimating the true value of X have also been previously processed in order to remove part of the noise from them.
This process would be easily accomplished by delaying the output of the de~ice and using the output of the delay as the reference for the ~omparison to the input. Referring to ~igure 13, and assuming connection NRI is deleted and RI is connected to form a recursive system~ the comparison block will now compare the delayed output signal to the input signal~
The delayed output signal i5 a noise reduced version of the input signal which allo~s the input picture element to be compared to a noise reduced picture element wh.ich was previously input to the system. For example, in Figure ~5, any of the pixels A, B, C, D, A', B', C', F', G', or Hi can be compared to pixel X with these pixels having been previously noise reduced, if it is assumed that pixel X is in the second field.
It should be noted that in actual practice the signal delays through the proces~ing means will contribute to the delay time between the two inputs to the comparison means, thus this delay must be subtracted from the delay means. This and other ~19-- ~

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1 changes neces~ary to convert the noise reduction system from a nonrecursive to a recursive system are very similar to classiC textbook treatment of digital filters. The pxocessing means is so constructed that wheneve:r the difference between the input signal and the delayed output signal is below a given threshold it provides an average of the input and delayed output signals. Otherwise it provides the equivalent of the input signalO
The principle of comparing two or mor~ points on an electroniG signal and mathemetically processing ~he ~ignal to remov~ the random noise on that signal is by no means limited to the field o television. Any electronic signal which has information of a periodic or predictable nature can be processed in this manner by selecting the delays such that signal elements having some predictable relationship can be compared to determine how well these elements fit their predicted value.
For example, Radar signal elements ~hich correspond to the same area of the display CR~ on different sweeps could be compared.
In the audio domain, most wanted audio is composed of repetitive bursts of frequencies. For any given frequency in the audio spectrum, a wanted piece of informatfon will contain several cycles of this fre~uency. A random noise at this Erequency would be composed of a very few cycles or less than one cycle. By comparing thP signal to a point or several points which are integral cycle lenyths apart at the frequency being processed, a predi.ction can be made as to how much noise a given cycle of information has on it. The number of other intelllgent signals to which variations of this technique can be applied to are almost endless.

3~

1 Actual. electronic circuitry to accomplish these functions is shown in Figure 2~ o This circuitry is typical of state of the art digi.tal electroTIics and utilizes large scale integration components which are standard manufactured parts. A short functional explanation for each of these components is încluded in Figures 17-23. Manufacturers data she~ts may be consulted for furthex înformation. It will be seen that the circuitry follows very closely the block diagrams given pre~iously and the operational description given for the block diagram ~iguxes 15 and 16 is the same as for the circuit of Figure 24.
Actual circuit construction was made using computer type wire wrap techniques; however, printed circuit, hand wixing or any type of construction should work equally as well.
As used previously in these descriptions, the word Noise is meant to mean any unwanted disturbances superimposed upon a useful electronic signal that tends ~o obscure the information content of said electronic signal. Data shall refer to any signal to ~hich intelligence may be assigned, and Detail shall refer to any element of a data signal which differs significantly from those elements which surxound it.
NTSC or Mational Television Standards Commîttee is at pxesent an inactive organization which previously set up the television system currently in use in the United States.
While I 'have illustrated and described a preferred embodiment of my invention, it will be understood that this is by way of example only and not to be construed as limiting.

Claims (2)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. Apparatus for providing a noise reduced version of an input signal which signal is derived from a signal obtained by scanning a spatial image, including in com-bination, delay means responsive to said input signal to provide a plurality of comparison signals, which compari-son signals may correspond to different points on the scanning raster, comparison means responsive to said plurality of comparison signals which comparison signals may have been noise reduced, said comparison means opera-tive to determine the difference between at least two of said comparison signals and processing means responsive to said difference and at least one of said comparison signals to output either one of said comparison signals or an average of a plurality of said comparison signals in response to said difference, said output being a noise reduced input signal containing substantially the same number of picture elements as said input signal before noise is reduced.
2. The method of removing noise on an input television signal including the step of delaying said input televi-sion signal to provide a plurality of comparing signals which signals correspond to different points on the television raster, the step of comparing a first compar-ing signal to a second comparing signal to determine the difference thereof and the step of processing at least one of said comparing signals in response to said differ-ence to output a weighted average of said first and second comparing signals which output contains at least the same number of picture elements as, and is a noise reduced version of said input television signal.
CA000463917A 1977-01-31 1984-09-24 Electronic noise reducing apparatus and method Expired CA1190315A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US76390477A 1977-01-31 1977-01-31
US06030288 US4305091B2 (en) 1977-01-31 1979-04-16 Electronics noise reducing apparatus and method
CA000381667A CA1180440A (en) 1981-07-14 1981-07-14 Electronic noise reducing apparatus and method

Related Parent Applications (1)

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CA000381667A Division CA1180440A (en) 1977-01-31 1981-07-14 Electronic noise reducing apparatus and method

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