ATE180586T1 - Paralleles assoziativprozessor-system - Google Patents
Paralleles assoziativprozessor-systemInfo
- Publication number
- ATE180586T1 ATE180586T1 AT91109850T AT91109850T ATE180586T1 AT E180586 T1 ATE180586 T1 AT E180586T1 AT 91109850 T AT91109850 T AT 91109850T AT 91109850 T AT91109850 T AT 91109850T AT E180586 T1 ATE180586 T1 AT E180586T1
- Authority
- AT
- Austria
- Prior art keywords
- processing
- array
- picket
- parallel
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
- G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17356—Indirect interconnection networks
- G06F15/17368—Indirect interconnection networks non hierarchical topologies
- G06F15/17381—Two dimensional, e.g. mesh, torus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/803—Three-dimensional arrays or hypercubes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02B—INTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
- F02B75/00—Other engines
- F02B75/02—Engines characterised by their cycles, e.g. six-stroke
- F02B2075/022—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle
- F02B2075/027—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle four
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Nonlinear Science (AREA)
- Multi Processors (AREA)
- Exchange Systems With Centralized Control (AREA)
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Image Processing (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US61159490A | 1990-11-13 | 1990-11-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE180586T1 true ATE180586T1 (de) | 1999-06-15 |
Family
ID=24449647
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT91109850T ATE180586T1 (de) | 1990-11-13 | 1991-06-15 | Paralleles assoziativprozessor-system |
Country Status (15)
Country | Link |
---|---|
US (1) | US5822608A (de) |
EP (1) | EP0485690B1 (de) |
JP (1) | JPH04267466A (de) |
KR (1) | KR960016880B1 (de) |
CN (1) | CN1050919C (de) |
AT (1) | ATE180586T1 (de) |
BR (1) | BR9104603A (de) |
CA (1) | CA2050166A1 (de) |
CZ (1) | CZ280210B6 (de) |
DE (1) | DE69131272T2 (de) |
HU (1) | HU215139B (de) |
PL (1) | PL167329B1 (de) |
RU (1) | RU2084953C1 (de) |
SK (1) | SK344091A3 (de) |
TW (1) | TW229289B (de) |
Families Citing this family (117)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5765015A (en) | 1990-11-13 | 1998-06-09 | International Business Machines Corporation | Slide network for an array processor |
US5625836A (en) | 1990-11-13 | 1997-04-29 | International Business Machines Corporation | SIMD/MIMD processing memory element (PME) |
JP2525117B2 (ja) * | 1992-05-22 | 1996-08-14 | インターナショナル・ビジネス・マシーンズ・コーポレイション | アレイ・プロセッサ |
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
WO1996035997A1 (fr) * | 1996-05-22 | 1996-11-14 | Yalestown Corporation N.V. | Processeur parallele |
DE19651075A1 (de) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
EP1329816B1 (de) | 1996-12-27 | 2011-06-22 | Richter, Thomas | Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.) |
DE19704044A1 (de) * | 1997-02-04 | 1998-08-13 | Pact Inf Tech Gmbh | Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
US6786420B1 (en) | 1997-07-15 | 2004-09-07 | Silverbrook Research Pty. Ltd. | Data distribution mechanism in the form of ink dots on cards |
US6021453A (en) * | 1997-04-24 | 2000-02-01 | Klingman; Edwin E. | Microprocessor unit for use in an indefinitely extensible chain of processors with self-propagation of code and data from the host end, self-determination of chain length and ID, (and with multiple orthogonal channels and coordination ports) |
US6789212B1 (en) | 1997-04-24 | 2004-09-07 | Edwin E. Klingman | Basic cell for N-dimensional self-healing arrays |
US6803989B2 (en) | 1997-07-15 | 2004-10-12 | Silverbrook Research Pty Ltd | Image printing apparatus including a microcontroller |
US6618117B2 (en) | 1997-07-12 | 2003-09-09 | Silverbrook Research Pty Ltd | Image sensing apparatus including a microcontroller |
US7705891B2 (en) | 1997-07-15 | 2010-04-27 | Silverbrook Research Pty Ltd | Correction of distortions in digital images |
US20040119829A1 (en) | 1997-07-15 | 2004-06-24 | Silverbrook Research Pty Ltd | Printhead assembly for a print on demand digital camera system |
US7110024B1 (en) | 1997-07-15 | 2006-09-19 | Silverbrook Research Pty Ltd | Digital camera system having motion deblurring means |
US6985207B2 (en) | 1997-07-15 | 2006-01-10 | Silverbrook Research Pty Ltd | Photographic prints having magnetically recordable media |
US6690419B1 (en) | 1997-07-15 | 2004-02-10 | Silverbrook Research Pty Ltd | Utilising eye detection methods for image processing in a digital image camera |
AUPO850597A0 (en) | 1997-08-11 | 1997-09-04 | Silverbrook Research Pty Ltd | Image processing method and apparatus (art01a) |
US6879341B1 (en) * | 1997-07-15 | 2005-04-12 | Silverbrook Research Pty Ltd | Digital camera system containing a VLIW vector processor |
AUPO802797A0 (en) | 1997-07-15 | 1997-08-07 | Silverbrook Research Pty Ltd | Image processing method and apparatus (ART54) |
US6624848B1 (en) | 1997-07-15 | 2003-09-23 | Silverbrook Research Pty Ltd | Cascading image modification using multiple digital cameras incorporating image processing |
US8686549B2 (en) | 2001-09-03 | 2014-04-01 | Martin Vorbach | Reconfigurable elements |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
US6484065B1 (en) * | 1997-12-29 | 2002-11-19 | Kawasaki Microelectronics, Inc. | DRAM enhanced processor |
JP4158864B2 (ja) | 1998-03-18 | 2008-10-01 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | マトリックスのコサイン変換を計算するためのデータ処理装置およびその方法 |
US6079008A (en) * | 1998-04-03 | 2000-06-20 | Patton Electronics Co. | Multiple thread multiple data predictive coded parallel processing system and method |
US6067609A (en) * | 1998-04-09 | 2000-05-23 | Teranex, Inc. | Pattern generation and shift plane operations for a mesh connected computer |
US6185667B1 (en) * | 1998-04-09 | 2001-02-06 | Teranex, Inc. | Input/output support for processing in a mesh connected computer |
US6836838B1 (en) * | 1998-06-29 | 2004-12-28 | Cisco Technology, Inc. | Architecture for a processor complex of an arrayed pipelined processing engine |
DE19840210A1 (de) * | 1998-09-03 | 2000-03-09 | Fraunhofer Ges Forschung | Verfahren zur Handhabung einer Mehrzahl von Schaltungschips |
AUPP702098A0 (en) | 1998-11-09 | 1998-12-03 | Silverbrook Research Pty Ltd | Image creation method and apparatus (ART73) |
JP3439350B2 (ja) | 1998-10-02 | 2003-08-25 | Necエレクトロニクス株式会社 | キャッシュ・メモリ制御方法及びキャッシュ・メモリ制御装置 |
US7003660B2 (en) | 2000-06-13 | 2006-02-21 | Pact Xpp Technologies Ag | Pipeline configuration unit protocols and communication |
US6658575B1 (en) * | 1999-03-17 | 2003-12-02 | Olympus Optical Co., Ltd. | Voice recording/reproducing apparatus which enters a standby mode while in a communication mode with an external device |
AUPQ056099A0 (en) | 1999-05-25 | 1999-06-17 | Silverbrook Research Pty Ltd | A method and apparatus (pprint01) |
JP2003505753A (ja) | 1999-06-10 | 2003-02-12 | ペーアーツェーテー インフォルマツィオーンステヒノロギー ゲゼルシャフト ミット ベシュレンクテル ハフツング | セル構造におけるシーケンス分割方法 |
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US6728863B1 (en) | 1999-10-26 | 2004-04-27 | Assabet Ventures | Wide connections for transferring data between PE's of an N-dimensional mesh-connected SIMD array while transferring operands from memory |
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US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
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US7305487B2 (en) * | 2001-02-24 | 2007-12-04 | International Business Machines Corporation | Optimized scalable network switch |
US7844796B2 (en) | 2001-03-05 | 2010-11-30 | Martin Vorbach | Data processing device and method |
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US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
RU2202123C2 (ru) * | 2001-06-06 | 2003-04-10 | Бачериков Геннадий Иванович | Параллельная вычислительная система с программируемой архитектурой |
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US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
US8686475B2 (en) | 2001-09-19 | 2014-04-01 | Pact Xpp Technologies Ag | Reconfigurable elements |
EP1483682A2 (de) | 2002-01-19 | 2004-12-08 | PACT XPP Technologies AG | Reconfigurierbarer prozessor |
DE50310198D1 (de) | 2002-02-18 | 2008-09-04 | Pact Xpp Technologies Ag | Bussysteme und rekonfigurationsverfahren |
US9170812B2 (en) * | 2002-03-21 | 2015-10-27 | Pact Xpp Technologies Ag | Data processing system having integrated pipelined array data processor |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
WO2004021176A2 (de) | 2002-08-07 | 2004-03-11 | Pact Xpp Technologies Ag | Verfahren und vorrichtung zur datenverarbeitung |
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CN105046162B (zh) * | 2014-03-12 | 2018-07-27 | 西部数据技术公司 | 在内容可寻址存储系统中维护并使用子对父映射的缓存 |
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-
1991
- 1991-06-15 AT AT91109850T patent/ATE180586T1/de active
- 1991-06-15 EP EP91109850A patent/EP0485690B1/de not_active Expired - Lifetime
- 1991-06-15 DE DE69131272T patent/DE69131272T2/de not_active Expired - Fee Related
- 1991-08-28 CA CA002050166A patent/CA2050166A1/en not_active Abandoned
- 1991-10-01 JP JP3278900A patent/JPH04267466A/ja active Pending
- 1991-10-11 KR KR1019910017964A patent/KR960016880B1/ko not_active IP Right Cessation
- 1991-10-11 CN CN91109637A patent/CN1050919C/zh not_active Expired - Fee Related
- 1991-10-24 BR BR919104603A patent/BR9104603A/pt unknown
- 1991-10-28 TW TW080108435A patent/TW229289B/zh active
- 1991-11-12 RU SU915010148A patent/RU2084953C1/ru active
- 1991-11-12 HU HU913542A patent/HU215139B/hu not_active IP Right Cessation
- 1991-11-13 SK SK3440-91A patent/SK344091A3/sk unknown
- 1991-11-13 PL PL91292368A patent/PL167329B1/pl unknown
- 1991-11-13 CZ CS913440A patent/CZ280210B6/cs not_active IP Right Cessation
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1994
- 1994-09-06 US US08/301,278 patent/US5822608A/en not_active Expired - Fee Related
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HU913542D0 (en) | 1992-02-28 |
KR920010473A (ko) | 1992-06-26 |
CN1050919C (zh) | 2000-03-29 |
CA2050166A1 (en) | 1992-05-14 |
SK344091A3 (en) | 1995-01-05 |
BR9104603A (pt) | 1992-06-23 |
PL167329B1 (pl) | 1995-08-31 |
HUT59496A (en) | 1992-05-28 |
DE69131272D1 (de) | 1999-07-01 |
EP0485690B1 (de) | 1999-05-26 |
KR960016880B1 (ko) | 1996-12-26 |
TW229289B (de) | 1994-09-01 |
RU2084953C1 (ru) | 1997-07-20 |
EP0485690A2 (de) | 1992-05-20 |
PL292368A1 (en) | 1992-09-07 |
US5822608A (en) | 1998-10-13 |
EP0485690A3 (en) | 1994-09-21 |
CZ344091A3 (en) | 1995-05-17 |
HU215139B (hu) | 1998-09-28 |
DE69131272T2 (de) | 1999-12-09 |
CN1061482A (zh) | 1992-05-27 |
JPH04267466A (ja) | 1992-09-24 |
CZ280210B6 (cs) | 1995-12-13 |
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