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NL7604652A - PROCESS FOR THE MANUFACTURE OF SEMICONDUCTORS. - Google Patents

PROCESS FOR THE MANUFACTURE OF SEMICONDUCTORS.

Info

Publication number
NL7604652A
NL7604652A NL7604652A NL7604652A NL7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A NL 7604652 A NL7604652 A NL 7604652A
Authority
NL
Netherlands
Prior art keywords
semiconductors
manufacture
Prior art date
Application number
NL7604652A
Other languages
Dutch (nl)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7604652A publication Critical patent/NL7604652A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/032Organic insulating material consisting of one material
    • H05K1/0346Organic insulating material consisting of one material containing N
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)
  • Weting (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Treatments Of Macromolecular Shaped Articles (AREA)
  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
NL7604652A 1975-08-13 1976-04-29 PROCESS FOR THE MANUFACTURE OF SEMICONDUCTORS. NL7604652A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50098179A JPS5222071A (en) 1975-08-13 1975-08-13 Method of selective etching of film of polyamide resin

Publications (1)

Publication Number Publication Date
NL7604652A true NL7604652A (en) 1977-02-15

Family

ID=14212791

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7604652A NL7604652A (en) 1975-08-13 1976-04-29 PROCESS FOR THE MANUFACTURE OF SEMICONDUCTORS.

Country Status (5)

Country Link
JP (1) JPS5222071A (en)
DE (1) DE2618937C3 (en)
FR (1) FR2321190A1 (en)
GB (1) GB1510944A (en)
NL (1) NL7604652A (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54106599A (en) * 1978-02-09 1979-08-21 Hitachi Chem Co Ltd Preparation of polyamide intermediate for semiconductor processing
JPS54179102U (en) * 1978-06-07 1979-12-18
JPS5515502A (en) * 1978-07-18 1980-02-02 Hitachi Ltd Running control system for manless wagon
JPS557880A (en) * 1979-04-27 1980-01-21 Hitachi Ltd Etching solution for organic resin
JPS58108229A (en) * 1981-12-21 1983-06-28 Hitachi Ltd Selective etching of polyimide resin film
FR2525389A1 (en) * 1982-04-14 1983-10-21 Commissariat Energie Atomique METHOD FOR POSITIONING AN INTERCONNECTION LINE ON AN ELECTRIC CONTACT HOLE IN AN INTEGRATED CIRCUIT
FR2550660B2 (en) * 1982-04-14 1987-11-06 Commissariat Energie Atomique IMPROVEMENT IN THE METHOD OF POSITIONING AN INTERCONNECTION LINE ON AN ELECTRIC CONTACT HOLE OF AN INTEGRATED CIRCUIT
FR2537779B1 (en) * 1982-12-10 1986-03-14 Commissariat Energie Atomique METHOD FOR POSITIONING AN ELECTRIC CONTACT HOLE BETWEEN TWO INTERCONNECTION LINES OF AN INTEGRATED CIRCUIT
EP0139549B1 (en) * 1983-08-12 1988-12-28 Commissariat A L'energie Atomique Method for aligning a connecting line above an electrical contact hole of an integrated circuit
EP0511691A3 (en) * 1988-07-13 1993-03-03 International Business Machines Corporation Wet etching of cured polyimide
US6303230B1 (en) 1995-01-17 2001-10-16 Nippon Steel Chemical Co., Ltd. Laminates

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49120504A (en) * 1973-03-16 1974-11-18

Also Published As

Publication number Publication date
DE2618937B2 (en) 1978-06-29
FR2321190A1 (en) 1977-03-11
DE2618937A1 (en) 1977-02-17
JPS5222071A (en) 1977-02-19
DE2618937C3 (en) 1979-02-22
JPS5328342B2 (en) 1978-08-14
FR2321190B1 (en) 1979-08-17
GB1510944A (en) 1978-05-17

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Legal Events

Date Code Title Description
BC A request for examination has been filed
A85 Still pending on 85-01-01
BV The patent application has lapsed