MXPA98000073A - Circuit for control of video entry level in a vi device - Google Patents
Circuit for control of video entry level in a vi deviceInfo
- Publication number
- MXPA98000073A MXPA98000073A MXPA/A/1998/000073A MX9800073A MXPA98000073A MX PA98000073 A MXPA98000073 A MX PA98000073A MX 9800073 A MX9800073 A MX 9800073A MX PA98000073 A MXPA98000073 A MX PA98000073A
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- video
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- input
- control
- signal
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- 230000001276 controlling effect Effects 0.000 claims abstract description 28
- 230000003321 amplification Effects 0.000 claims description 22
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 6
- 230000001105 regulatory Effects 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000001514 detection method Methods 0.000 description 3
- 230000001360 synchronised Effects 0.000 description 2
- 230000001702 transmitter Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000002542 deteriorative Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
Abstract
The present invention relates to a circuit for controlling the video input level in a video display apparatus that can improve the image quality of the video apparatus by selectively controlling the input levels of the input video signals in different ways from video cards of different types of PC so that entry levels are minimal. The circuit includes a video output section for processing signals from an RGB video signal input from a computer, a processing section for detecting whether vertical and horizontal synchronization frequency signals are input from the computer, and generating a control signal from the computer. input level, a screen display section, a video input level control section, the video input level control section generates a contrast control signal according to the input level control signal of the video input level. the processing section, a contrast control section connected to the video input level control section and operable to control a contrast voltage level to adjust the brightness of a video display apparatus according to the signal of contrast control emitted from the video input control section and an amplifier connected to the control section Contrast control and the OSD section, and amplify the RGB video signal input from the video signal output section according to an output of the contra control section
Description
CJ-RCUITO FOR VIDEO INPUT LEVEL CONTROL IN A VIDEO DEVICE
FIELD OF THE INVENTION The present invention relates to a circuit for controlling the video input level in a video device, more particularly to a circuit for controlling the video input level that can improve the image quality of the video recording device. video by selectively controlling the input levels of the video signals introduced in different ways from different types of video cards from a personal computer (PC).
BACKGROUND OF THE INVENTION Figure 1 shows a circuit for conventional video input level control comprising a video input circuit 71 for amplifying a video signal input from a video card mounted on a PC 70 to a predetermined level; a video output amplification section 73 for amplifying the video signal output from the video input circuit 71 to a predetermined output level and outputting the amplified signal to a cathode ray tube (CRT) 72; and a video input level control section 74 for controlling an input level of the video signal input from the video output amplification section 73 to the CRT 72.
The video output amplifier section 73 comprises a regulating transistor
Q1 for regulating the video signal input from the video input circuit 71 and amplification transistors Q2, Q3 to cascade amplify the video signal emitted from the regulating transistor Q1.
A base terminal of the amplification transistor Q2 is connected to a transmitting terminal of the regulating transistor Q1 and the emitting terminal of the amplifying transistor Q2 is connected to the collection terminal of the amplification transistor Q3. The polarization voltages Vccl, Vcc3 are connected to the collector terminal of the transistors Q1, Q2 via the resistors R1, R3. A bias voltage Vcc2 is connected to the base terminal of the amplification transistor Q2, and the CRT 72 is connected to the pickup terminal of the amplification transistor Q3. The resistors R2, R4 are connected to the emitting terminal of the transistors Q1, Q3, respectively.
The video input level control section 74 comprises a detector transistor Q4 connected to the base terminal of the regulating transistor Ql via the resistor R5 to detect abnormalities of the video input level and to amplify by shunt the detected video input level; a thermistor TH1 connected to the base terminal of the detector transistor Q4 to detect the internal temperature of the product; a bypass transistor Q5 connected to the controlling terminal of the detector transistor Q4 to control the emitter voltage level of the amplifying transistor Q3; and a transistor Q6 connected to the collector terminal of the bypass transistor Q5 to control the bypass intervals of the bypass transistor Q5.
The transmitting terminal of the amplification transistor Q3 is connected to the pick-up terminal of the bypass transistor Q5 via the resistor R4, and the pick-up terminal of the transistor Q6 is connected to the emitting terminal of the sense transistor Q4. A capacitor Cl and a resistor Rl 1 are connected in parallel to the emitting terminal of transistor Q6. A bias voltage Vcc4 is connected to the pickup terminal of the sense transistor Q4 by a resistor R7, and the bias voltage Vcc4 is connected to the emitting terminal of the sense transistor Q4 via an RIO resistor to establish a bias voltage level. A resistor rl3 is connected to the base terminal of transistor Q6.
Transistors Q1-Q4 and Q6 are transistors of the NPN type, and transistor Q5 is a PNP-type transistor.
The circuit for control of the conventional video input level constituted as above is indicated as follows: If a video signal is input to the video input circuit 71 from the video card of the connected PC 70, the video input circuit 71 amplifies the video signal input to a predetermined level. Then, the video input circuit 71 inputs the amplified video signal to the base terminal of the regulating transistor Ql of the video output amplifier section. Subsequently, the regulating transistor Ql regulates the input video signal and inputs the regulated video signal to the base terminal of the amplification transistor Q3. The amplification transistor Q3 is then turned on, and the amplification transistor Q2 is turned on subsequently. The video signal is amplified in cascade by these two transistors Q2, Q3 and is input to the CRT 72. The CRT 72 then displays an image conforming to the input video signal.
The video signal of the video input circuit 71 is also input to the base terminal of the sense transistor Q4. Since the standard emitter voltage Ve of the detector transistor Q4 is set to be the bias voltage Vcc4 by means of the RIO resistor, the base voltage Vb = 0.7 + Ve. Therefore, the detector transistor Q4 is turned on only at a voltage greater than the base voltage. In other words, if the input level of the video signal is applied to the CRT 72 as a normal voltage level, for example, 0.7V, the detector transistor Q4 does not turn on. According to the above, neither the bypass transistor Q5 nor the transistor Q6 are turned on, so the transmitter voltage level of the amplifying transistor is never affected.
However, if the input level of the video signal is applied to the CRT 72 at an abnormal level, for example, high, or if an internal temperature of the product increases, the voltage level at the base terminal of the detector transistor Q4 is returns higher than Vb = 0.7 + Ve. In other words, if the internal temperature of the product affecting the video input level increases, the internal resistance of the thermistor TH1 becomes greater, and consequently, the bias voltage Vcc4 at the base terminal of the detector transistor Q4 is returns higher than Vb = 0.7 + Go after passing through thermistor TH1. In another case, if the input level of the video signal input through the video input circuit 71 is greater than the normal level, the video signal is applied to the base terminal at a voltage greater than the base voltage of the video input circuit 71. detector transistor Q4. According to the foregoing, the detector transistor Q4 is turned on since the voltage level of the base terminal becomes higher than the standard voltage level Vb = 0.7 + Be. The bias voltage Vcc4 flowing to the base terminal of the bypass transistor Q5 subsequently changes its flow to the detector transistor Q4. Bypass transistor Q5 is turned on as a consequence.
If the bypass transistor Q5 is turned on, the collector voltage level in the bypass transistor Q5 becomes larger, and the level of the emitter voltage in the collection terminal of the bypass transistor Q5 subsequently becomes higher. As a consequence, the amplification ability of the amplification transistors Q2, Q3 deteriorates, and the video input level applied to the CRT 72 can be controlled automatically.
If the bypass transistor Q5 is turned on, the transistor Q6 turns on subsequently, and controls the operation of the detector transistor Q4. As illustrated in Figure 2A, the detector transistor Q4 recognizes the video signal that is as high as the base voltage as an initial signal, and operates imperfectly during the TI interval, as illustrated in Figure 2B. Transistor Q6 is turned on only while capacitor Cl, which is discharged through resistor Rll having a large resistance value, is charged. While transistor Q6 is turned on, the voltage on the emitter of detector transistor Q4 flows to transistor Q6, thereby lowering the voltage level of the emitter of detector transistor Q4. Therefore, the detector transistor Q4 operates only while transistor Q4 is on. Thus, the ignition interval of the detector transistor Q4 is determined by the capacitor Cl interval. The capacitor interval Cl is short as illustrated by TI in Figure 2C. Accordingly, the output level of the video output to the CRT 72 quickly becomes smaller, and the brightness of the screen can be controlled to be n-one.
The circuit for control of the conventional video input level as the above-constructed is thermally stable and can compensate for the varied portion if the video input level becomes larger than a predetermined level. If the video input level becomes lower than the standard input level due to different types of video cards of the PC 70, the varied portion can not be compensated, thereby excessively saturating the video signal and deteriorating the video signal. screen quality
SUMMARY OF THE INVENTION In order to solve the above problem, an object of the present invention is therefore to provide a circuit for controlling the video input level in a video apparatus that can significantly improve the quality of the display of the apparatus of the invention. video by selectively controlling the input level of the video signal, which is entered in different ways according to the different types of video cards of a PC, to be minimal.
Another object of the present invention is to provide a circuit for controlling the video input level in a video apparatus that can automatically control the video input level without a separate manipulation by the user upon detecting an excessive introduction of the signals Video of the colors red (R), green (G) and blue (B) that are entered in different ways from the PC, and adjust the input level of the video signal and displaying an image on a monitor screen.
To achieve these objectives, the present invention provides a circuit for controlling the video input level in a video display apparatus that includes a video output section for processing signals from an RGB video signal input from a computer, the circuit it comprises a processing section to detect whether horizontal and vertical synchronization frequency signals are input from the computer, and to generate an input level control signal, an on-screen display section
(OSD) connected to the processing section and emit a display signal on the screen, a control section of the video input level, the control section of the video input level generates a contrast control signal according to the signal of control of the input level of the processing section, a contrast control section connected to the control section of the video input level and operable to control a contrast voltage level to adjust the brightness of a display of a display apparatus of video conforming to the contrast control signal output from the video input control section and an amplifier connected to the contrast control section and the OSD section, and amplifying the RGB video signal input from the output section of the video signal according to an output of the contrast control section.
BRIEF DESCRIPTION OF THE DRAWINGS Other objects and advantages of the present invention will become more apparent with reference to the preferred specimens accompanying the drawings, in which: Figure 1 is a block diagram illustrating the circuit for control of the input level of conventional video;
Figures 2A through 2C are diagrams in the form of waves illustrating the waveforms of the detector transistor of the circuit in Figure 1;
Figure 3 is a block diagram illustrating a circuit according to an exemplary of the present invention;
Figure 4 is a table of operational mode illustrating an operational mode of the circuit in Figure 3;
Figure 5 is a block diagram illustrating a circuit according to another exemplary of the present invention; Y
Figures 6A through 6C are diagrams in the form of waves illustrating the shapes of input gain control waves applied to the circuit in Figure 5.
DETAILED DESCRIPTION OF THE PREDILLE EXAMPLES Figure 3 is a block diagram illustrating a circuit according to an exemplary of the present invention.
With reference to Figure 3, the present invention comprises a key introduction section 1 for establishing the operational functions of the monitor system including a function for selecting the level of input of the video signal; a processing section 3 for controlling the operational functions of the monitor system according to the signal for preparing the function of the input section of keys 1, and recognizing the frequency currently introduced by means of the vertical and horizontal inputs Hsi, Vsi introduced from PC 2; an IC OSD 4 for outputting a signal that controls the screen of the selection menu of the input level of video input through the terminals of a serial clock (SCL) and serial data (SDA) of the process section 3; a section for controlling the video input level 5 for controlling an input level of the video signal according to the logic control signals input from the video level control terminals VL1, VL2 of the process section 3; a contrast control section 6 for controlling the level of the contrast voltage conforming to the control signal of the video input level of the section for controlling the video input level 5 to control the brightness of the monitor screen (not illustrated in the drawings); an output section of the video signal 7 for processing the signals R, G, B of the video signals input from the PC 2; a preamplifier section 8 for amplifying the color video signals R, G, B input from the output section of the video signal 7 by a predetermined amplification factor according to the contrast control signal from the contrast control section 6; and an amplifying section of the video output 10 for amplifying the output of the color video signals input from the preamplifier section 8, and displaying the amplified color video signals on a
CRT 9.
The section for controlling the video input level 5 is connected to a transistor ql, which is connected to the output terminal VL1 of the processing section 3 via a resistor R1 for emitting a logic signal and a transistor Q2, which is connected to the output terminal VL2 of the processing section 3 via a resistor R3 to emit a logic signal. The section for controlling the contrast 6 is connected to each collecting terminal of the transistors Ql, Q2 via the resistors R2, R4. A capacitor Cl is connected between a base terminal of the transistor Ql and the resistor R1, and a capacitor C2 is connected between a base terminal of the transistor Q2 and the resistor R3.
The operation of the present invention in accordance with the example constituted above will now be explained with reference to Figures 3 and 4.
If a video signal is input to the output section of the video signal 7 from a video card of the PC 2, and if synchronized vertical and horizontal frequency signals are input to the process section 3 simultaneously, the The signal output of the video signal 7 processes the signal R, G, b of the video signal to the pre-amplifier section 8. In this step, the processing section 3 detects whether the synchronized horizontal and vertical frequency signals Hsi, Vsi are input from the PC 2. The processing section 3 simultaneously detects whether a function establishment signal that establishes a function for selecting the video input level is input from the input section with keys 1 through a digital analog converter (ADC).
If the signal establishing a function of selecting the video input level has been entered from the input section with keys 1, the controller section 3 inputs the signal that controls the selection menu of the video input level to OSD IC 4 via SDA and SCL. The OSD IC 4 introduces the signal that controls the screen of the selection menu of the video input level to the preamplifier section 8 through the output terminals Ro, Go, Bo, Fo according to the selection menu of the input level of video input from the video signal output section 7 according to the control signal entered from OSD IC 4, and enter the signal from the video input level selection menu screen only after using it. The amplification section of the video output 10 amplifies the signal of the screen of the selection menu of the video input level to a predetermined output level, and displays the signal in the
CRT 9.
The user then sets the video input level through the input section with keys 1 when referring to the CRT 9 video input level selection menu screen. If the user has set "MODE VL = 0" through the input section with keys 1 as shown in Figure 4, the processing section 3 applies a "low" signal to the control section of the video input level 5 via the output terminals VL1 and output VL2 . The transistors Ql, Q2 of the video input level control section 5 are subsequently turned off, and the contrast control section 6 inputs the video level as it is output from a CONT terminal of the processing section 3 to a V_CNT terminal. of the preamplifier section 8. The preamplifier section 8 amplifies the video signal to be at the video input level as it is input to the terminal V_CNT to the video output amplification section 10.
Meanwhile, if the user has set "MODE VL = 1" in the screen of the selection menu of the video input level, the processing section 3 emits a "low" signal through the output terminal VL1 and a signal " high "through the output terminal VL2 to the transmitters Ql, Q2, respectively, of the control section of the video input level 5. The transistor Ql of the section for control of the video input level 5 is subsequently turned off , while transistor Q2 turns on. Thus, the output voltage of the section for contrast control 6 is lowered as much as the video level as "MODE VL = 1" by means of the resistance R4, and is then input to the preamplifier section 8.
If the user has set "MODE VL = 2" on the screen of the selection menu of the video input level, the processing section 3 emits a "high" signal through the output terminal VL1 and a "low" signal to the output terminal VL2 to the transistors Ql, Q2, respectively. The transistor Ql of the section for control of the video input level is turned on subsequently, while the transistor q2 is turned off. Therefore, the output voltage of the contrast control section 6 is lowered as much as the video level as "VL MODE = 2" by means of the resistance E2, and is then input to the preamp section 8.
If the user has set "MODE VL = 3" on the screen of the selection menu of the video input level, the processing section 3 emits "high" signals only through the output terminals VL1, VL2 to the Ql transistors, Q2, respectively, of the control section of the video input level. Subsequently, both transistors Ql, Q2 of the video input level control section 5 are turned on, and transistors Ql, Q2 input the voltage emitted from the contrast control section 6 to the pre-amplification section 8 after lowering the voltage as much as it is divided through the resistors R4 and R2.
In other words, the contrast control section adds or reduces the output voltage of the contrast control to the preamp section 8 according to the signal for control of the video input level of the section to control the input level of the video 5. Then, the preamplifier section 8 amplifies the video signal with brightness of the controlled display, and inputs the amplified video signal to the video output amplifier section 10. The video output amplification section 10 subsequently amplifies the video signal input at a predetermined amplification factor, and displays the amplified video signal on the CRT 9.
Since the input level of the video signal can be controlled selectively, the excessive saturation of video color signals or the change in brightness of the monitor screen generated due to different types of PC video cards 2 It can improve.
Figure 5 shows a circuit for controlling the video input level according to another example of the present invention.
With reference to Figure 5, the present invention comprises a video signal emission section 7 for processing the signals R, G, B of the video signal inputted from the PC 2; a preamplifier section 8 for amplifying the color video signals input from the video signal output section 7 at a predetermined pre-amplification factor; a video broadcast amplifier section 10 for amplifying the output of the color video signal input to the preamp section 8, and displaying the amplified video signal on the CRT 9; a section for controlling the contrast 6 connected to the terminal V_CNT to control the level of the contrast voltage to control the brightness of the monitor screen (not illustrated in the drawings); a signal comparison section 11 for each of the color video signals R, G, B emitted from the output section of the video signal 7 with preset standard voltages, and output the compared signals; a level detector section 12 for detecting excessive saturation of video signals by means of the compared signals emitted from the signal comparison section 11; and a section for level control
13 for controlling the contrast control section 8 according to the input gain level of the color signals R, G, B detected by the level detection section 12 for controlling the input levels of the video signals.
The signal comparison section 11 comprises a first comparator 14 connected to the color video output terminal R of the video signal output section 7 for comparatively emitting the video color signal R according to a standard voltage Vrefl.; a second comparator 15 connected to the color video output terminal G of the output section of the video signal 7 for comparatively outputting the color video signal G according to a standard voltage Vre £ 2; and a third comparator 16 connected to the color video output terminal B of the output section of the video signal 7 for comparatively outputting the color video signal B according to a standard voltage Vref3.
The standard voltage Vrefl divided between the resistors Rl and R12 is connected to the non-reverse terminal of the first comparator 14, and the standard voltage Vref2 divided between the resistors R13 and R14 is connected to the non-inverting terminal of the third comparator 16. The voltages of polarization Vccl, Vcc2, Vcc3 are connected to the other terminals of the resistors R12, R14, R16, respectively.
The present invention according to the previous example operates as follows:
If a video signal is input to the output section of the video signal 7 from a video card of the PC 2, the output section of the video signal 7 processes the signals
R, G, B of the input video signal and input the video signal processed into signals to the preamp section 8.
The color signals R, G, B of the output section of video signals 7 are input to the comparators 14, 15, 16, respectively, of the signal comparison section 11. In other words, the color video signal R of the video signal output section 7 is input to the reverse terminal of the first comparator 14. The first comparator subsequently compares the color video signal R with the standard voltage Vrefl divided by the resistors Rll and R12. If the color video signal R introduced is compared as less than the standard voltage Vrefl as a result of the comparison by means of the first comparator 14, a "high" signal is emitted. If it is compared as greater than the standard voltage Vrefl, a "low" signal is introduced to the level detector section 12.
Simultaneously, the color video signal G of the output section of the video signal 7 is input to the reverse terminal of the second comparator 15. The second comparator 15 simultaneously compares the color video signal G with the standard voltage Vref2 divided between resistors R13 and R14. If the color video signal G is smaller than the standard voltage Vref2 as a result of the comparison of the second comparator 15, a "high" signal is emitted. If it is higher than the standard voltage Vref2, a "low" signal is input to the level detector section 12.
Simultaneously, the color video signal B of the output section of the video signal 7 is input to the reverse terminal of the third comparator 16, and the third comparator
17 compares the color video signal B introduced with the standard voltage Vref3 divided by the resistors R15 and R16. If the color video signal B proves to be lower than the standard voltage Vref3 as a result of comparison by the third comparator 16, a "high" signal is emitted. If the color video signal B introduced shows to be higher than the standard voltage Vref 3, a "low" signal is introduced to the level detector section
12.
Thus, the level detector section 12 detects logic signals according to the input level of the video signals R, G, B input from the first to third comparators 14, 15, 16 and detects whether the video input level currently issued CRT 9 becomes excessively saturated. If the level detection section 12 detects that the video signals emitted by the comparators from the first to the third 14, 15, 165 are all "high", this means that the output level of the video signal is input to normal state. Therefore, a waveform illustrated in Figure 6C, which does not require gain control, is input to the contrast control section 6. If the level detector section 12 detects that any of the video signals emitted by the comparators from the first to the third 14, 15, 16 are "low", this means that the input level of the video signal is excessive as illustrated in Figure 8 A. Then, the level detector section 12 introduces the signals of video detected to the section for control of levels 13. The section for control of levels 13 subsequently introduces an amplitude of adjustment W of the video signal to be adjusted in accordance with the control signal detected by the level detecting section., i.e., a control signal adjusting the gain level of the brightness and excessive saturation waveforms, to the section for controlling the contrast 6. Then, the contrast control section 6 varies and adjusts in a manner The contrast voltage level set in the preamp section 8 conforms to the elastic member of the control signal for adjusting the input gain level inputted through the V_CNT terminal of the preamplifier section 8. The preamp section 8 amplifies the Subsequently the R, G, B signals of the video signal, the level of the contrast voltage that has been adjusted, as illustrated in Figure 6B, and displays the amplified signals on the CRT
9 through the video output amplification section.
According to the preferred specimens of the present invention such as those described herein, the image quality of a video apparatus can be significantly improved by selectively controlling the input levels of the video signals introduced in different ways according to the different types of video cards on a PC to be at optimal input levels. The present invention therefore allows automatic control of the video input levels without separate manipulation by the user through comparators that may produce excessive saturation of the R, G, B color video signals, introduced in different ways from the PC and adjust the input gain level of the video signal as a result of the detection to display a resulting image on a monitor screen.
Claims (4)
- CLAIMS: 1. A circuit for controlling the video input level in a video display device that includes a video signal output section for signal processing of an RGB video signal input from a computer, the circuit comprising: processing section to detect if vertical and horizontal synchronization frequency signals are input from the computer, and generate an input level control signal; an on-screen display section (OSD) connected to the processing section and emit a display signal on the screen; a control section of the video input level, the video input level control section generates a contrast control signal according to the input level control signal of the processing section; a contrast control section connected to the video input level control section and operable to control a contrast voltage level to adjust the brightness of a display of a video display apparatus conforming to the contrast control signal issued from the video input control section; and an amplifier connected to the contrast control section and the OSD section, and amplifying the RGB video signal input from the video signal output section according to an output of the contrast control section.
- 2. A video input level control circuit of Claim 1, wherein the processing section generates the input level control signal through first and second output terminals, and the section for video input level control it includes first and second transistors respectively connected to the first and second output terminals for emitting logic signals, the co-transistor terminals of the transistors are connected to the section for control of the contrast.
- 3. A circuit for controlling the video input level in a video display apparatus including an amplification section for amplifying RGB video signals containing red, green and blue signals and input from a video signal output section , the circuit comprises: a section for contrast control connected to an amplifier input to control the voltage level of the contrast to adjust the brightness of a display of the video display apparatus; a signal comparison section for comparing each of the RGB video signals emitted from the output section of video signals with pre-established standard voltages and outputting the compared signals; a level detector section for detecting excessive saturation of the RGB video signals based on the compared signals output from the signal comparison section; and a section for level control having an input connected to the level detector section and an output connected to the section for contrast control, the section for control of levels control the section for contrast control according to a gain level of input of the RGB video signals detected by the level detector section.
- 4. A circuit for video input level control of Claim 1, wherein the signal comparison section comprises: a first comparator connected to the video output terminal R of the video signal output section to output the signal R-color video after comparison with a standard voltage Vrefl; a second comparator connected to the video output terminal G of the video signal output section for outputting the color video signal G after comparison with a standard voltage Vref2; and a third comparator connected to the video output terminal B of the video signal output section for outputting the color video signal B after comparison with a standard voltage Vref3. EXTRACT OF THE INVENTION A circuit for controlling the video input level in a video display apparatus that can improve the image quality of the video apparatus by selectively controlling the input levels of video signals input in different ways from video cards. video of different types of a PC so that entry levels are minimal. The circuit includes a video output section to process signals from an RGB video signal input from a computer, a processing section for detecting whether horizontal and vertical synchronization frequency signals are input from the computer, and generating an input level control signal, an on-screen display section (OSD) connected to the processing section and emitting a signal On screen display, a control section of the video input level, the control section of the video input level generates a contrast control signal according to the input level control signal of the processing section, a section contrast control connected to the control section of the video input level and operable to control a contrast voltage level to adjust the brightness of a video display apparatus according to the contrast control signal issued from the video input control section and an amplifier connected to the contrast control section and the OSD section, and amplific The RGB video signal input from the video signal output section conforms to an output of the contrast control section.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960076827 | 1996-12-30 | ||
KR1019970031282 | 1997-07-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
MXPA98000073A true MXPA98000073A (en) | 1999-02-24 |
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