MXPA97000586A

MXPA97000586A - Plasma reactor inductively coupled process to manufacture a semiconduc device

Info

Publication number: MXPA97000586A
Application number: MXPA/A/1997/000586A
Authority: MX
Inventors: J Hartig Michael; C Arnold John
Original assignee: Motorola Inc
Priority date: 1996-02-22
Filing date: 1997-01-22
Publication date: 1997-08-01

Abstract

The present invention relates to a method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing an inductive coaxial multiple coil coupled to the plasma reactor, having a reaction chamber, a tool holder sleeve placed in the chamber Reaction and configured to support and accept a wafer or simiconductor contact plate on a surface thereof, a plasma source mounted within the reaction chamber in spaced relationship with the tool sleeve, the plasma source includes a plurality of channels, each The channel has a gas orifice opening thereto, a gas plenum, and an RF coil surrounding the channel, wherein each gas orifice provides a passage between the channel and the gas plenum, and the plurality channels are arranged concentrically around a central axis perpendicular to the surface of the tool sleeve; independent gas supply coupled to each gas orifice, and a gas control system capable of independently charging each gas supply line with a plasma forming gas, such as a gas composition and a gas flow rate of the plasma forming gas in each gas supply line, can be independently varied, the placement of a wafer or contact plate on the tool sleeve, the semiconductor wafer has a layer of material to be etched; actuation of the gas control system to charge the plasma reactor with the plasma-forming gas, the application of RF energy to the RF coils and the ignition of a plasma in the reaction chamber; material, where etched etching is characterized by uniformity of etched etching, and control of etch uniformity by adjusting gas flow velocity and composition of the g

Description

PLASMA REACTOR INDUCTIVELY COUPLED AND PROCESS TO MANUFACTURE A SEMICONDUCTOR DEVICE FIELD OF THE INVENTION This invention relates in general to plasma process technology and more particularly to inductively coupled plasma systems and associated deposition and ordentate processes. BACKGROUND OF THE INVENTION As semiconductor device technology grows in complexity, more and more device functions are incorporated into smaller and smaller device geometries. Device manufacturers require sophisticated processing devices to meet the demands for the manufacture of ultra-large-scale integration devices for high precision devices (ULSI = ultra-large-scale-integrated). However, the processing costs, correspondingly increase with the complexity of the processing equipment, and the equipment becomes more expensive to acquire and maintain. To meet the increased production costs, manufacturers increase the size of the semiconductor substrates on which integrated circuit devices are formed. By increasing the substrate size, the production cost of the unit can be reduced. At present, semiconductor chips that have diameters of 20.32 cm (8 inches) or more are common in state-of-the-art manufacturing facilities.

REF: 23824 While increased microplate diameters have allowed manufacturers to produce large quantities of devices on a single substrate, it can be extremely difficult to control the uniformity of manufacturing processes applied to large diameter semiconductor chips. In the process of plasma etching, many factors can impact the uniformity of etching a layer of material deposited on the surface of a semiconductor chip. These factors include the uniformity of plasma, the uniformity of ion flux on the surface of the chip, the supply of reactive gas to the etching system and the removal of reaction products across the surface of the chip. Traditional plasma etching reactors are designed primarily with an energy source, where the plasma and an injection point are created to introduce the process gases. By limiting the system to a simple energy source and gas supply, the ability of the etching systems to optimize the uniformity of the etching speed of the process through a large diameter icroplaguette is very small. For example, there is virtually no way in which the etching process is spatially varied across the surface of the semiconductor chip. Additionally, plasma etching systems are typically provided with a processing chamber having a fixed component assembly. Because the camera design can affect the etching characteristics of specific thin film materials commonly used in semiconductor manufacturing, the particular camera assembly dictates that the etching system must be limited to biting only one type or only a few. different types of material. Advanced etching technology, such as electron-cyclotron resonance-etched (ECR = electron-cyclotron-resonance) and plasma-coupled-inductively etched (ICP = inductively-coupled-plasma) has been developed to bite semi-conductor devices that They have extremely small characteristic sizes. These systems operate a. A much lower pressure than diode systems, however are able to generate a plasma. high density Systems such as ECR and IPC etching systems also offer an advantage over conventional diode etching systems by eliminating the exposure of the semiconductor substrate to high electric fields. By uncoupling the substrate from the plasma generating elements of the reactor, ion transport efficiency and ion anisotropy can be improved resulting in greater process control. In plasma deposition technology, there are similar limitations of uniformity as the microplate diameters increase. Usually, better deposition uniformity is achieved at extremely low operating pressures. However, at low pressure, high density plasmas are required to deposit a thin film layer on a large diameter substrate having a uniform thickness. At present, neither plasma etching systems nor plasma deposition systems offer any means to spatially vary plasma, to achieve uniformity of deposition and etching with large diameter semiconductor substrates. Accordingly, further development of the reactor design technology and etching process is necessary to uniformly etch layers of material superimposed on large diameter semiconductor chips. SUMMARY OF THE INVENTION In practicing the present invention, an inductively coupled plasma reactor and a process is provided either to etch or deposit a layer of material using the inductively coupled plasma reactor. The plasma reactor of the invention contains a plasma source of multiple coaxial coils, mounted within a reaction chamber. The plasma source is in spaced relationship with a dish configured to accept and support a semiconductor chip. The plasma source includes a plurality of channels, each channel having an independently controlled gas supply and an independently controlled RF (radio frequency) coil surrounding the channel.

In operation, a semiconductor chip is placed on the platter and a gas control system is operated to charge the reactor with plasma forming gas. Energy of RF is applied to the independent RF coils and the plasma is turned on inside the camera. The material layer is mordant while the etching uniformity is controlled by adjusting the RF energy and frequency in the coil surrounding each channel, and the gas flow expense and gas composition emerging from each channel within the source of plasma. In the same way, a layer of material is deposited on a substrate, while spatially controlling the density and composition of the plasma. Highly precise and uniform deposition and etching are obtained by independently controlling the plasma density and composition in correspondence with the radial distance on the surface of a semiconductor chip. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic diagram of an inductively coupled plasma reactor, arranged according to one embodiment of the invention; Figure 2 illustrates a cross sectional portion of a plasma source disposed according to the invention; Figure 3 illustrates a top view of a gas plenum suitable for supplying the process gases to the plasma source of the invention; Figure 4 illustrates in cross section, an alternate embodiment of a plasma source employed in the inductively coupled plasma reactor illustrated in Figure 1; Figure 5 illustrates in cross-section, a further embodiment of a plasma source employed in the inductively coupled plasma reactor shown in Figure 1; Figure 6 illustrates a top view of a generalized presentation of a semiconductor chip; and Figure 7 illustrates in cross-section, a portion of a semiconductor wafer having a layer of superposed material to be etched in the inductively coupled plasma reactor of the invention. It will be appreciated that for simplicity and clarity of illustration, the elements illustrated in the FIGURES are not necessarily drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to each other. In addition, when considered appropriate, reference numbers have been repeated between the FIGURES to indicate corresponding elements.

DETAILED DESCRIPTION OF PREFERRED MODALITIES The present invention is for an inductively coupled plasma reactor, wherein the density and composition of plasma can be spatially varied within the plasma reactor. To achieve a spatial variance in plasma density and composition, a coaxial multi-coil inductive plasma source having a variable number of recessed channels is provided. Each channel is surrounded by an independently energized RF coil and contains a process gas orifice. Mechanisms for gas control are provided, such that the flow expense of process gas and composition can be varied independently in each channel within the plasma source. The present invention also contemplates a process in which a layer of material is deposited or biting. In the etching process, the semiconductor chip is placed in a dish mounted within the plasma reaction chamber. The plate is mounted in spaced relationship with the plasma source, such that the center of the semiconductor chip is opposite the center channel in the plasma source. By placing the semiconductor chip relative to the configuration of the plasma source channel, the density and variable plasma composition generated by the plasma source results in localized control of the etching rate through the semiconductor chip. In this way, the etching speed of a layer of material that overlays a semiconductor chip, it can be varied independently through the diameter of the semiconductor chip. In the deposition process, the semiconductor chip is placed on the plate, and a layer of material is deposited on the semiconductor chip. The positional correspondence with the plasma source allows a layer of uniformly thick material to be deposited by varying the density and composition of plasma through the diameter of the semiconductor chip. Through the localized control of the composition and flow rate of process gas, together with the localized control of the density and frequency of RF energy, the inductively coupled plasma reactor of the invention allows an improved degree of control of parameters of process during a etching process. In addition, the process and reactor of the invention provide a means for high precision control of mordanting rates or deposition thickness of the layers of materials overlying large diameter substrates. Accordingly, semiconductor microplates having large diameters can be processed uniformly through the localized plasma density control that is provided by the present invention. An ICP reactor 10 is illustrated in Figure 1. The inductively coupled plasma reactor 10 includes a processing chamber 12 housing a plate 14. A plasma source 16 resides in an upper portion of the processing chamber 12 in a ratio space opposite to the dish 14. The processing chamber 12 is supplied with RF energy from a system for RF supply 18. As will be described subsequently, the RF energy supply system 18 contains a plurality of RF power supply generators. independent, each capable of operating at an independent energy level and frequency. The processing chamber 12 is also provided with process gases from a gas supply system 20. As will be described subsequently, the gas supply system 20 is capable of providing processing gas to the processing chamber 12 in power lines of multiple independent gas. Vacuum pressure inside the processing chamber 12 is controlled by the vacuum system 22. Reaction products and process gases are removed from the processing chamber 12 through the vacuum panel 24, which in a preferred assembly, resides in the processing chamber 12 below the plate 14 and is coupled to the vacuum line 26. Those skilled in the art will appreciate that other processing chamber designs are possible and that different vacuum gate assemblies are possible. In addition, plate temperature control 14 can be provided by a cooling system (not shown). Either gas or coolant can be transported through cooling channels embedded in plate 14.

In operation, a semiconductor wafer 28 is placed in the platen 14 and process gases are introduced into the processing chamber 12 of the gas supply system 20. A desired vacuum pressure is obtained inside the processing chamber 12 by the system vacuum 22 and RF energy is applied from the system for RF energy supply 18 by lighting a plasma 30. In the case of plasma etching, the bombardment energy of the ionized species within the plasma 30 on the semiconductor microplate 28, is controlled additionally by applying an RF shunt to the dish 14 from the RF shunt power supply 32. As illustrated in Figure 1, the plasma source 16 contains numerous channels, with each channel supplied by separate gas supply lines 34 , 35 and 36. Figure 2 illustrates a portion of plasma source 16 in exploded cross-sectional view. The gas supply line 36 supplies the central channel 38 through an inner gas plenum 40. A gas orifice 42 provides communication between the central channel 38 and the interior gas plenum 40. Similarly, the supply line of gas 35 provides process gases to the first channel 44 through an external gas plenum 46. Process gases are distributed to the central channel 38 and first channel 44 through a circular plenum 48 stage, illustrated in top view in Figure 3. The plenum chamber cover 50 houses the interior gas plenum chamber 40 distributing gas to the central channel 38. Correspondingly, the plenum chamber cover 52 distributes gas to the exterior gas plenum 46. The gas line Gas feed 36 is connected to the plenum chamber cover 50 in a central portion thereof. The gas feed line 35 can be connected to the plenum chamber cover 52 in numerous places, as illustrated in Figure 3. Similarly, the gas orifice 43 is provided in numbers around the circular geometry of the first channel 44. As illustrated in Figures 2 and 3, the first channel 44 is concentric with respect to the center channel 38. In one embodiment of the present invention, additional channels within the plasma source 16 are also arranged concentrically with respect to the center channel 38 and the first channel 44. For example, the outermost channel illustrated in Figure 1 is concentric with respect to the first channel 44. By successive concentric arrangement, numerous channels can be configured within the plasma source 16, depending on the spatial control of the desired degree of plasma 30. As illustrated in Figure 2, a central RF coil 54 encircles the central channel 38. Additionally, a first RF coil 56 encloses the first channel 44. Both of The central RF coil 54 as the first RF coil 56 is independently controlled by the system for RF energy supply 18. Each RF coil can supply an independent energy level and RF frequency to the process gases within the circumscribed channel. The RF coils 54 and 56 are separated from the process gases within each channel by a dielectric housing 58. The electrical current that runs through the RF coils inductively couples with species of processing gas to ignite a plasma within each channel. Those skilled in the art will recognize that by independently energizing each RF coil and independently supplying each channel with process gases, the density and plasma composition in each channel within the plasma source 16 can be independently adjusted. Although the channel design The concentricity of the plasma source 16 provides a degree of substantial control by which the density and composition of plasma can be varied locally, additional embodiments of an ICP reactor designed in accordance with the invention are illustrated in Figures 4 and 5. Plasma conditions experienced by the semiconductor chip 28 can be further controlled by varying the separation distance between portions of the plasma source 16 and the surface of the semiconductor chip 28. As illustrated in Figure 4, the center channel 38 is in proximity immediately to the semiconductor chip 28, while the first channel 44 is vertically separated from the semiconductor chip 28.

An alternate configuration is illustrated in Figure 5. In this embodiment of the invention, the central channel 38 is vertically separated from the semiconductor chip 28 by a greater distance than the first channel 44. By varying the vertical separation distance between components of the source of plasma 16 and the semiconductor chip that is ordered, an additional degree of control is provided to vary the plasma conditions across the surface of the semiconductor chip. In addition, variable plasma conditions can be combined with varying degrees of RF shunt applied to the dish 14 to allow more precise control of ion bombardment on the semiconductor chip 28. In a further embodiment of the invention, RF shields are placed outside of each coil in the plasma source 16. As illustrated in Figure 5, a central RF shield 60 surrounds the central RF coil 54 and a first RF shield 62 surrounds the first RF coil 56. The RF shields 60 and 62 minimize RF interference between the coils energized independently in the plasma source 16. The RF shields can be constructed from a conductive material such as aluminum or alternatively a high permeability ferromagnetic material such as a ferrite material. Through the selection of suitable construction materials, the RF shields 60 and 62 can improve the magnetic field within each channel by confining the magnetic field to the immediate region of the surrounding RF coils. Although shields 60 and 62 are illustrated in the particular ICP reactor embodiment illustrated in Figure 5, those skilled in the art will appreciate that shields 60 and 62 can similarly be incorporated into any of the plasma source configurations contemplated by the invention. present invention. The process control capability of the ICP reactor of the invention as applied to the etching of a layer of material in a semiconductor substrate will now be described. In Figure 6, a generalized illustration of the semiconductor chip 28 is presented in top view. The semiconductor chip 28 has a generally circular geometry characterized by a radius "R" and a perimeter "P". The semiconductor chip 28 can be further characterized by a plurality of locations 64 placed on the surface of the semiconductor chip 28 and specified by a radial distance. The radial distance varies from zero to the radial distance of the perimeter P. Figure 7 illustrates in cross section a portion of semiconductor chip 28. A layer of material 66 superimposes the surface of the semiconductor chip 28. The process of the present invention It contemplates the separation of many different types of materials commonly used in the manufacture of integrated circuit devices. For example, the material layer 66 may be a semiconductor material such as polycrystalline silicon, or a refractory metal silicide or the like. Additionally, the material layer 66 can be a conductive material such as aluminum, aluminum in silicon alloy, aluminum in silicon and copper alloy, elemental copper and the like. In addition, the material layer 66 can be a dielectric material, such as silicon dioxide, silicon nitride, silicon oxynitride, boron oxynitride and the like. In practicing the present invention, material layer 66 is a semiconductor material, halogen and halogenated process gases, such as chlorine, hydrogen chloride, chlorinated halocarbons, fluorine and flucorous compounds, chlorofluorocarbons, bromine, hydrogen bromide, iodine, iodide. of hydrogen and the like and their mixtures can be used to etch the material. Also, when the material layer 66 is a dielectric material, they can be used to etch the material, fluorine, hydrogen fluoride, fluorinated halocarbons and the like and mixtures thereof. When the material layer 66 is a conductive material, processing gases may include fluorinated compounds together with chlorine and chlorinated boron compounds. In order to carry out etching of the material layer 66, the semiconductor chip 28 is placed in the plate 14 of the ICP reactor 10, such that the central point denoted "C" in FIGS. 6 and 7, that approximately aligned in the direction vertical with the central channel 38 in the plasma source 16. Before the positional alignment of the semiconductor chip 28 with the concentric channels of the plasma source 16, the etching rate located at the sites 64 through the semiconductor substrate 28, can independently controlled by the spatially variant plasma conditions generated by the plasma source 16. In this way, radial control of the etching speed of the material layer 66 is achieved, such that the layer of material 66 in proximity to the perimeter P is simultaneously etched with portions of the material layer 66 at the central point C, and at the various sites 64 through the semiconductor chip 28. In In the case of plasma deposition, a layer of material, such as the layer of material 66, is deposited on the semiconductor chip 28. For deposition, processing gases are introduced into the processing chamber 12 of the gas supply system 20 which will carry out a plasma induced reaction and will form a thin film layer in the semiconductor chip 28. For example, when a semiconductor material such as polycrystalline silicon is to be deposited, a silicon-containing gas such as silane, or silane is introduced. halogenated such as dichlorosilane. When a dielectric material such as silicon dioxide or silicon nitride is to be deposited, a process gas such as tetraethyoio-silane (TEOS), halogenated silane and ammonia and the like can be introduced. In addition, a refractory metal or refractory metal silicide material and the like can be deposited by introducing a gas containing refractory metal. Those skilled in the art will appreciate that the foregoing is only a representative description of many different processing gases that can be employed by the present invention, either to etch or deposit a layer of material in the ICP reactor 10. The present invention contemplates deposition and etching of any and all materials capable of forming in an ICP reactor. To carry out the deposition of material layer 66, the semiconductor chip 28 is placed on the plate 14 of the ICP reactor 10, such that the central point denoted "C" in Figures 6 and 7 is approximately aligned vertical with the central channel 38 in the plasma source 16. Before the positional alignment of the semiconductor chip 28 with the concentric channels of the plasma source 16, the deposition rate located at the sites 64 through the semiconductor substrate 28, can independently controlled by the spatially variant plasma conditions, generated by the plasma source 16. In this way, radial control of the deposition rate of the material layer 66 is achieved, such that the portions of the layer of material 66 in proximity to the perimeter P, are formed simultaneously with the positions of the material layer 66 at the central point C, and at the diverse site 64 through the semiconductor chip 28. It is considered that a person skilled in the art can, without further elaboration, practice the present invention and fully achieve the operational advantages of the present invention. Accordingly, the following examples are intended merely as illustrative of the invention and not to limit the invention in any way. EXAMPLE I The semiconductor substrate 28 is first subjected to a chemical vapor deposition process to deposit a layer of material 66 thereon. The semiconductor substrate 28 is then placed in the plate 14 in the ICP reactor 10. The process gas is chosen depending on the composition of the layer of material that is, it will bite. For example, when the layer of material 66 is polycrystalline silicon, halogen gases, such as chlorine, hydrogenated halogen gases such as hydrogen chloride and hydrogen bromide, are introduced together with an inert gas diluent. The total gas flow of the gas supply system 20 is adjusted to a value between 40 and 200 sccm and the vacuum system 22 is adjusted to achieve an approximate processing pressure of 1 to 10 millitor in the processing chamber 12. Energy RF is then applied from the system for RF energy supply 18 to the RF coils 54 and 56 in the plasma source 16. Preferably, approximately 100 to 5000 watts of RF are applied to the RF coils 54 and 56. In addition, approximately RF from 0 to 5000 watts is applied to the plate 14 of the RF 32 RF power supply. Plasma etching of the material layer is then carried out to complete. EXAMPLE II The semiconductor substrate 28 is placed in the plate 14 in the ICP reactor 10. The processing gas is chosen depending on the composition of the layer of material to be deposited. For example, when the layer of material 66 is epitaxial silicon, hydrogen and silane are introduced into the processing chamber 12, at a flow rate of about 3: 1. The total gas flow of the gas supply system 20 is adjusted to an approximate value of 40 sccm and the vacuum system 22 is adjusted, to achieve a processing pressure of approximately 1 to 25 millitorrs in the processing chamber 12. Energy The RF signal is then applied to the system for supplying RF energy 18 to the RF coils 54 and 56 at the plasma source 16. Preferably, approximately 500 to 1500 watt RF is applied to the RF coils 54 and 56 at a frequency of approximately 13.56 MHz. In addition, approximately 0 to -60 volts DC are applied to the plate 14, while the plate 14 is maintained at a temperature of approximately 400 to 700 ° C. The plasma deposition of the material layer is carried abo to termination. Thus, it is remarkable that, in accordance with the invention, an inductively coupled plasma reactor and a process for etching a layer of material have been provided, which fully meet the above-stated advantages. Although the invention has been described and illustrated with reference to specific illustrative embodiments thereof, it is not intended that the invention be limited to those illustrative modalities. Those skilled in the art will recognize that variations and modifications can be practiced without departing from the spirit of the invention. For example, the present invention contemplates the etching of layers of material having a lithographic pattern previously defined for the purpose of creating various device structures, such as gate electrodes, electrical contacts, electrical interconnections and the like. In addition, the invention contemplates the use of many different types of chemical agents for the deposition or etching of a wide variety of materials used to form thin film layers in semiconductor devices. Therefore, it is intended to include within the invention all these variations and modifications that fall within the scope. of the appended claims and their equivalents. It is noted that in relation to this date, the best method known by the applicant to carry out the aforementioned invention, is the conventional one for the manufacture of the objects to which it relates. Having described the invention as above, the content of the following is claimed as property:

Claims

CLAIMS 1. A method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing a plasma reactor, the plasma reactor has a first plasma generation region and a second plasma generation region, the first generation region of plasma has a perimeter wherein the second plasma generation region surrounds the perimeter of the first plasma generation region; placing a semiconductor substrate inside a plasma reactor; using the first plasma generation region and the second plasma generation region, to generate a plasma within the plasma reactor; and processing the semiconductor substrate in the plasma reactor using the plasma. A method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing a plasma reactor, the plasma reactor having a first plasma generation region and a second plasma generation region, wherein the first region of plasma generation and the second plasma generation region are concentric, the first plasma generation region is energized by a first power supply and the second plasma generation region is energized by a second power supply; placing a semiconductor substrate inside the plasma reactor; use the first plasma generation region and the second plasma generation region to generate a plasma within the plasma reactor; and processing the semiconductor substrate in the plasma reactor using the plasma. 3. A method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing a plasma reactor, the plasma reactor having a first plasma generation region and a second plasma generation region, wherein the first region of plasma generation and the second plasma generation region are concentric, the first plasma generation region is energized by a first power supply and the second plasma generation region is energized by a second power supply; placing a semiconductor substrate inside the plasma reactor, the semiconductor substrate has a layer of material on top; using the first plasma generation region and the second plasma generation region, to generate a plasma within the plasma reactor; and etching the layer of material using the plasma. 4. A method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing a plasma reactor, the plasma reactor having a first plasma generation region and a second plasma generation region, wherein the first region of plasma generation and the second plasma generation region are concentric, the first plasma generation region is energized by a first power supply and the second plasma generation region is energized by a second power supply; placing a semiconductor substrate inside the plasma reactor; using the first plasma generation region and the second plasma generation region, to generate a plasma within the plasma reactor; and depositing a layer of material on the semiconductor substrate using the plasma. A method for manufacturing a semiconductor device, characterized in that it comprises the steps of: providing an inductively coupled plasma reactor, the inductively coupled plasma reactor has a first plasma generation region and a second plasma generation region, wherein the first plasma generation region and the second plasma generation region are concentric, the first plasma generation region is energized by a first power supply and the second plasma generation region is energized by a second supply of energy The first plasma generation region has a first gas supply comprising a first gas flow expense and a first gas composition and the second plasma generation region has a second gas supply, comprising a second expense of gas flow and a second gas composition; placing a semiconductor substrate inside the inductively coupled plasma reactor; using the first plasma generation region and the second plasma generation region to generate a plasma within the inductively coupled plasma reactor; and processing the semiconductor substrate in the inductively coupled plasma reactor using the plasma.