Nothing Special   »   [go: up one dir, main page]

Johnson, 2007 - Google Patents

Finger the culprit

Johnson, 2007

Document ID
3599987594465105143
Author
Johnson H
Publication year
Publication venue
EDN

External Links

Snippet

Finger the culprit Page 1 30 EDN | JUNE 21, 2007 When debugging a rare mode of failure, never attempt a direct fix. The test cycles associated with each attempted improvement will kill your development schedule. Your first order of business is to make the problem worse …
Continue reading at reedholmsystems.com (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterized by the transducing means
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/24Marginal checking or other specified testing methods not covered by G06F11/26, e.g. race tests
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Similar Documents

Publication Publication Date Title
TWI596352B (en) Method, circuit device and system with duty cycle based timing margining for i/o ac timing
JP5335772B2 (en) USB-based synchronization and timing system
US8583712B2 (en) Multi-bit sampling of oscillator jitter for random number generation
US6647027B1 (en) Method and apparatus for multi-channel data delay equalization
KR100801054B1 (en) Apparatus for measuring timing margin of semiconductor circuit and apparatus for measuring on-chip characteristics comprising the same
US7478256B2 (en) Coordinating data synchronous triggers on multiple devices
US8553503B2 (en) On-die signal timing measurement
US20080168296A1 (en) Apparatus and method for communicating with semiconductor devices of a serial interconnection
US20100090739A1 (en) Method and Apparatus for Removing Narrow Pulses from a Clock Waveform
EP3244224B1 (en) Integrated system and method for testing system timing margin
US8788780B2 (en) Signal restoration circuit, latency adjustment circuit, memory controller, processor, computer, signal restoration method, and latency adjustment method
US20140122948A1 (en) Memory test system and memory test method
JP2007280289A (en) Semiconductor device and signal processing method
WO2008008769A1 (en) Apparatus for and method of generating a time reference
KR101334111B1 (en) Quad-data rate controller and realization method thereof
JP5925507B2 (en) Data collation device, collation method, and security system using the same
Johnson Finger the culprit
US20150371719A1 (en) Systems and methods for testing performance of memory modules
US9438216B2 (en) Compensation time computing method and device for clock difference
US10372852B2 (en) Measurement of Aggressor/Victim capacitive coupling impact on timing
US20060156150A1 (en) Apparatus and method for test, characterization, and calibration of microprocessor-based and digital signal processor-based integrated circuit digital delay lines
Membrey et al. Time to measure the pi
US7933761B2 (en) Creation of clock and data simulation vectors with periodic jitter
Samarin et al. IP core protection using voltage-controlled side-channel receivers
US7895005B2 (en) Duty cycle measurement for various signals throughout an integrated circuit device