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Tsai et al., 2018 - Google Patents

Adaptive scheduling for systems with asymmetric memory hierarchies

Tsai et al., 2018

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Document ID
2642696540675764602
Author
Tsai P
Chen C
Sanchez D
Publication year
Publication venue
2018 51st Annual IEEE/ACM international symposium on microarchitecture (MICRO)

External Links

Snippet

Conventional multicores rely on deep cache hierarchies to reduce data movement. Recent advances in die stacking have enabled near-data processing (NDP) systems that reduce data movement by placing cores close to memory. NDP cores enjoy cheaper memory …
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Classifications

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