Nothing Special   »   [go: up one dir, main page]

Amrani et al., 2016 - Google Patents

Logic design with unipolar memristors

Amrani et al., 2016

Document ID
18082404925765323977
Author
Amrani E
Drori A
Kvatinsky S
Publication year
Publication venue
2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)

External Links

Snippet

Memristors are novel devices that could naturally be designed as memory elements. Recently, several methods of designing memristors for logic operations have been proposed. These methods, mostly, make use of bipolar memristors. In this paper, we …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00 using resistance random access memory [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00 using resistance random access memory [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0064Verifying circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00 using resistance random access memory [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00 using resistance random access memory [RRAM] elements comprising amorphous/crystalline phase transition cells
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components

Similar Documents

Publication Publication Date Title
Kvatinsky et al. MRL—Memristor ratioed logic
US10855288B2 (en) Logic design with unipolar memristors
Liu et al. A carry lookahead adder based on hybrid CMOS-memristor logic circuit
Zanotti et al. Smart logic-in-memory architecture for low-power non-von neumann computing
Tang et al. A high-performance low-power near-Vt RRAM-based FPGA
US20180367149A1 (en) Pure memristive logic gate
CN106941350B (en) Memristor-based exclusive-OR gate circuit and design and manufacturing method
Amrani et al. Logic design with unipolar memristors
Zhang et al. FeMAT: Exploring in-memory processing in multifunctional FeFET-based memory array
JP2014086125A (en) Write driver in sense amplifier for resistive type memory and operation method thereof
Ho et al. Configurable memristive logic block for memristive-based FPGA architectures
Puglisi et al. SIMPLY: Design of a RRAM-based smart logic-in-memory architecture using RRAM compact model
Tang et al. Circuit designs of high-performance and low-power RRAM-based multiplexers based on 4T (ransistor) 1R (RAM) programming structure
CN104778966A (en) Nonvolatile logic gate circuit based on spin Hall effect magnetic tunnel junction
Reuben et al. A parallel-friendly majority gate to accelerate in-memory computation
Zanotti et al. Circuit reliability of low-power RRAM-based logic-in-memory architectures
Sampath et al. Hybrid CMOS-memristor based FPGA architecture
Faruque et al. Memristor-based low-power high-speed nonvolatile hybrid memory array design
KR20070036625A (en) Delay circuit
Alammari et al. Hybrid memristor-cmos based up-down counter design
Chang et al. Novel Memristor-based Nonvolatile D Latch and Flip-flop Designs
Ho et al. Non-volatile D-latch for sequential logic circuits using memristors
Tang et al. Physical design considerations of one-level RRAM-based routing multiplexers
Yang et al. Complementary resistive switch based stateful logic operations using material implication
Lieske et al. Multi-level memristive voltage divider: Programming scheme trade-offs