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Kriebel et al., 2015 - Google Patents

R 2 Cache: reliability-aware reconfigurable last-level cache architecture for multi-cores

Kriebel et al., 2015

Document ID
17774709494643690957
Author
Kriebel F
Subramaniyan A
Rehman S
Ahandagbe S
Shafique M
Henkel J
Publication year
Publication venue
2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS)

External Links

Snippet

On-chip last-level caches in multicore systems are one of the most vulnerable components to soft errors. However, vulnerability to soft errors highly depends upon the parameters and configuration of the last-level cache, especially when executing different applications …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

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    • G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
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    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G—PHYSICS
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    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
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    • G06F1/32—Means for saving power
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    • G06F1/3237—Power saving by disabling clock generation or distribution
    • G—PHYSICS
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    • G06F11/3447—Performance evaluation by modeling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
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    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
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    • G06—COMPUTING; CALCULATING; COUNTING
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