Na et al., 2015 - Google Patents
An offset-tolerant dual-reference-voltage sensing scheme for deep submicrometer STT-RAMNa et al., 2015
View PDF- Document ID
- 17403701683894242784
- Author
- Na T
- Kim J
- Song B
- Kim J
- Kang S
- Jung S
- Publication year
- Publication venue
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
External Links
Snippet
Due to the increased process variation and reduced supply voltage in deep submicrometer technology nodes, an offset-tolerant sensing scheme has become essential. However, most offset-tolerant sensing schemes suffer from inherent performance degradation owing to …
- 238000000034 method 0 abstract description 27
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- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
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- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
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- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
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