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Liao et al., 2018 - Google Patents

UHCL-darknet: An OpenCL-based deep neural network framework for heterogeneous multi-/many-core clusters

Liao et al., 2018

Document ID
166172213935375842
Author
Liao L
Li K
Li K
Yang C
Tian Q
Publication year
Publication venue
Proceedings of the 47th International Conference on Parallel Processing

External Links

Snippet

As the majority of popular deep neural network (DNN) frameworks focus on a closed format CUDA implementations based on one or more NVIDIA GPUs, they cannot efficiently leverage other devices in cluster mode to accelerate the training and inference of DNNs …
Continue reading at dl.acm.org (other versions)

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