Umuroglu et al., 2015 - Google Patents
Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platformUmuroglu et al., 2015
View PDF- Document ID
- 1590980710193991504
- Author
- Umuroglu Y
- Morrison D
- Jahre M
- Publication year
- Publication venue
- 2015 25th International Conference on Field Programmable Logic and Applications (FPL)
External Links
Snippet
Large and sparse small-world graphs are ubiquitous across many scientific domains from bioinformatics to computer science. As these graphs grow in scale, traversal algorithms such as breadth-first search (BFS), fundamental to many graph processing applications and …
- 230000015654 memory 0 abstract description 47
Classifications
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- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
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- G06F15/80—Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored programme computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
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- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
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- G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
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