Nothing Special   »   [go: up one dir, main page]

Shi et al., 2019 - Google Patents

Dual-channel image acquisition system based on FPGA

Shi et al., 2019

Document ID
13011446260739429923
Author
Shi H
Zhang S
Publication year
Publication venue
2019 International Conference on Intelligent Transportation, Big Data & Smart City (ICITBS)

External Links

Snippet

A high-speed image acquisition and display system is designed. Artix-7 series FPGA is used as the system control core, DDR3 SDRAM is the high-speed memory core device, the CMOS OV5640 sensor is used as an image acquisition device and HDMI is used as a display …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/30Information retrieval; Database structures therefor; File system structures therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored programme computers
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled

Similar Documents

Publication Publication Date Title
CN107509033B (en) Remote sensing camera image real-time acquisition and processing system
US10318468B2 (en) FPGA-based interface signal remapping method
US10282805B2 (en) Image signal processor and devices including the same
US20170256016A1 (en) Hardware architecture for acceleration of computer vision and imaging processing
CN201937742U (en) High-speed image acquisition system
US20160004477A1 (en) Data transfer apparatus and data transfer method
CN106817545B (en) A kind of fast multiresolution video image mirror image rotation processing system
CN112367537A (en) Video acquisition-splicing-display system based on ZYNQ
CN116719755B (en) Method, device and equipment for multi-application memory access
CN105611114A (en) Full-digital multi-convolution core-convolution processing chip for AER (Address-Event Representation) image sensor
CN110087037A (en) A kind of the EtherCAT main website and working method of integrated camera
Shi et al. Dual-channel image acquisition system based on FPGA
US10126966B1 (en) Rotated memory storage for fast first-bit read access
CN107277373B (en) Hardware circuit of high-speed real-time image processing system
KR20180083688A (en) Application Processor and Integrated Circuit Including Interrupt Controller
Birla FPGA based reconfigurable platform for complex image processing
US9767054B2 (en) Data transfer control device and memory-containing device
CN104156907A (en) FPGA-based infrared preprocessing storage system and FPGA-based infrared preprocessing storage method
CN209895383U (en) High-speed transmission device for digital image big data
CN201585059U (en) Averager for weighing real-time data of anti-cheating video monitoring through weighing apparatus
CN205680092U (en) Dual port RAM shares interface circuit
CN110675306A (en) Hyperspectral image data processing system
Zhou et al. Design of high-performance industrial camera system based on FPGA and DDR3
CN209044332U (en) Synchronous processing circuit, synchronous processing device and synchronous processing system
Hou et al. Design and realization of real-time image acquisition and display system based on FPGA