Nowatzyk et al., 1994 - Google Patents
The S3. mp scalable shared memory multiprocessorNowatzyk et al., 1994
View PDF- Document ID
- 12763614438476358122
- Author
- Nowatzyk A
- Aybay G
- Browne M
- Kelly E
- Lee D
- Parkin M
- Publication year
- Publication venue
- 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences
External Links
Snippet
S3. mp (Sun's Scalable Shared memory MultiProcessor) is a research project to demonstrate a low overhead, high throughput communication system that is based on cache coherent distributed shared memory (DSM). S3. mp uses distributed directories and point-to …
- 230000015654 memory 0 title abstract description 99
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for programme control, e.g. control unit
- G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogramme communication; Intertask communication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored programme computers
- G06F15/78—Architectures of general purpose stored programme computers comprising a single central processing unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Error detection; Error correction; Monitoring responding to the occurence of a fault, e.g. fault tolerance
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. local area networks [LAN], wide area networks [WAN]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Nowatzyk et al. | The S3. mp scalable shared memory multiprocessor | |
TW544589B (en) | Loosely coupled-multi processor server | |
Cheriton et al. | Paradigm: A highly scalable shared-memory multicomputer architecture | |
KR100726305B1 (en) | Multiprocessor chip having bidirectional ring interconnect | |
US5522045A (en) | Method for updating value in distributed shared virtual memory among interconnected computer nodes having page table with minimal processor involvement | |
Sistare et al. | Optimization of MPI collectives on clusters of large-scale SMP's | |
EP0473777B1 (en) | High-speed packet switching apparatus and method | |
Kanakia et al. | The VMP network adapter board (NAB): High-performance network communication for multiprocessors | |
US7738443B2 (en) | Asynchronous broadcast for ordered delivery between compute nodes in a parallel computing system where packet header space is limited | |
EP0889403B1 (en) | A snoop filter for use in multiprocessor computer systems | |
CN114756388B (en) | Method for sharing memory among cluster system nodes according to need based on RDMA | |
JPH03158959A (en) | Common memory facility for multiprocessor computor device and operation of computor network | |
Alnæs et al. | Scalable coherent interface | |
Jovanovic et al. | An overview of reflective memory systems | |
Gustavson et al. | The scalable coherent interface (SCI) | |
Sterbenz | Axon: a host-network interface architecture for gigabit communications | |
US11397625B2 (en) | Lock manager for multi-core architectures | |
Kelly et al. | eee Microsystems Computer Corporporation Sun, Microsystem Laboratory Incorporated | |
Farazdel et al. | Understanding and using the SP Switch | |
JPH0323026B2 (en) | ||
JP2984594B2 (en) | Multi-cluster information processing system | |
CA2042171C (en) | High-speed packet switching apparatus and method | |
Baek | A survey on reflective memory systems | |
Hahn et al. | Evaluation of a Cluster‐Based System for the OLTP Application | |
Niessen | Design and implementation of a high performance user level network interface for cluster computing |