Nothing Special   »   [go: up one dir, main page]

Qi et al., 2011 - Google Patents

Simulated annealing based thermal-aware floorplanning

Qi et al., 2011

Document ID
12368393672672053740
Author
Qi L
Xia Y
Wang L
Publication year
Publication venue
2011 International Conference on Electronics, Communications and Control (ICECC)

External Links

Snippet

As technology advances, and the number of IP core in chips increases, power density in SoCs caused local temperature rose rapidly, which affects the stability of chips. Aiming at SoC thermal problem, combining to compact temperature model and application of effective …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5068Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
    • G06F17/5072Floorplanning, e.g. partitioning, placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/16Constructional details or arrangements
    • G06F1/20Cooling means
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption

Similar Documents

Publication Publication Date Title
Qi et al. Simulated annealing based thermal-aware floorplanning
Sivaranjani et al. Thermal-aware non-slicing VLSI floorplanning using a smart decision-making PSO-GA based hybrid algorithm
Hanumaiah et al. Throughput optimal task allocation under thermal constraints for multi-core processors
Chu et al. Energy saving of fans in air-cooled server via deep reinforcement learning algorithm
Dai et al. Exploiting dynamic thermal energy harvesting for reusing in smartphone with mobile applications
Wang et al. ACO-based thermal-aware thread-to-core mapping for dark-silicon-constrained CMPs
Shanavas et al. Wirelength minimization in partitioning and floorplanning using evolutionary algorithms
Feng et al. A thermal-aware mapping algorithm for 3D Mesh Network-on-Chip architecture
Wang et al. Thermal constrained workload distribution for maximizing throughput on multi-core processors
Chu et al. Temperature aware microprocessor floorplanning considering application dependent power load
Das et al. Shared Reed‐Muller Decision Diagram Based Thermal‐Aware AND‐XOR Decomposition of Logic Circuits
Wang et al. Rethinking thermal via planning with timing-power-temperature dependence for 3D ICs
Schafer et al. Hotspots elimination and temperature flattening in VLSI circuits
Shih et al. Thermal‐Aware Test Schedule and TAM Co‐Optimization for Three‐Dimensional IC
Zhu et al. Two-stage thermal-aware scheduling of task graphs on 3D multi-cores exploiting application and architecture characteristics
Healy et al. Microarchitectural floorplanning under performance and thermal tradeoff
Liu et al. On-chip thermal modeling based on SPICE simulation
Chou et al. A multicore vacation scheme for thermal-aware packet processing
Clement et al. A Service-Oriented Co-Simulation: Holistic Data Center Modelling Using Thermal, Power and Computational Simulations
Kapadia et al. A system-level cosynthesis framework for power delivery and on-chip data networks in application-specific 3-D ICs
Song et al. ThermPL: Thermal-aware placement based on thermal contribution and locality
Leavitt Big iron moves toward exascale computing
Fichera et al. Power and cooling heat up the data center
Arnaldo et al. Power profiling-guided floorplanner for thermal optimization in 3D multiprocessor architectures
Li et al. Impact of thermal constraints on multi-core architectures