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Miller et al., 2011 - Google Patents

Using shared arrays in message-driven parallel programs

Miller et al., 2011

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Document ID
12117387843259043830
Author
Miller P
Becker A
Kalé L
Publication year
Publication venue
2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum

External Links

Snippet

This paper describes a safe and efficient combination of the object-based message-driven execution and shared array parallel programming models. In particular, we demonstrate how this combination engenders the composition of loosely coupled parallel modules safely …
Continue reading at charm.cs.uiuc.edu (PDF) (other versions)

Classifications

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    • G06F9/46Multiprogramming arrangements
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    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/44Arrangements for executing specific programmes
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    • G06F9/4428Object-oriented
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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • GPHYSICS
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    • G06F9/00Arrangements for programme control, e.g. control unit
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    • G06F9/455Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
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    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
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    • G06F2212/25Using a specific main memory architecture

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