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Matoussi et al., 2019 - Google Patents

Loop aware CFG matching strategy for accurate performance estimation in IR-level native simulation

Matoussi et al., 2019

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Document ID
11472661040692738267
Author
Matoussi O
Pétrot F
Publication year
Publication venue
Integration

External Links

Snippet

Native simulation is a promising virtual prototyping candidate to accelerate design space exploration of hardware/software systems, early software developments and functional verification. However, it originally fails to provide non-functional information needed for …
Continue reading at www.sciencedirect.com (PDF) (other versions)

Classifications

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    • G06F8/44Encoding
    • G06F8/443Optimisation
    • G06F8/4441Reducing the execution time required by the program code
    • G06F8/4442Reducing the number of cache misses; Data prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/44Arrangements for executing specific programmes
    • G06F9/455Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
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    • G06F17/504Formal methods
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